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-rw-r--r--board/atmel/atngw100/atngw100.c27
-rw-r--r--board/atmel/atngw100/u-boot.lds9
-rw-r--r--board/atmel/atstk1000/atstk1000.c54
-rw-r--r--board/atmel/atstk1000/flash.c6
-rw-r--r--board/atmel/atstk1000/u-boot.lds9
5 files changed, 74 insertions, 31 deletions
diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c
index 1ccbe2c..c649855 100644
--- a/board/atmel/atngw100/atngw100.c
+++ b/board/atmel/atngw100/atngw100.c
@@ -25,12 +25,12 @@
#include <asm/sdram.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
-#include <asm/arch/hmatrix2.h>
+#include <asm/arch/hmatrix.h>
DECLARE_GLOBAL_DATA_PTR;
-static const struct sdram_info sdram = {
- .phys_addr = CFG_SDRAM_BASE,
+static const struct sdram_config sdram_config = {
+ .data_bits = SDRAM_DATA_16BIT,
.row_bits = 13,
.col_bits = 9,
.bank_bits = 2,
@@ -47,8 +47,8 @@ static const struct sdram_info sdram = {
int board_early_init_f(void)
{
- /* Set the SDRAM_ENABLE bit in the HEBI SFR */
- hmatrix2_writel(SFR4, 1 << 1);
+ /* Enable SDRAM in the EBI mux */
+ hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
gpio_enable_ebi();
gpio_enable_usart1();
@@ -66,7 +66,22 @@ int board_early_init_f(void)
long int initdram(int board_type)
{
- return sdram_init(&sdram);
+ unsigned long expected_size;
+ unsigned long actual_size;
+ void *sdram_base;
+
+ sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
+
+ expected_size = sdram_init(sdram_base, &sdram_config);
+ actual_size = get_ram_size(sdram_base, expected_size);
+
+ unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
+
+ if (expected_size != actual_size)
+ printf("Warning: Only %u of %u MiB SDRAM is working\n",
+ actual_size >> 20, expected_size >> 20);
+
+ return actual_size;
}
void board_init_info(void)
diff --git a/board/atmel/atngw100/u-boot.lds b/board/atmel/atngw100/u-boot.lds
index 34e347a..e736adf 100644
--- a/board/atmel/atngw100/u-boot.lds
+++ b/board/atmel/atngw100/u-boot.lds
@@ -29,17 +29,10 @@ SECTIONS
. = 0;
_text = .;
.text : {
+ *(.exception.text)
*(.text)
*(.text.*)
}
-
- . = ALIGN(32);
- __flashprog_start = .;
- .flashprog : {
- *(.flashprog)
- }
- . = ALIGN(32);
- __flashprog_end = .;
_etext = .;
.rodata : {
diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c
index 28f64c4..33bdba6 100644
--- a/board/atmel/atstk1000/atstk1000.c
+++ b/board/atmel/atstk1000/atstk1000.c
@@ -25,13 +25,39 @@
#include <asm/sdram.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
-#include <asm/arch/hmatrix2.h>
+#include <asm/arch/hmatrix.h>
DECLARE_GLOBAL_DATA_PTR;
-static const struct sdram_info sdram = {
- .phys_addr = CFG_SDRAM_BASE,
+static const struct sdram_config sdram_config = {
+#if defined(CONFIG_ATSTK1006)
+ /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */
+ .data_bits = SDRAM_DATA_32BIT,
+ .row_bits = 13,
+ .col_bits = 9,
+ .bank_bits = 2,
+ .cas = 2,
+ .twr = 2,
+ .trc = 7,
+ .trp = 2,
+ .trcd = 2,
+ .tras = 4,
+ .txsr = 7,
+ /* 7.81 us */
+ .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
+#else
+ /* MT48LC2M32B2P-5 (8 MB) on motherboard */
+#ifdef CONFIG_ATSTK1004
+ .data_bits = SDRAM_DATA_16BIT,
+#else
+ .data_bits = SDRAM_DATA_32BIT,
+#endif
+#ifdef CONFIG_ATSTK1000_16MB_SDRAM
+ /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
+ .row_bits = 12,
+#else
.row_bits = 11,
+#endif
.col_bits = 8,
.bank_bits = 2,
.cas = 3,
@@ -43,12 +69,13 @@ static const struct sdram_info sdram = {
.txsr = 5,
/* 15.6 us */
.refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
+#endif
};
int board_early_init_f(void)
{
- /* Set the SDRAM_ENABLE bit in the HEBI SFR */
- hmatrix2_writel(SFR4, 1 << 1);
+ /* Enable SDRAM in the EBI mux */
+ hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
gpio_enable_ebi();
gpio_enable_usart1();
@@ -65,7 +92,22 @@ int board_early_init_f(void)
long int initdram(int board_type)
{
- return sdram_init(&sdram);
+ unsigned long expected_size;
+ unsigned long actual_size;
+ void *sdram_base;
+
+ sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
+
+ expected_size = sdram_init(sdram_base, &sdram_config);
+ actual_size = get_ram_size(sdram_base, expected_size);
+
+ unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
+
+ if (expected_size != actual_size)
+ printf("Warning: Only %u of %u MiB SDRAM is working\n",
+ actual_size >> 20, expected_size >> 20);
+
+ return actual_size;
}
void board_init_info(void)
diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c
index 4047825..12537f3 100644
--- a/board/atmel/atstk1000/flash.c
+++ b/board/atmel/atstk1000/flash.c
@@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
flash_info_t flash_info[1];
-static void __flashprog flash_identify(uint16_t *flash, flash_info_t *info)
+static void flash_identify(uint16_t *flash, flash_info_t *info)
{
unsigned long flags;
@@ -76,7 +76,7 @@ void flash_print_info(flash_info_t *info)
info->size >> 10, info->sector_count);
}
-int __flashprog flash_erase(flash_info_t *info, int s_first, int s_last)
+int flash_erase(flash_info_t *info, int s_first, int s_last)
{
unsigned long flags;
unsigned long start_time;
@@ -154,7 +154,7 @@ int __flashprog flash_erase(flash_info_t *info, int s_first, int s_last)
return ERR_OK;
}
-int __flashprog write_buff(flash_info_t *info, uchar *src,
+int write_buff(flash_info_t *info, uchar *src,
ulong addr, ulong count)
{
unsigned long flags;
diff --git a/board/atmel/atstk1000/u-boot.lds b/board/atmel/atstk1000/u-boot.lds
index 247812e..0d3b19c 100644
--- a/board/atmel/atstk1000/u-boot.lds
+++ b/board/atmel/atstk1000/u-boot.lds
@@ -29,17 +29,10 @@ SECTIONS
. = 0;
_text = .;
.text : {
+ *(.exception.text)
*(.text)
*(.text.*)
}
-
- . = ALIGN(32);
- __flashprog_start = .;
- .flashprog : {
- *(.flashprog)
- }
- . = ALIGN(32);
- __flashprog_end = .;
_etext = .;
.rodata : {
generated by cgit v1.1 at 2024-11-22 20:21:45 +0000