diff options
Diffstat (limited to 'board/atmel')
22 files changed, 222 insertions, 75 deletions
diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index c5082a0..f7d68b7 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -30,11 +30,13 @@ #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/io.h> +#include <asm/arch/hardware.h> #include <lcd.h> #include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include <net.h> #endif +#include <netdev.h> #define MP_BLOCK_3_BASE 0xFDF00000 @@ -50,19 +52,19 @@ static void at91cap9_serial_hw_init(void) #ifdef CONFIG_USART0 at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); #endif #ifdef CONFIG_USART1 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); #endif #ifdef CONFIG_USART2 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); #endif #ifdef CONFIG_USART3 /* DBGU */ @@ -145,9 +147,9 @@ static void at91cap9_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_DBW_16 | -#else /* CFG_NAND_DBW_8 */ +#else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif AT91_SMC_TDF_(1)); @@ -324,6 +326,35 @@ static void at91cap9_lcd_hw_init(void) gd->fb_base = 0; } + +#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h> + +void lcd_show_board_info(void) +{ + ulong dram_size, nand_size; + int i; + char temp[32]; + + lcd_printf ("%s\n", U_BOOT_VERSION); + lcd_printf ("(C) 2008 ATMEL Corp\n"); + lcd_printf ("at91support@atmel.com\n"); + lcd_printf ("%s CPU at %s MHz\n", + AT91_CPU_NAME, + strmhz(temp, AT91_CPU_CLOCK)); + + dram_size = 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + dram_size += gd->bd->bi_dram[i].size; + nand_size = 0; + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_size += nand_info[i].size; + lcd_printf (" %ld MB SDRAM, %ld MB NAND\n", + dram_size >> 20, + nand_size >> 20 ); +} +#endif /* CONFIG_LCD_INFO */ #endif int board_init(void) @@ -376,3 +407,12 @@ void reset_phy(void) #endif } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91CAP9_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/board/atmel/at91cap9adk/nand.c b/board/atmel/at91cap9adk/nand.c index 1dec558..cc2263b 100644 --- a/board/atmel/at91cap9adk/nand.c +++ b/board/atmel/at91cap9adk/nand.c @@ -62,7 +62,7 @@ static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int board_nand_init(struct nand_chip *nand) { nand->ecc.mode = NAND_ECC_SOFT; -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 nand->options = NAND_BUSWIDTH_16; #endif nand->cmd_ctrl = at91cap9adk_nand_hwcontrol; diff --git a/board/atmel/at91cap9adk/partition.c b/board/atmel/at91cap9adk/partition.c index eb1a724..7e1d46f 100644 --- a/board/atmel/at91cap9adk/partition.c +++ b/board/atmel/at91cap9adk/partition.c @@ -23,10 +23,10 @@ #include <asm/hardware.h> #include <dataflash.h> -AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ }; /*define the area offsets*/ diff --git a/board/atmel/at91rm9200dk/at91rm9200dk.c b/board/atmel/at91rm9200dk/at91rm9200dk.c index c564f73..b89a3fd 100644 --- a/board/atmel/at91rm9200dk/at91rm9200dk.c +++ b/board/atmel/at91rm9200dk/at91rm9200dk.c @@ -47,7 +47,7 @@ int board_init (void) /* so we do _nothing_ here */ /* arch number of AT91RM9200DK-Board */ - gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200; + gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK; /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; diff --git a/board/atmel/at91rm9200dk/flash.c b/board/atmel/at91rm9200dk/flash.c index 0513d61..902c3c4 100644 --- a/board/atmel/at91rm9200dk/flash.c +++ b/board/atmel/at91rm9200dk/flash.c @@ -59,7 +59,7 @@ OrgDef OrgAT49BV6416[] = { 127, 64*1024 }, /* 127 * 64 kBytes sectors */ }; -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* AT49BV1614A Codes */ #define FLASH_CODE1 0xAA @@ -77,8 +77,8 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; #define CMD_UNLOCK_BYPASS 0x0020 #define CMD_SECTOR_UNLOCK 0x0070 -#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1))) -#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1))) +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00005555<<1))) +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00002AAA<<1))) #define BIT_ERASE_DONE 0x0080 #define BIT_RDY_MASK 0x0080 @@ -99,9 +99,9 @@ void flash_identification (flash_info_t * info) MEM_FLASH_ADDR2 = FLASH_CODE2; MEM_FLASH_ADDR1 = ID_IN_CODE; - manuf_code = *(volatile u16 *) CFG_FLASH_BASE; - device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2); - add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1)); + manuf_code = *(volatile u16 *) CONFIG_SYS_FLASH_BASE; + device_code = *(volatile u16 *) (CONFIG_SYS_FLASH_BASE + 2); + add_device_code = *(volatile u16 *) (CONFIG_SYS_FLASH_BASE + (3 << 1)); MEM_FLASH_ADDR1 = FLASH_CODE1; MEM_FLASH_ADDR2 = FLASH_CODE2; @@ -157,7 +157,7 @@ ulong flash_init (void) ulong size = 0; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { ulong flashbase = 0; flash_identification (&flash_info[i]); @@ -216,18 +216,18 @@ ulong flash_init (void) /* Protect binary boot image */ flash_protect (FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]); + CONFIG_SYS_FLASH_BASE, + CONFIG_SYS_FLASH_BASE + CONFIG_SYS_BOOT_SIZE - 1, &flash_info[0]); /* Protect environment variables */ flash_protect (FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); /* Protect U-Boot gzipped image */ flash_protect (FLAG_PROTECT_SET, - CFG_U_BOOT_BASE, - CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]); + CONFIG_SYS_U_BOOT_BASE, + CONFIG_SYS_U_BOOT_BASE + CONFIG_SYS_U_BOOT_SIZE - 1, &flash_info[0]); return size; } @@ -345,7 +345,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) result = *addr; /* check timeout */ - if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { + if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; chip1 = TMO; break; @@ -433,7 +433,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) result = *addr; /* check timeout */ - if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { + if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { chip1 = ERR | TMO; break; } diff --git a/board/atmel/at91rm9200dk/partition.c b/board/atmel/at91rm9200dk/partition.c index 975be17..c739b11 100644 --- a/board/atmel/at91rm9200dk/partition.c +++ b/board/atmel/at91rm9200dk/partition.c @@ -23,11 +23,11 @@ #include <asm/hardware.h> #include <dataflash.h> -AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ - {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3} +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3} }; /*define the area offsets*/ diff --git a/board/atmel/at91rm9200dk/u-boot.lds b/board/atmel/at91rm9200dk/u-boot.lds index 14cd228..987b07d 100644 --- a/board/atmel/at91rm9200dk/u-boot.lds +++ b/board/atmel/at91rm9200dk/u-boot.lds @@ -52,6 +52,6 @@ SECTIONS . = ALIGN(4); __bss_start = .; - .bss (NOLOAD) : { *(.bss) } + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } _end = .; } diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 06d8512..ef99b8b 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -30,9 +30,11 @@ #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/io.h> +#include <asm/arch/hardware.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include <net.h> #endif +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -46,19 +48,19 @@ static void at91sam9260ek_serial_hw_init(void) #ifdef CONFIG_USART0 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); #endif #ifdef CONFIG_USART1 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); #endif #ifdef CONFIG_USART2 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); #endif #ifdef CONFIG_USART3 /* DBGU */ @@ -90,9 +92,9 @@ static void at91sam9260ek_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_DBW_16 | -#else /* CFG_NAND_DBW_8 */ +#else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif AT91_SMC_TDF_(2)); @@ -248,3 +250,12 @@ void reset_phy(void) #endif } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/board/atmel/at91sam9260ek/nand.c b/board/atmel/at91sam9260ek/nand.c index 665e35c..c5ac634 100644 --- a/board/atmel/at91sam9260ek/nand.c +++ b/board/atmel/at91sam9260ek/nand.c @@ -67,7 +67,7 @@ static int at91sam9260ek_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { nand->ecc.mode = NAND_ECC_SOFT; -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 nand->options = NAND_BUSWIDTH_16; #endif nand->cmd_ctrl = at91sam9260ek_nand_hwcontrol; diff --git a/board/atmel/at91sam9260ek/partition.c b/board/atmel/at91sam9260ek/partition.c index 557d695..2629c67 100644 --- a/board/atmel/at91sam9260ek/partition.c +++ b/board/atmel/at91sam9260ek/partition.c @@ -23,11 +23,11 @@ #include <asm/hardware.h> #include <dataflash.h> -AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ - {CFG_DATAFLASH_LOGIC_ADDR_CS1, 1} +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1} }; /*define the area offsets*/ diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 647aab5..14f236d 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -48,19 +48,19 @@ static void at91sam9261ek_serial_hw_init(void) #ifdef CONFIG_USART0 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0); #endif #ifdef CONFIG_USART1 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1); #endif #ifdef CONFIG_USART2 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2); #endif #ifdef CONFIG_USART3 /* DBGU */ @@ -92,9 +92,9 @@ static void at91sam9261ek_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_DBW_16 | -#else /* CFG_NAND_DBW_8 */ +#else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif AT91_SMC_TDF_(2)); @@ -209,6 +209,35 @@ static void at91sam9261ek_lcd_hw_init(void) gd->fb_base = AT91SAM9261_SRAM_BASE; } + +#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h> + +void lcd_show_board_info(void) +{ + ulong dram_size, nand_size; + int i; + char temp[32]; + + lcd_printf ("%s\n", U_BOOT_VERSION); + lcd_printf ("(C) 2008 ATMEL Corp\n"); + lcd_printf ("at91support@atmel.com\n"); + lcd_printf ("%s CPU at %s MHz\n", + AT91_CPU_NAME, + strmhz(temp, AT91_CPU_CLOCK)); + + dram_size = 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + dram_size += gd->bd->bi_dram[i].size; + nand_size = 0; + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_size += nand_info[i].size; + lcd_printf (" %ld MB SDRAM, %ld MB NAND\n", + dram_size >> 20, + nand_size >> 20 ); +} +#endif /* CONFIG_LCD_INFO */ #endif int board_init(void) diff --git a/board/atmel/at91sam9261ek/nand.c b/board/atmel/at91sam9261ek/nand.c index fccb9d7..06395ee 100644 --- a/board/atmel/at91sam9261ek/nand.c +++ b/board/atmel/at91sam9261ek/nand.c @@ -67,7 +67,7 @@ static int at91sam9261ek_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { nand->ecc.mode = NAND_ECC_SOFT; -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 nand->options = NAND_BUSWIDTH_16; #endif nand->cmd_ctrl = at91sam9261ek_nand_hwcontrol; diff --git a/board/atmel/at91sam9261ek/partition.c b/board/atmel/at91sam9261ek/partition.c index 975be17..c739b11 100644 --- a/board/atmel/at91sam9261ek/partition.c +++ b/board/atmel/at91sam9261ek/partition.c @@ -23,11 +23,11 @@ #include <asm/hardware.h> #include <dataflash.h> -AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ - {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3} +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3} }; /*define the area offsets*/ diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 927fc91..ebd4649 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -31,11 +31,13 @@ #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/io.h> +#include <asm/arch/hardware.h> #include <lcd.h> #include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include <net.h> #endif +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -49,19 +51,19 @@ static void at91sam9263ek_serial_hw_init(void) #ifdef CONFIG_USART0 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0); #endif #ifdef CONFIG_USART1 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1); #endif #ifdef CONFIG_USART2 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2); #endif #ifdef CONFIG_USART3 /* DBGU */ @@ -93,9 +95,9 @@ static void at91sam9263ek_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_DBW_16 | -#else /* CFG_NAND_DBW_8 */ +#else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif AT91_SMC_TDF_(2)); @@ -258,6 +260,35 @@ static void at91sam9263ek_lcd_hw_init(void) gd->fb_base = AT91SAM9263_SRAM0_BASE; } + +#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h> + +void lcd_show_board_info(void) +{ + ulong dram_size, nand_size; + int i; + char temp[32]; + + lcd_printf ("%s\n", U_BOOT_VERSION); + lcd_printf ("(C) 2008 ATMEL Corp\n"); + lcd_printf ("at91support@atmel.com\n"); + lcd_printf ("%s CPU at %s MHz\n", + AT91_CPU_NAME, + strmhz(temp, AT91_CPU_CLOCK)); + + dram_size = 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + dram_size += gd->bd->bi_dram[i].size; + nand_size = 0; + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_size += nand_info[i].size; + lcd_printf (" %ld MB SDRAM, %ld MB NAND\n", + dram_size >> 20, + nand_size >> 20 ); +} +#endif /* CONFIG_LCD_INFO */ #endif int board_init(void) @@ -308,3 +339,12 @@ void reset_phy(void) #endif } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/board/atmel/at91sam9263ek/nand.c b/board/atmel/at91sam9263ek/nand.c index 250ec7f..3c247f6 100644 --- a/board/atmel/at91sam9263ek/nand.c +++ b/board/atmel/at91sam9263ek/nand.c @@ -67,7 +67,7 @@ static int at91sam9263ek_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { nand->ecc.mode = NAND_ECC_SOFT; -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 nand->options = NAND_BUSWIDTH_16; #endif nand->cmd_ctrl = at91sam9263ek_nand_hwcontrol; diff --git a/board/atmel/at91sam9263ek/partition.c b/board/atmel/at91sam9263ek/partition.c index eb1a724..7e1d46f 100644 --- a/board/atmel/at91sam9263ek/partition.c +++ b/board/atmel/at91sam9263ek/partition.c @@ -23,10 +23,10 @@ #include <asm/hardware.h> #include <dataflash.h> -AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ }; /*define the area offsets*/ diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index 509e7c3..b6fef9d 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -48,19 +48,19 @@ static void at91sam9rlek_serial_hw_init(void) #ifdef CONFIG_USART0 at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0); #endif #ifdef CONFIG_USART1 at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1); #endif #ifdef CONFIG_USART2 at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2); #endif #ifdef CONFIG_USART3 /* DBGU */ @@ -92,9 +92,9 @@ static void at91sam9rlek_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_DBW_16 | -#else /* CFG_NAND_DBW_8 */ +#else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif AT91_SMC_TDF_(2)); @@ -181,6 +181,35 @@ static void at91sam9rlek_lcd_hw_init(void) gd->fb_base = 0; } + +#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h> + +void lcd_show_board_info(void) +{ + ulong dram_size, nand_size; + int i; + char temp[32]; + + lcd_printf ("%s\n", U_BOOT_VERSION); + lcd_printf ("(C) 2008 ATMEL Corp\n"); + lcd_printf ("at91support@atmel.com\n"); + lcd_printf ("%s CPU at %s MHz\n", + AT91_CPU_NAME, + strmhz(temp, AT91_CPU_CLOCK)); + + dram_size = 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + dram_size += gd->bd->bi_dram[i].size; + nand_size = 0; + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_size += nand_info[i].size; + lcd_printf (" %ld MB SDRAM, %ld MB NAND\n", + dram_size >> 20, + nand_size >> 20 ); +} +#endif /* CONFIG_LCD_INFO */ #endif diff --git a/board/atmel/at91sam9rlek/nand.c b/board/atmel/at91sam9rlek/nand.c index eb342b8..625f6ec 100644 --- a/board/atmel/at91sam9rlek/nand.c +++ b/board/atmel/at91sam9rlek/nand.c @@ -67,7 +67,7 @@ static int at91sam9rlek_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { nand->ecc.mode = NAND_ECC_SOFT; -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 nand->options = NAND_BUSWIDTH_16; #endif nand->cmd_ctrl = at91sam9rlek_nand_hwcontrol; diff --git a/board/atmel/at91sam9rlek/partition.c b/board/atmel/at91sam9rlek/partition.c index eb1a724..7e1d46f 100644 --- a/board/atmel/at91sam9rlek/partition.c +++ b/board/atmel/at91sam9rlek/partition.c @@ -23,10 +23,10 @@ #include <asm/hardware.h> #include <dataflash.h> -AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ }; /*define the area offsets*/ diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index 480d525..004d8da 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -27,6 +27,7 @@ #include <asm/arch/gpio.h> #include <asm/arch/hmatrix.h> #include <asm/arch/portmux.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -95,8 +96,6 @@ int board_early_init_r(void) return 0; } -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bi) { diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 7be3993..c36cb57 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -26,6 +26,7 @@ #include <asm/arch/clk.h> #include <asm/arch/hmatrix.h> #include <asm/arch/portmux.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -117,8 +118,6 @@ int board_early_init_r(void) return 0; } -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bi) { diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c index e2bfd4a..4d380f3 100644 --- a/board/atmel/atstk1000/flash.c +++ b/board/atmel/atstk1000/flash.c @@ -55,17 +55,17 @@ unsigned long flash_init(void) unsigned long addr; unsigned int i; - flash_info[0].size = CFG_FLASH_SIZE; + flash_info[0].size = CONFIG_SYS_FLASH_SIZE; flash_info[0].sector_count = 135; - flash_identify(uncached((void *)CFG_FLASH_BASE), &flash_info[0]); + flash_identify(uncached((void *)CONFIG_SYS_FLASH_BASE), &flash_info[0]); for (i = 0, addr = 0; i < 8; i++, addr += 0x2000) flash_info[0].start[i] = addr; for (; i < flash_info[0].sector_count; i++, addr += 0x10000) flash_info[0].start[i] = addr; - return CFG_FLASH_SIZE; + return CONFIG_SYS_FLASH_SIZE; } void flash_print_info(flash_info_t *info) |