diff options
Diffstat (limited to 'board/atmel/at91sam9rlek')
| -rw-r--r-- | board/atmel/at91sam9rlek/at91sam9rlek.c | 39 | ||||
| -rw-r--r-- | board/atmel/at91sam9rlek/nand.c | 2 | ||||
| -rw-r--r-- | board/atmel/at91sam9rlek/partition.c | 6 |
3 files changed, 38 insertions, 9 deletions
diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index 509e7c3..b6fef9d 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -48,19 +48,19 @@ static void at91sam9rlek_serial_hw_init(void) #ifdef CONFIG_USART0 at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0); #endif #ifdef CONFIG_USART1 at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1); #endif #ifdef CONFIG_USART2 at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2); #endif #ifdef CONFIG_USART3 /* DBGU */ @@ -92,9 +92,9 @@ static void at91sam9rlek_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_DBW_16 | -#else /* CFG_NAND_DBW_8 */ +#else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif AT91_SMC_TDF_(2)); @@ -181,6 +181,35 @@ static void at91sam9rlek_lcd_hw_init(void) gd->fb_base = 0; } + +#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h> + +void lcd_show_board_info(void) +{ + ulong dram_size, nand_size; + int i; + char temp[32]; + + lcd_printf ("%s\n", U_BOOT_VERSION); + lcd_printf ("(C) 2008 ATMEL Corp\n"); + lcd_printf ("at91support@atmel.com\n"); + lcd_printf ("%s CPU at %s MHz\n", + AT91_CPU_NAME, + strmhz(temp, AT91_CPU_CLOCK)); + + dram_size = 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + dram_size += gd->bd->bi_dram[i].size; + nand_size = 0; + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_size += nand_info[i].size; + lcd_printf (" %ld MB SDRAM, %ld MB NAND\n", + dram_size >> 20, + nand_size >> 20 ); +} +#endif /* CONFIG_LCD_INFO */ #endif diff --git a/board/atmel/at91sam9rlek/nand.c b/board/atmel/at91sam9rlek/nand.c index eb342b8..625f6ec 100644 --- a/board/atmel/at91sam9rlek/nand.c +++ b/board/atmel/at91sam9rlek/nand.c @@ -67,7 +67,7 @@ static int at91sam9rlek_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { nand->ecc.mode = NAND_ECC_SOFT; -#ifdef CFG_NAND_DBW_16 +#ifdef CONFIG_SYS_NAND_DBW_16 nand->options = NAND_BUSWIDTH_16; #endif nand->cmd_ctrl = at91sam9rlek_nand_hwcontrol; diff --git a/board/atmel/at91sam9rlek/partition.c b/board/atmel/at91sam9rlek/partition.c index eb1a724..7e1d46f 100644 --- a/board/atmel/at91sam9rlek/partition.c +++ b/board/atmel/at91sam9rlek/partition.c @@ -23,10 +23,10 @@ #include <asm/hardware.h> #include <dataflash.h> -AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ }; /*define the area offsets*/ |