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-rw-r--r--board/atmel/at91cap9adk/Makefile3
-rw-r--r--board/atmel/at91cap9adk/at91cap9adk.c71
-rw-r--r--board/atmel/at91cap9adk/led.c46
-rw-r--r--board/atmel/at91cap9adk/nand.c72
4 files changed, 13 insertions, 179 deletions
diff --git a/board/atmel/at91cap9adk/Makefile b/board/atmel/at91cap9adk/Makefile
index 2d2ff2c..2496f9b 100644
--- a/board/atmel/at91cap9adk/Makefile
+++ b/board/atmel/at91cap9adk/Makefile
@@ -31,8 +31,7 @@ LIB = $(obj)lib$(BOARD).a
COBJS-y += at91cap9adk.o
COBJS-y += led.o
-COBJS-y += partition.o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
+COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c
index f7d68b7..e8025e7 100644
--- a/board/atmel/at91cap9adk/at91cap9adk.c
+++ b/board/atmel/at91cap9adk/at91cap9adk.c
@@ -26,6 +26,7 @@
#include <asm/arch/at91cap9.h>
#include <asm/arch/at91cap9_matrix.h>
#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
@@ -47,33 +48,6 @@ DECLARE_GLOBAL_DATA_PTR;
* Miscelaneous platform dependent initialisations
*/
-static void at91cap9_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
- at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */
- at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
- at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
- at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
- at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
- at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3 /* DBGU */
- at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
- at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
static void at91cap9_slowclock_hw_init(void)
{
/*
@@ -159,21 +133,7 @@ static void at91cap9_nand_hw_init(void)
/* RDY/BSY is not connected */
/* Enable NandFlash */
- at91_set_gpio_output(AT91_PIN_PD15, 1);
-}
-#endif
-
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91cap9_spi_hw_init(void)
-{
- at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */
-
- at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
- at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
- at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
-
- /* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
+ at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
}
#endif
@@ -217,27 +177,8 @@ static void at91cap9_macb_hw_init(void)
pin_to_mask(AT91_PIN_PB26),
pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
- at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */
- at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */
- at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */
- at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */
- at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */
- at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */
- at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */
- at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */
- at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */
- at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */
-
-#ifndef CONFIG_RMII
- at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */
- at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
- at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
- at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
- at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
- at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
- at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
- at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
-#endif
+ at91_macb_hw_init();
+
/* Unlock EMAC, 3 0 2 1 sequence */
#define MP_MAC_KEY0 0x5969cb2a
#define MP_MAC_KEY1 0xb4a1872e
@@ -367,14 +308,14 @@ int board_init(void)
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- at91cap9_serial_hw_init();
+ at91_serial_hw_init();
at91cap9_slowclock_hw_init();
at91cap9_nor_hw_init();
#ifdef CONFIG_CMD_NAND
at91cap9_nand_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
- at91cap9_spi_hw_init();
+ at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_MACB
at91cap9_macb_hw_init();
diff --git a/board/atmel/at91cap9adk/led.c b/board/atmel/at91cap9adk/led.c
index a137c2a..14aea99 100644
--- a/board/atmel/at91cap9adk/led.c
+++ b/board/atmel/at91cap9adk/led.c
@@ -28,50 +28,16 @@
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
-#define RED_LED AT91_PIN_PC29 /* this is the power led */
-#define GREEN_LED AT91_PIN_PA10 /* this is the user1 led */
-#define YELLOW_LED AT91_PIN_PA11 /* this is the user1 led */
-
-void red_LED_on(void)
-{
- at91_set_gpio_value(RED_LED, 1);
-}
-
-void red_LED_off(void)
-{
- at91_set_gpio_value(RED_LED, 0);
-}
-
-void green_LED_on(void)
-{
- at91_set_gpio_value(GREEN_LED, 0);
-}
-
-void green_LED_off(void)
-{
- at91_set_gpio_value(GREEN_LED, 1);
-}
-
-void yellow_LED_on(void)
-{
- at91_set_gpio_value(YELLOW_LED, 0);
-}
-
-void yellow_LED_off(void)
-{
- at91_set_gpio_value(YELLOW_LED, 1);
-}
-
void coloured_LED_init(void)
{
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
- at91_set_gpio_output(RED_LED, 1);
- at91_set_gpio_output(GREEN_LED, 1);
- at91_set_gpio_output(YELLOW_LED, 1);
+ at91_set_gpio_output(CONFIG_RED_LED, 1);
+ at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+ at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
- at91_set_gpio_output(RED_LED, 0);
- at91_set_gpio_output(GREEN_LED, 1);
- at91_set_gpio_output(YELLOW_LED, 1);
+ at91_set_gpio_output(CONFIG_RED_LED, 0);
+ at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+ at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
}
diff --git a/board/atmel/at91cap9adk/nand.c b/board/atmel/at91cap9adk/nand.c
deleted file mode 100644
index cc2263b..0000000
--- a/board/atmel/at91cap9adk/nand.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/at91cap9.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-
-#include <nand.h>
-
-/*
- * hardware specific access to control-lines
- */
-#define MASK_ALE (1 << 21) /* our ALE is AD21 */
-#define MASK_CLE (1 << 22) /* our CLE is AD22 */
-
-static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd,
- int cmd, unsigned int ctrl)
-{
- struct nand_chip *this = mtd->priv;
-
- if (ctrl & NAND_CTRL_CHANGE) {
- ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
- IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-
- if (ctrl & NAND_CLE)
- IO_ADDR_W |= MASK_CLE;
- if (ctrl & NAND_ALE)
- IO_ADDR_W |= MASK_ALE;
-
- at91_set_gpio_value(AT91_PIN_PD15, !(ctrl & NAND_NCE));
- this->IO_ADDR_W = (void *) IO_ADDR_W;
- }
-
- if (cmd != NAND_CMD_NONE)
- writeb(cmd, this->IO_ADDR_W);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
- nand->ecc.mode = NAND_ECC_SOFT;
-#ifdef CONFIG_SYS_NAND_DBW_16
- nand->options = NAND_BUSWIDTH_16;
-#endif
- nand->cmd_ctrl = at91cap9adk_nand_hwcontrol;
- nand->chip_delay = 20;
-
- return 0;
-}