summaryrefslogtreecommitdiff
path: root/board/armltd
diff options
context:
space:
mode:
Diffstat (limited to 'board/armltd')
-rwxr-xr-xboard/armltd/integrator/split_by_variant.sh129
-rw-r--r--board/armltd/vexpress/Makefile49
-rw-r--r--board/armltd/vexpress/ca9x4_ct_vxp.c220
-rw-r--r--board/armltd/vexpress/config.mk23
-rw-r--r--board/armltd/vexpress/u-boot.lds65
5 files changed, 414 insertions, 72 deletions
diff --git a/board/armltd/integrator/split_by_variant.sh b/board/armltd/integrator/split_by_variant.sh
index 702b436..d869dd2 100755
--- a/board/armltd/integrator/split_by_variant.sh
+++ b/board/armltd/integrator/split_by_variant.sh
@@ -10,12 +10,12 @@ then
# ---------------------------------------------------------
# Set the platform defines
# ---------------------------------------------------------
-echo -n "/* Integrator configuration implied " > ${config_file}
-echo " by Makefile target */" >> ${config_file}
-echo -n "#define CONFIG_INTEGRATOR" >> ${config_file}
-echo " /* Integrator board */" >> ${config_file}
-echo -n "#define CONFIG_ARCH_INTEGRATOR" >> ${config_file}
-echo " 1 /* Integrator/AP */" >> ${config_file}
+cat > ${config_file} << _EOF
+/* Integrator configuration implied by Makefile target */
+#define CONFIG_INTEGRATOR /* Integrator board */
+#define CONFIG_ARCH_INTEGRATOR 1 /* Integrator/AP */
+_EOF
+
# ---------------------------------------------------------
# Set the core module defines according to Core Module
# ---------------------------------------------------------
@@ -50,37 +50,37 @@ else
ap720t_config)
cpu="arm720t"
- echo -n "#define CONFIG_CM720T" >> ${config_file}
- echo " 1 /* CPU core is ARM720T */ " >> ${config_file}
+ echo "#define CONFIG_CM720T 1 /* CPU core is ARM720T */" \
+ >> ${config_file}
variant="Core module CM720T"
;;
ap922_XA10_config)
cpu="arm_intcm"
variant="unported core module CM922T_XA10"
- echo -n "#define CONFIG_CM922T_XA10" >> ${config_file}
- echo " 1 /* CPU core is ARM922T_XA10 */" >> ${config_file}
+ echo "#define CONFIG_CM922T_XA10 1 /* CPU core is ARM922T_XA10 */" \
+ >> ${config_file}
;;
ap920t_config)
cpu="arm920t"
variant="Core module CM920T"
- echo -n "#define CONFIG_CM920T" >> ${config_file}
- echo " 1 /* CPU core is ARM920T */" >> ${config_file}
+ echo "#define CONFIG_CM920T 1 /* CPU core is ARM920T */" \
+ >> ${config_file}
;;
ap926ejs_config)
cpu="arm926ejs"
variant="Core module CM926EJ-S"
- echo -n "#define CONFIG_CM926EJ_S" >> ${config_file}
- echo " 1 /* CPU core is ARM926EJ-S */ " >> ${config_file}
+ echo "#define CONFIG_CM926EJ_S 1 /* CPU core is ARM926EJ-S */" \
+ >> ${config_file}
;;
ap946es_config)
cpu="arm946es"
variant="Core module CM946E-S"
- echo -n "#define CONFIG_CM946E_S" >> ${config_file}
- echo " 1 /* CPU core is ARM946E-S */ " >> ${config_file}
+ echo "#define CONFIG_CM946E_S 1 /* CPU core is ARM946E-S */" \
+ >> ${config_file}
;;
*)
@@ -94,33 +94,26 @@ fi
case "$cpu" in
arm_intcm)
- echo "/* Core module undefined/not ported */" >> ${config_file}
- echo "#define CONFIG_ARM_INTCM 1" >> ${config_file}
- echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> ${config_file}
- echo -n " /* CM may not have " >> ${config_file}
- echo "multiple SSRAM mapping */" >> ${config_file}
- echo -n "#undef CONFIG_CM_SPD_DETECT " >> ${config_file}
- echo -n " /* CM may not support SPD " >> ${config_file}
- echo "query */" >> ${config_file}
- echo -n "#undef CONFIG_CM_REMAP " >> ${config_file}
- echo -n " /* CM may not support " >> ${config_file}
- echo "remapping */" >> ${config_file}
- echo -n "#undef CONFIG_CM_INIT " >> ${config_file}
- echo -n " /* CM may not have " >> ${config_file}
- echo "initialization reg */" >> ${config_file}
- echo -n "#undef CONFIG_CM_TCRAM " >> ${config_file}
- echo " /* CM may not have TCRAM */" >> ${config_file}
- echo -n " /* May not be processor " >> ${config_file}
- echo "without cache support */" >> ${config_file}
- echo "#define CONFIG_SYS_NO_ICACHE 1" >> ${config_file}
- echo "#define CONFIG_SYS_NO_DCACHE 1" >> ${config_file}
+ cat >> ${config_file} << _EOF
+/* Core module undefined/not ported */
+#define CONFIG_ARM_INTCM 1
+#undef CONFIG_CM_MULTIPLE_SSRAM /* CM may not have multiple SSRAM mapping */
+#undef CONFIG_CM_SPD_DETECT /* CM may not support SPD query */
+#undef CONFIG_CM_REMAP /* CM may not support remapping */
+#undef CONFIG_CM_INIT /* CM may not have initialization reg */
+#undef CONFIG_CM_TCRAM /* CM may not have TCRAM */
+/* May not be processor without cache support */
+#define CONFIG_SYS_NO_ICACHE 1
+#define CONFIG_SYS_NO_DCACHE 1
+_EOF
;;
arm720t)
- echo -n " /* May not be processor " >> ${config_file}
- echo "without cache support */" >> ${config_file}
- echo "#define CONFIG_SYS_NO_ICACHE 1" >> ${config_file}
- echo "#define CONFIG_SYS_NO_DCACHE 1" >> ${config_file}
+ cat >> ${config_file} << _EOF
+/* May not be processor without cache support */
+#define CONFIG_SYS_NO_ICACHE 1
+#define CONFIG_SYS_NO_DCACHE 1
+_EOF
;;
esac
@@ -129,12 +122,11 @@ else
# ---------------------------------------------------------
# Set the platform defines
# ---------------------------------------------------------
-echo -n "/* Integrator configuration implied " > ${config_file}
-echo " by Makefile target */" >> ${config_file}
-echo -n "#define CONFIG_INTEGRATOR" >> ${config_file}
-echo " /* Integrator board */" >> ${config_file}
-echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> ${config_file}
-echo " 1 /* Integrator/CP */" >> ${config_file}
+cat >> ${config_file} << _EOF
+/* Integrator configuration implied by Makefile target */
+#define CONFIG_INTEGRATOR /* Integrator board */
+#define CONFIG_ARCH_CINTEGRATOR 1 /* Integrator/CP */
+_EOF
cpu="arm_intcm"
variant="unknown core module"
@@ -163,37 +155,37 @@ else
cp922_XA10_config)
cpu="arm_intcm"
variant="unported core module CM922T_XA10"
- echo -n "#define CONFIG_CM922T_XA10" >> ${config_file}
- echo " 1 /* CPU core is ARM922T_XA10 */" >> ${config_file}
+ echo "#define CONFIG_CM922T_XA10 1 /* CPU core is ARM922T_XA10 */" \
+ >> ${config_file}
;;
cp920t_config)
cpu="arm920t"
variant="Core module CM920T"
- echo -n "#define CONFIG_CM920T" >> ${config_file}
- echo " 1 /* CPU core is ARM920T */" >> ${config_file}
+ echo "#define CONFIG_CM920T 1 /* CPU core is ARM920T */" \
+ >> ${config_file}
;;
cp926ejs_config)
cpu="arm926ejs"
variant="Core module CM926EJ-S"
- echo -n "#define CONFIG_CM926EJ_S" >> ${config_file}
- echo " 1 /* CPU core is ARM926EJ-S */ " >> ${config_file}
+ echo "#define CONFIG_CM926EJ_S 1 /* CPU core is ARM926EJ-S */" \
+ >> ${config_file}
;;
cp946es_config)
cpu="arm946es"
variant="Core module CM946E-S"
- echo -n "#define CONFIG_CM946E_S" >> ${config_file}
- echo " 1 /* CPU core is ARM946E-S */ " >> ${config_file}
+ echo "#define CONFIG_CM946E_S 1 /* CPU core is ARM946E-S */" \
+ >> ${config_file}
;;
cp1136_config)
cpu="arm1136"
variant="Core module CM1136EJF-S"
- echo -n "#define CONFIG_CM1136EJF_S" >> ${config_file}
- echo " 1 /* CPU core is ARM1136JF-S */ " >> ${config_file}
+ echo "#define CONFIG_CM1136EJF_S 1 /* CPU core is ARM1136JF-S */" \
+ >> ${config_file}
;;
*)
@@ -208,22 +200,15 @@ fi
if [ "$cpu" = "arm_intcm" ]
then
- echo "/* Core module undefined/not ported */" >> ${config_file}
- echo "#define CONFIG_ARM_INTCM 1" >> ${config_file}
- echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> ${config_file}
- echo -n " /* CM may not have " >> ${config_file}
- echo "multiple SSRAM mapping */" >> ${config_file}
- echo -n "#undef CONFIG_CM_SPD_DETECT " >> ${config_file}
- echo -n " /* CM may not support SPD " >> ${config_file}
- echo "query */" >> ${config_file}
- echo -n "#undef CONFIG_CM_REMAP " >> ${config_file}
- echo -n " /* CM may not support " >> ${config_file}
- echo "remapping */" >> ${config_file}
- echo -n "#undef CONFIG_CM_INIT " >> ${config_file}
- echo -n " /* CM may not have " >> ${config_file}
- echo "initialization reg */" >> ${config_file}
- echo -n "#undef CONFIG_CM_TCRAM " >> ${config_file}
- echo " /* CM may not have TCRAM */" >> ${config_file}
+ cat >> ${config_file} << _EOF
+/* Core module undefined/not ported */
+#define CONFIG_ARM_INTCM 1
+#undef CONFIG_CM_MULTIPLE_SSRAM /* CM may not have multiple SSRAM mapping */
+#undef CONFIG_CM_SPD_DETECT /* CM may not support SPD query */
+#undef CONFIG_CM_REMAP /* CM may not support remapping */
+#undef CONFIG_CM_INIT /* CM may not have initialization reg */
+#undef CONFIG_CM_TCRAM /* CM may not have TCRAM */
+_EOF
fi
fi # ap
diff --git a/board/armltd/vexpress/Makefile b/board/armltd/vexpress/Makefile
new file mode 100644
index 0000000..ee5c0d8
--- /dev/null
+++ b/board/armltd/vexpress/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := ca9x4_ct_vxp.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c b/board/armltd/vexpress/ca9x4_ct_vxp.c
new file mode 100644
index 0000000..48dfc8c
--- /dev/null
+++ b/board/armltd/vexpress/ca9x4_ct_vxp.c
@@ -0,0 +1,220 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * (C) Copyright 2004
+ * ARM Ltd.
+ * Philippe Robin, <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <netdev.h>
+#include <asm/io.h>
+#include <asm/arch/systimer.h>
+#include <asm/arch/sysctrl.h>
+#include <asm/arch/wdt.h>
+
+static ulong timestamp;
+static ulong lastdec;
+
+static struct wdt *wdt_base = (struct wdt *)WDT_BASE;
+static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
+static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
+
+static void flash__init(void);
+static void vexpress_timer_init(void);
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_SHOW_BOOT_PROGRESS)
+void show_boot_progress(int progress)
+{
+ printf("Boot reached stage %d\n", progress);
+}
+#endif
+
+static inline void delay(ulong loops)
+{
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b" : "=r" (loops) : "0" (loops));
+}
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+ gd->bd->bi_arch_number = MACH_TYPE_VEXPRESS;
+ gd->flags = 0;
+
+ icache_enable();
+ flash__init();
+ vexpress_timer_init();
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}
+
+static void flash__init(void)
+{
+ /* Setup the sytem control register to allow writing to flash */
+ writel(readl(&sysctrl_base->scflashctrl) | VEXPRESS_FLASHPROG_FLVPPEN,
+ &sysctrl_base->scflashctrl);
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = get_ram_size(PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+}
+
+int timer_init(void)
+{
+ return 0;
+}
+
+/*
+ * Start timer:
+ * Setup a 32 bit timer, running at 1KHz
+ * Versatile Express Motherboard provides 1 MHz timer
+ */
+static void vexpress_timer_init(void)
+{
+ /*
+ * Set clock frequency in system controller:
+ * VEXPRESS_REFCLK is 32KHz
+ * VEXPRESS_TIMCLK is 1MHz
+ */
+ writel(SP810_TIMER0_ENSEL | SP810_TIMER1_ENSEL |
+ SP810_TIMER2_ENSEL | SP810_TIMER3_ENSEL |
+ readl(&sysctrl_base->scctrl), &sysctrl_base->scctrl);
+
+ /*
+ * Set Timer0 to be:
+ * Enabled, free running, no interrupt, 32-bit, wrapping
+ */
+ writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
+ writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
+ writel(SYSTIMER_EN | SYSTIMER_32BIT | \
+ readl(&systimer_base->timer0control), \
+ &systimer_base->timer0control);
+
+ reset_timer_masked();
+}
+
+/* Use the ARM Watchdog System to cause reset */
+void reset_cpu(ulong addr)
+{
+ writeb(WDT_EN, &wdt_base->wdogcontrol);
+ writel(WDT_RESET_LOAD, &wdt_base->wdogload);
+ while (1)
+ ;
+}
+
+/*
+ * Delay x useconds AND perserve advance timstamp value
+ * assumes timer is ticking at 1 msec
+ */
+void udelay(ulong usec)
+{
+ ulong tmo, tmp;
+
+ tmo = usec / 1000;
+ tmp = get_timer(0); /* get current timestamp */
+
+ /*
+ * If setting this forward will roll time stamp then
+ * reset "advancing" timestamp to 0 and set lastdec value
+ * otherwise set the advancing stamp to the wake up time
+ */
+ if ((tmo + tmp + 1) < tmp)
+ reset_timer_masked();
+ else
+ tmo += tmp;
+
+ while (get_timer_masked() < tmo)
+ ; /* loop till wakeup event */
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void reset_timer_masked(void)
+{
+ lastdec = readl(&systimer_base->timer0value) / 1000;
+ timestamp = 0;
+}
+
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer_masked(void)
+{
+ ulong now = readl(&systimer_base->timer0value) / 1000;
+
+ if (lastdec >= now) { /* normal mode (non roll) */
+ timestamp += lastdec - now;
+ } else { /* count down timer overflowed */
+ /*
+ * nts = ts + ld - now
+ * ts = old stamp, ld = time before passing through - 1
+ * now = amount of time after passing though - 1
+ * nts = new "advancing time stamp"
+ */
+ timestamp += lastdec + SYSTIMER_RELOAD - now;
+ }
+ lastdec = now;
+
+ return timestamp;
+}
+
+void lowlevel_init(void)
+{
+}
+
+ulong get_board_rev(void){
+ return readl((u32 *)SYS_ID);
+}
diff --git a/board/armltd/vexpress/config.mk b/board/armltd/vexpress/config.mk
new file mode 100644
index 0000000..2d797d7
--- /dev/null
+++ b/board/armltd/vexpress/config.mk
@@ -0,0 +1,23 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# Linux-Kernel is expected to be at 0x60008000
+#
+TEXT_BASE = 0x60800000
+LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds
diff --git a/board/armltd/vexpress/u-boot.lds b/board/armltd/vexpress/u-boot.lds
new file mode 100644
index 0000000..5ac62f2
--- /dev/null
+++ b/board/armltd/vexpress/u-boot.lds
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata))) }
+
+ . = ALIGN(4);
+ .data : { *(.data)
+ __datarel_start = .;
+ *(.data.rel)
+ __datarelrolocal_start = .;
+ *(.data.rel.ro.local)
+ __datarellocal_start = .;
+ *(.data.rel.local)
+ __datarelro_start = .;
+ *(.data.rel.ro)
+ }
+
+ __got_start = .;
+ . = ALIGN(4);
+ .got : { *(.got) }
+ __got_end = .;
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
generated by cgit v1.1 at 2024-12-11 08:12:09 +0000