1 files changed, 0 insertions, 99 deletions
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 06a57f6..778aafc 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -106,105 +106,6 @@ int checkboard(void)
 
 
 /*************************************************************************
- *  long int fixed_sdram()
- *
- ************************************************************************/
-static long int fixed_sdram(void)
-{					/* DDR2 init from BDI2000 script */
-	mtdcr( 0x10, 0x00000021 );	/* MCIF0_MCOPT2 - zero DCEN bit */
-	mtdcr( 0x11, 0x84000000 );
-	mtdcr( 0x10, 0x00000020 );	/* MCIF0_MCOPT1 - no ECC, 64 bits, 4 banks, DDR2 */
-	mtdcr( 0x11, 0x2D122000 );
-	mtdcr( 0x10, 0x00000026 );	/* MCIF0_CODT  - die termination on */
-	mtdcr( 0x11, 0x00800026 );
-	mtdcr( 0x10, 0x00000081 );	/* MCIF0_WRDTR - Write DQS Adv 90 + Fractional DQS Delay */
-	mtdcr( 0x11, 0x82000800 );
-	mtdcr( 0x10, 0x00000080 );	/* MCIF0_CLKTR - advance addr clock by 180 deg */
-	mtdcr( 0x11, 0x80000000 );
-	mtdcr( 0x10, 0x00000040 );	/* MCIF0_MB0CF - turn on CS0, N x 10 coll */
-	mtdcr( 0x11, 0x00000201 );
-	mtdcr( 0x10, 0x00000044 );	/* MCIF0_MB1CF - turn on CS0, N x 10 coll */
-	mtdcr( 0x11, 0x00000201 );
-	mtdcr( 0x10, 0x00000030 );	/* MCIF0_RTR   - refresh every 7.8125uS */
-	mtdcr( 0x11, 0x08200000 );
-	mtdcr( 0x10, 0x00000085 );	/* MCIF0_SDTR1 - timing register 1 */
-	mtdcr( 0x11, 0x80201000 );
-	mtdcr( 0x10, 0x00000086 );	/* MCIF0_SDTR2 - timing register 2 */
-	mtdcr( 0x11, 0x42103242 );
-	mtdcr( 0x10, 0x00000087 );	/* MCIF0_SDTR3 - timing register 3 */
-	mtdcr( 0x11, 0x0C100D14 );
-	mtdcr( 0x10, 0x00000088 );	/* MCIF0_MMODE - CAS is 4 cycles */
-	mtdcr( 0x11, 0x00000642 );
-	mtdcr( 0x10, 0x00000089 );	/* MCIF0_MEMODE - diff DQS disabled */
-	mtdcr( 0x11, 0x00000400 );	/*		  ODT term disabled */
-
-	mtdcr( 0x10, 0x00000050 );	/* MCIF0_INITPLR0 - NOP */
-	mtdcr( 0x11, 0x81b80000 );
-	mtdcr( 0x10, 0x00000051 );	/* MCIF0_INITPLR1 - PRE */
-	mtdcr( 0x11, 0x82100400 );
-	mtdcr( 0x10, 0x00000052 );	/* MCIF0_INITPLR2 - EMR2 */
-	mtdcr( 0x11, 0x80820000 );
-	mtdcr( 0x10, 0x00000053 );	/* MCIF0_INITPLR3 - EMR3 */
-	mtdcr( 0x11, 0x80830000 );
-	mtdcr( 0x10, 0x00000054 );	/* MCIF0_INITPLR4 - EMR DLL ENABLE */
-	mtdcr( 0x11, 0x80810000 );
-	mtdcr( 0x10, 0x00000055 );	/* MCIF0_INITPLR5 - MR DLL RESET */
-	mtdcr( 0x11, 0x80800542 );
-	mtdcr( 0x10, 0x00000056 );	/* MCIF0_INITPLR6 - PRE */
-	mtdcr( 0x11, 0x82100400 );
-	mtdcr( 0x10, 0x00000057 );	/* MCIF0_INITPLR7 - refresh */
-	mtdcr( 0x11, 0x99080000 );
-	mtdcr( 0x10, 0x00000058 );	/* MCIF0_INITPLR8 */
-	mtdcr( 0x11, 0x99080000 );
-	mtdcr( 0x10, 0x00000059 );	/* MCIF0_INITPLR9 */
-	mtdcr( 0x11, 0x99080000 );
-	mtdcr( 0x10, 0x0000005A );	/* MCIF0_INITPLR10 */
-	mtdcr( 0x11, 0x99080000 );
-	mtdcr( 0x10, 0x0000005B );	/* MCIF0_INITPLR11 - MR */
-	mtdcr( 0x11, 0x80800442 );
-	mtdcr( 0x10, 0x0000005C );	/* MCIF0_INITPLR12 - EMR OCD Default */
-	mtdcr( 0x11, 0x80810380 );
-	mtdcr( 0x10, 0x0000005D );	/* MCIF0_INITPLR13 - EMR OCD exit */
-	mtdcr( 0x11, 0x80810000 );
-	udelay( 10*1000 );
-
-	mtdcr( 0x10, 0x00000021 );	/* MCIF0_MCOPT2 - execute preloaded init */
-	mtdcr( 0x11, 0x28000000 );	/*		  set DC_EN */
-	udelay( 100*1000 );
-
-	mtdcr( 0x40, 0x0000F800 );	/* MQ0_B0BAS: base addr 00000000 / 256MB */
-	mtdcr( 0x41, 0x1000F800 );	/* MQ0_B1BAS: base addr 10000000 / 256MB */
-
-	mtdcr( 0x10, 0x00000078 );	/* MCIF0_RDCC - auto set read stage */
-	mtdcr( 0x11, 0x00000000 );
-	mtdcr( 0x10, 0x00000070 );	/* MCIF0_RQDC - read DQS delay control */
-	mtdcr( 0x11, 0x8000003A );	/*		enabled, frac DQS delay */
-	mtdcr( 0x10, 0x00000074 );	/* MCIF0_RFDC - two clock feedback delay */
-	mtdcr( 0x11, 0x00000200 );
-
-	return  512 << 20;
-}
-
-
-/*************************************************************************
- *  long int initdram
- *
- ************************************************************************/
-long int initdram( int board_type )
-{
-	long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram (0);
-#else
-	dram_size = fixed_sdram ();
-#endif
-
-	return  dram_size;
-}
-
-
-/*************************************************************************
  *  int testdram()
  *
  ************************************************************************/