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Diffstat (limited to 'board/amcc/canyonlands/canyonlands.c')
-rw-r--r--board/amcc/canyonlands/canyonlands.c45
1 files changed, 18 insertions, 27 deletions
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index cfc1023..5071c8d 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -40,6 +40,24 @@ DECLARE_GLOBAL_DATA_PTR;
#define BOARD_GLACIER 3
#define BOARD_ARCHES 4
+/*
+ * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * board specific values.
+ */
+#if defined(CONFIG_ARCHES)
+u32 ddr_wrdtr(u32 default_val) {
+ return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_0_DEG | 0x823);
+}
+#else
+u32 ddr_wrdtr(u32 default_val) {
+ return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_180_DEG_ADV | 0x823);
+}
+
+u32 ddr_clktr(u32 default_val) {
+ return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
+}
+#endif
+
#if defined(CONFIG_ARCHES)
/*
* FPGA read/write helper macros
@@ -286,18 +304,6 @@ int checkboard(void)
}
#endif /* !defined(CONFIG_ARCHES) */
-/*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
- * board specific values.
- */
-u32 ddr_wrdtr(u32 default_val) {
- return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_180_DEG_ADV | 0x823);
-}
-
-u32 ddr_clktr(u32 default_val) {
- return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
-}
-
#if defined(CONFIG_NAND_U_BOOT)
/*
* NAND booting U-Boot version uses a fixed initialization, since the whole
@@ -579,23 +585,8 @@ extern void __ft_board_setup(void *blob, bd_t *bd);
void ft_board_setup(void *blob, bd_t *bd)
{
- u32 val[4];
- int rc;
-
__ft_board_setup(blob, bd);
- /* Fixup NOR mapping */
- val[0] = CONFIG_SYS_NOR_CS; /* chip select number */
- val[1] = 0; /* always 0 */
- val[2] = CONFIG_SYS_FLASH_BASE_PHYS_L; /* we fixed up this address */
- val[3] = gd->bd->bi_flashsize;
- rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
- val, sizeof(val), 1);
- if (rc) {
- printf("Unable to update property NOR mapping, err=%s\n",
- fdt_strerror(rc));
- }
-
if (gd->board_type == BOARD_CANYONLANDS_SATA) {
/*
* When SATA is selected we need to disable the first PCIe