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-rw-r--r--board/amcc/bamboo/bamboo.c126
-rw-r--r--board/amcc/bamboo/u-boot-nand.lds8
-rw-r--r--board/amcc/bamboo/u-boot.lds8
3 files changed, 71 insertions, 71 deletions
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index c4eace5..5077187 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -280,86 +280,86 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
#define EBC0_BNAP_SMALL_FLASH \
EBC0_BNAP_BME_DISABLED | \
EBC0_BNAP_TWT_ENCODE(6) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(1) | \
- EBC0_BNAP_WBN_ENCODE(1) | \
- EBC0_BNAP_WBF_ENCODE(3) | \
- EBC0_BNAP_TH_ENCODE(1) | \
- EBC0_BNAP_RE_ENABLED | \
- EBC0_BNAP_SOR_DELAYED | \
- EBC0_BNAP_BEM_WRITEONLY | \
+ EBC0_BNAP_CSN_ENCODE(0) | \
+ EBC0_BNAP_OEN_ENCODE(1) | \
+ EBC0_BNAP_WBN_ENCODE(1) | \
+ EBC0_BNAP_WBF_ENCODE(3) | \
+ EBC0_BNAP_TH_ENCODE(1) | \
+ EBC0_BNAP_RE_ENABLED | \
+ EBC0_BNAP_SOR_DELAYED | \
+ EBC0_BNAP_BEM_WRITEONLY | \
EBC0_BNAP_PEN_DISABLED
#define EBC0_BNCR_SMALL_FLASH_CS0 \
- EBC0_BNCR_BAS_ENCODE(0xFFF00000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
+ EBC0_BNCR_BAS_ENCODE(0xFFF00000) | \
+ EBC0_BNCR_BS_1MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_8BIT
#define EBC0_BNCR_SMALL_FLASH_CS4 \
- EBC0_BNCR_BAS_ENCODE(0x87F00000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
+ EBC0_BNCR_BAS_ENCODE(0x87F00000) | \
+ EBC0_BNCR_BS_1MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_8BIT
/* Large Flash or SRAM */
#define EBC0_BNAP_LARGE_FLASH_OR_SRAM \
- EBC0_BNAP_BME_DISABLED | \
- EBC0_BNAP_TWT_ENCODE(8) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(1) | \
- EBC0_BNAP_WBN_ENCODE(1) | \
- EBC0_BNAP_WBF_ENCODE(1) | \
- EBC0_BNAP_TH_ENCODE(2) | \
- EBC0_BNAP_SOR_DELAYED | \
- EBC0_BNAP_BEM_RW | \
+ EBC0_BNAP_BME_DISABLED | \
+ EBC0_BNAP_TWT_ENCODE(8) | \
+ EBC0_BNAP_CSN_ENCODE(0) | \
+ EBC0_BNAP_OEN_ENCODE(1) | \
+ EBC0_BNAP_WBN_ENCODE(1) | \
+ EBC0_BNAP_WBF_ENCODE(1) | \
+ EBC0_BNAP_TH_ENCODE(2) | \
+ EBC0_BNAP_SOR_DELAYED | \
+ EBC0_BNAP_BEM_RW | \
EBC0_BNAP_PEN_DISABLED
-#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0 \
- EBC0_BNCR_BAS_ENCODE(0xFF800000) | \
- EBC0_BNCR_BS_8MB | \
- EBC0_BNCR_BU_RW | \
+#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0 \
+ EBC0_BNCR_BAS_ENCODE(0xFF800000) | \
+ EBC0_BNCR_BS_8MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_16BIT
-#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4 \
- EBC0_BNCR_BAS_ENCODE(0x87800000) | \
- EBC0_BNCR_BS_8MB | \
- EBC0_BNCR_BU_RW | \
+#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4 \
+ EBC0_BNCR_BAS_ENCODE(0x87800000) | \
+ EBC0_BNCR_BS_8MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_16BIT
/* NVRAM - FPGA */
#define EBC0_BNAP_NVRAM_FPGA \
- EBC0_BNAP_BME_DISABLED | \
- EBC0_BNAP_TWT_ENCODE(9) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(1) | \
- EBC0_BNAP_WBN_ENCODE(1) | \
- EBC0_BNAP_WBF_ENCODE(0) | \
- EBC0_BNAP_TH_ENCODE(2) | \
- EBC0_BNAP_RE_ENABLED | \
- EBC0_BNAP_SOR_DELAYED | \
- EBC0_BNAP_BEM_WRITEONLY | \
+ EBC0_BNAP_BME_DISABLED | \
+ EBC0_BNAP_TWT_ENCODE(9) | \
+ EBC0_BNAP_CSN_ENCODE(0) | \
+ EBC0_BNAP_OEN_ENCODE(1) | \
+ EBC0_BNAP_WBN_ENCODE(1) | \
+ EBC0_BNAP_WBF_ENCODE(0) | \
+ EBC0_BNAP_TH_ENCODE(2) | \
+ EBC0_BNAP_RE_ENABLED | \
+ EBC0_BNAP_SOR_DELAYED | \
+ EBC0_BNAP_BEM_WRITEONLY | \
EBC0_BNAP_PEN_DISABLED
#define EBC0_BNCR_NVRAM_FPGA_CS5 \
- EBC0_BNCR_BAS_ENCODE(0x80000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
+ EBC0_BNCR_BAS_ENCODE(0x80000000) | \
+ EBC0_BNCR_BS_1MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_8BIT
/* Nand Flash */
#define EBC0_BNAP_NAND_FLASH \
- EBC0_BNAP_BME_DISABLED | \
- EBC0_BNAP_TWT_ENCODE(3) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(0) | \
- EBC0_BNAP_WBN_ENCODE(0) | \
- EBC0_BNAP_WBF_ENCODE(0) | \
- EBC0_BNAP_TH_ENCODE(1) | \
- EBC0_BNAP_RE_ENABLED | \
- EBC0_BNAP_SOR_NOT_DELAYED | \
- EBC0_BNAP_BEM_RW | \
+ EBC0_BNAP_BME_DISABLED | \
+ EBC0_BNAP_TWT_ENCODE(3) | \
+ EBC0_BNAP_CSN_ENCODE(0) | \
+ EBC0_BNAP_OEN_ENCODE(0) | \
+ EBC0_BNAP_WBN_ENCODE(0) | \
+ EBC0_BNAP_WBF_ENCODE(0) | \
+ EBC0_BNAP_TH_ENCODE(1) | \
+ EBC0_BNAP_RE_ENABLED | \
+ EBC0_BNAP_SOR_NOT_DELAYED | \
+ EBC0_BNAP_BEM_RW | \
EBC0_BNAP_PEN_DISABLED
@@ -367,22 +367,22 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
/* NAND0 */
#define EBC0_BNCR_NAND_FLASH_CS1 \
- EBC0_BNCR_BAS_ENCODE(0x90000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
+ EBC0_BNCR_BAS_ENCODE(0x90000000) | \
+ EBC0_BNCR_BS_1MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_32BIT
/* NAND1 - Bank2 */
#define EBC0_BNCR_NAND_FLASH_CS2 \
- EBC0_BNCR_BAS_ENCODE(0x94000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
+ EBC0_BNCR_BAS_ENCODE(0x94000000) | \
+ EBC0_BNCR_BS_1MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_32BIT
/* NAND1 - Bank3 */
#define EBC0_BNCR_NAND_FLASH_CS3 \
- EBC0_BNCR_BAS_ENCODE(0x94000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
+ EBC0_BNCR_BAS_ENCODE(0x94000000) | \
+ EBC0_BNCR_BS_1MB | \
+ EBC0_BNCR_BU_RW | \
EBC0_BNCR_BW_32BIT
int board_early_init_f(void)
diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds
index e5de203..cbdc0b0 100644
--- a/board/amcc/bamboo/u-boot-nand.lds
+++ b/board/amcc/bamboo/u-boot-nand.lds
@@ -31,11 +31,11 @@ SECTIONS
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
+ .rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
diff --git a/board/amcc/bamboo/u-boot.lds b/board/amcc/bamboo/u-boot.lds
index 53617b2..25d917a 100644
--- a/board/amcc/bamboo/u-boot.lds
+++ b/board/amcc/bamboo/u-boot.lds
@@ -43,11 +43,11 @@ SECTIONS
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
+ .rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
generated by cgit v1.1 at 2024-11-16 06:39:06 +0000