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diff --git a/board/alaska/README b/board/alaska/README new file mode 100644 index 0000000..3345073 --- /dev/null +++ b/board/alaska/README @@ -0,0 +1,482 @@ +Freescale Alaska MPC8220 board +============================== + +TsiChung Liew(Tsi-Chung.Liew@freescale.com) +Created 9/21/04 +=========================================== + + +Changed files: +============== + +- Makefile added MPC8220 and Alaska8220_config +- MAKEALL added MPC8220 and Alaska8220 +- README added CONFIG_MPC8220, Alaska8220_config + +- common/cmd_bdinfo.c added board information members for MPC8220 +- common/cmd_bootm.c added clocks for MPC8220 in do_bootm_linux() + +- include/common.h added CONFIG_MPC8220 + +- include/asm-ppc/u-boot.h added board information members for MPC8220 +- include/asm-ppc/global_data.h added global variables - inp_clk, pci_clk, + vco_clk, pev_clk, flb_clk, and bExtUart + +- arch/powerpc/lib/board.c added CONFIG_MPC8220 support + +- net/eth.c added FEC support for MPC8220 + +Added files: +============ +- board/alaska directory for Alaska MPC8220 +- board/alaska/alaska.c Alaska dram and BATs setup +- board/alaska/extserial.c external serial (debug card serial) support +- board/alaska/flash.c Socket (AMD) and Onboard (INTEL) flash support +- board/alaska/serial.c to determine which int/ext serial to use +- board/alaska/Makefile Makefile +- board/alaska/config.mk config make +- board/alaska/u-boot.lds Linker description + +- arch/powerpc/cpu/mpc8220/dma.h multi-channel dma header file +- arch/powerpc/cpu/mpc8220/dramSetup.h dram setup header file +- arch/powerpc/cpu/mpc8220/fec.h MPC8220 FEC header file +- arch/powerpc/cpu/mpc8220/cpu.c cpu specific code +- arch/powerpc/cpu/mpc8220/cpu_init.c Flexbus ChipSelect and Mux pins setup +- arch/powerpc/cpu/mpc8220/dramSetup.c MPC8220 DDR SDRAM setup +- arch/powerpc/cpu/mpc8220/fec.c MPC8220 FEC driver +- arch/powerpc/cpu/mpc8220/i2c.c MPC8220 I2C driver +- arch/powerpc/cpu/mpc8220/interrupts.c interrupt support (not enable) +- arch/powerpc/cpu/mpc8220/loadtask.c load dma +- arch/powerpc/cpu/mpc8220/speed.c system, pci, flexbus, pev, and cpu clock +- arch/powerpc/cpu/mpc8220/traps.c exception +- arch/powerpc/cpu/mpc8220/uart.c MPC8220 UART driver +- arch/powerpc/cpu/mpc8220/Makefile Makefile +- arch/powerpc/cpu/mpc8220/config.mk config make +- arch/powerpc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program +- arch/powerpc/cpu/mpc8220/io.S io functions +- arch/powerpc/cpu/mpc8220/start.S start up + +- include/mpc8220.h + +- include/asm-ppc/immap_8220.h + +- include/configs/Alaska8220.h + + +1. SWITCH SETTINGS +================== +1.1 SW1: 0 - Boot from Socket Flash (AMD) or 1 - Onboard Flash (INTEL) + SW2: 0 - Select MPC8220 UART or 1 - Debug Card UART + SW3: unsed + SW4: 0 - 1284 or 1 - FEC1 + SW5: 0 - PEV or 1 - FEC2 + + +2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL +=========================================== +2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and + linux kernel, you can customize it based on your system requirements: + DDR: 0x00000000-0x1fffffff (max 512MB) + MBAR: 0xf0000000-0xf0027fff (128KB) + CPLD: 0xf1000000-0xf103ffff (256KB) + FPGA: 0xf2000000-0xf203ffff (256KB) + Flash: 0xfe000000-0xffffffff (max 32MB) + +3. DEFINITIONS AND COMPILATION +============================== +3.1 Explanation on NEW definitions in include/configs/alaska8220.h + CONFIG_MPC8220 MPC8220 specific + CONFIG_ALASKA8220 Alaska board specific + CONFIG_SYS_MPC8220_CLKIN Define Alaska Input Clock + CONFIG_PSC_CONSOLE Enable MPC8220 UART + CONFIG_EXTUART_CONSOLE Enable External 16552 UART + CONFIG_SYS_AMD_BOOT To determine the u-boot is booted from AMD or Intel + CONFIG_SYS_MBAR MBAR base address + CONFIG_SYS_DEFAULT_MBAR Reset MBAR base address + +3.2 Compilation + export CROSS_COMPILE=cross-compile-prefix + cd u-boot-1-1-x + make distclean + make Alaska8220_config + make + + +4. SCREEN DUMP +============== +4.1 Alaska MPC8220 board + Boot from AMD (NOTE: May not show exactly the same) + +U-Boot 1.1.1 (Sep 22 2004 - 22:14:41) + +CPU: MPC8220 (JTAG ID 1640301d) at 300 MHz + Bus 120 MHz, CPU 300 MHz, PCI 30 MHz, VCO 480 MHz +Board: Alaska MPC8220 Evaluation Board +I2C: 93 kHz, ready +DRAM: 256 MB +Reserving 167k for U-Boot at: 0ffd6000 +FLASH: 16.5 MB +*** Warning - bad CRC, using default environment + +In: serial +Out: serial +Err: serial +Net: FEC ETHERNET +=> flinfo + +Bank # 1: INTEL 28F128J3A + Size: 8 MB in 64 Sectors + Sector Start Addresses: + FE000000 FE020000 FE040000 FE060000 FE080000 + FE0A0000 FE0C0000 FE0E0000 FE100000 FE120000 + FE140000 FE160000 FE180000 FE1A0000 FE1C0000 + FE1E0000 FE200000 FE220000 FE240000 FE260000 + FE280000 FE2A0000 FE2C0000 FE2E0000 FE300000 + FE320000 FE340000 FE360000 FE380000 FE3A0000 + FE3C0000 FE3E0000 FE400000 FE420000 FE440000 + FE460000 FE480000 FE4A0000 FE4C0000 FE4E0000 + FE500000 FE520000 FE540000 FE560000 FE580000 + FE5A0000 FE5C0000 FE5E0000 FE600000 FE620000 + FE640000 FE660000 FE680000 FE6A0000 FE6C0000 + FE6E0000 FE700000 FE720000 FE740000 FE760000 + FE780000 FE7A0000 FE7C0000 FE7E0000 + +Bank # 2: INTEL 28F128J3A + Size: 8 MB in 64 Sectors + Sector Start Addresses: + FE800000 FE820000 FE840000 FE860000 FE880000 + FE8A0000 FE8C0000 FE8E0000 FE900000 FE920000 + FE940000 FE960000 FE980000 FE9A0000 FE9C0000 + FE9E0000 FEA00000 FEA20000 FEA40000 FEA60000 + FEA80000 FEAA0000 FEAC0000 FEAE0000 FEB00000 + FEB20000 FEB40000 FEB60000 FEB80000 FEBA0000 + FEBC0000 FEBE0000 FEC00000 FEC20000 FEC40000 + FEC60000 FEC80000 FECA0000 FECC0000 FECE0000 + FED00000 FED20000 FED40000 FED60000 FED80000 + FEDA0000 FEDC0000 FEDE0000 FEE00000 FEE20000 + FEE40000 FEE60000 FEE80000 FEEA0000 FEEC0000 + FEEE0000 FEF00000 (RO) FEF20000 (RO) FEF40000 FEF60000 + FEF80000 FEFA0000 FEFC0000 FEFE0000 (RO) + +Bank # 3: AMD AMD29F040B + Size: 0 MB in 7 Sectors + Sector Start Addresses: + FFF00000 (RO) FFF10000 (RO) FFF20000 (RO) FFF30000 FFF40000 + FFF50000 FFF60000 + +Bank # 4: AMD AMD29F040B + Size: 0 MB in 1 Sectors + Sector Start Addresses: + FFF70000 (RO) +=> bdinfo + +memstart = 0xF0009800 +memsize = 0x10000000 +flashstart = 0xFFF00000 +flashsize = 0x01080000 +flashoffset = 0x00025000 +sramstart = 0xF0020000 +sramsize = 0x00008000 +bootflags = 0x00000001 +intfreq = 300 MHz +busfreq = 120 MHz +inpfreq = 30 MHz +flbfreq = 30 MHz +pcifreq = 30 MHz +vcofreq = 480 MHz +pevfreq = 81 MHz +ethaddr = 00:E0:0C:BC:E0:60 +eth1addr = 00:E0:0C:BC:E0:61 +IP addr = 192.162.1.2 +baudrate = 115200 bps +=> printenv +bootargs=root=/dev/ram rw +bootdelay=5 +baudrate=115200 +ethaddr=00:e0:0c:bc:e0:60 +eth1addr=00:e0:0c:bc:e0:61 +ipaddr=192.162.1.2 +serverip=192.162.1.1 +gatewayip=192.162.1.1 +netmask=255.255.255.0 +hostname=Alaska +stdin=serial +stdout=serial +stderr=serial +ethact=FEC ETHERNET + +Environment size: 268/65532 bytes +=> setenv ipaddr 192.160.1.2 +=> setenv serverip 192.160.1.1 +=> setenv gatewayip 192.160.1.1 +=> saveenv +Saving Environment to Flash... + +. +Un-Protected 1 sectors +Erasing Flash... +Erasing sector 0 ... done +Erased 1 sectors +Writing to Flash... done + +. +Protected 1 sectors +=> tftp 0x10000 linux.elf +Using FEC ETHERNET device +TFTP from server 192.160.1.1; our IP address is 192.160.1.2; sending through gateway 192.160.1.1 +Filename 'linux.elf'. +Load address: 0x10000 +Loading: invalid RARP header +################################################################# + ################################################################# + ################################################################# + ################################################################# + ################################################################# + ################################################################# + ################################################################# + ################################################################# + ################################################## +done +Bytes transferred = 2917494 (2c8476 hex) +=> bootelf +Loading .text @ 0x00a00000 (23820 bytes) +Loading .data @ 0x00a06000 (2752512 bytes) +Clearing .bss @ 0x00ca6000 (12764 bytes) +## Starting application at 0x00a00000 ... + +Collect some entropy from RAM........done +loaded at: 00A00000 00CA91DC +zimage at: 00A06A93 00AD7756 +initrd at: 00AD8000 00CA5565 +avail ram: 00CAA000 014AA000 + +Linux/PPC load: ip=off console=ttyS0,115200 +Uncompressing Linux...done. +Now booting the kernel +Total memory in system: 256 MB +Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual: 0Mb +Linux version 2.4.21-rc1 (r61688@bluesocks.sps.mot.com) (gcc version 3.3.1) #17 Wed Sep 8 11:49:16 CDT 2004 +Motorola Alaska port (C) 2003 Motorola, Inc. +CPLD rev 3 +CPLD switches 0x1b +Set Pin Mux for FEC1 +Set Pin Mux for FEC2 +Alaska Pin Multiplexing: +Port Configuration Register 0 = 0 +Port Configuration Register 1 = 0 +Port Configuration Register 2 = 0 +Port Configuration Register 3 = 50000000 +Port Configuration Register 3 - PCI = 51400180 +Setup Alaska FPGA PIC: +Interrupt Enable Register *(u32) = 0 +Interrupt Status Register = 2f0000 +Interrupt Enable Register in_be32 = 0 +Interrupt Status Register = 2f0000 +Interrupt Enable Register in_le32 = 0 +Interrupt Status Register = 2f00 +Interrupt Enable Register readl = 0 +Interrupt Status Register = 2f00 +Interrupt Enable Register = 0 +Interrupt Status Register = 2f0000 +Setup Alaska PCI Controller: +On node 0 totalpages: 65536 +zone(0): 65536 pages. +zone(1): 0 pages. +zone(2): 0 pages. +Kernel command line: ip=off console=ttyS0,115200 +Using XLB clock (120.00 MHz) to set up decrementer +Calibrating delay loop... 199.88 BogoMIPS +Memory: 254792k available (1476k kernel code, 708k data, 228k init, 0k highmem) +Dentry cache hash table entries: 32768 (order: 6, 262144 bytes) +Inode cache hash table entries: 16384 (order: 5, 131072 bytes) +Mount cache hash table entries: 512 (order: 0, 4096 bytes) +Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes) +Page-cache hash table entries: 65536 (order: 6, 262144 bytes) +POSIX conformance testing by UNIFIX +PCI: Probing PCI hardware +PCI: (pcibios_init) Global-Hose = 0xc029d000 +Scanning bus 00 +Fixups for bus 00 +Bus scan for 00 returning with max=00 +PCI: (pcibios_init) finished pci_scan_bus(hose->first_busno = 0, hose->ops = c01a1a74, hose = c029d000) +PCI: (pcibios_init) PCI Bus Count = 0 =?= Next Bus# = 1 +PCI: (pcibios_init@pci_fixup_irqs) finished machine dependent PCI interrupt routing! +PCI: bridge rsrc 81000000..81ffffff (100), parent c01a7f88 +PCI: bridge rsrc 84000000..87ffffff (200), parent c01a7fa4 +PCI: (pcibios_init) finished allocating and assigning resources! +initDma! +Using 90 DMA buffer descriptors +descUsed f0023600, descriptors f002360c freeSram f0024140 +unmask SDMA tasks: 0xf0008018 = 0x6f000000 +Linux NET4.0 for Linux 2.4 +Based upon Swansea University Computer Society NET3.039 +Initializing RT netlink socket +Starting kswapd +Journalled Block Device driver loaded +JFFS version 1.0, (C) 1999, 2000 Axis Communications AB +JFFS2 version 2.1. (C) 2001 Red Hat, Inc., designed by Axis Communications AB. +pty: 256 Unix98 ptys configured +tracek: Copyright (C) Motorola, 2003. +Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled +ttyS00 at 0xf1001008 (irq = 73) is a ST16650 +ttyS01 at 0xf1001010 (irq = 74) is a ST16650 +elp-fpanel: Copyright (C) Motorola, 2003. +fpanel: fpanelWait timeout +elp-engine: Copyright (C) Motorola, 2003. +Video disabled due to configuration switch 4 +Alpine 1284 driver: Copyright (C) Motorola, 2003. +1284 disabled due to configuration switch 5 +Alpine USB driver: Copyright (C) Motorola, 2003. +OK +USB: Descriptor download completed OK +enable_irq(41) unbalanced +enable_irq(75) unbalanced +elp-dmaram: Copyright (C) Motorola, 2003. +Total memory in system: 256 MB +elp_dmaram: offset is 0x10000000, size is 0 +Xicor NVRAM driver: Copyright (C) Motorola, 2003. +elp-video: Copyright (C) Motorola, 2003. +Video disabled due to configuration switch 4 +elp-pfm: Copyright (C) Motorola, 2003. +paddle: Copyright (C) Motorola, 2001, present. +RAMDISK driver initialized: 16 RAM disks of 12288K size 1024 blocksize +loop: loaded (max 8 devices) +PPP generic driver version 2.4.2 +PPP Deflate Compression module registered +Uniform Multi-Platform E-IDE driver Revision: 7.00beta-2.4 +ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx +init_alaska_mtd: chip probing count 0 +cfi_cmdset_0001: Erase suspend on write enabled +Using buffer write method +init_alaska_mtd: bank1, name:ALASKA0, size:16777216bytes +ALASKA flash0: Using Static image partition definition +Creating 3 MTD partitions on "ALASKA0": +0x00000000-0x00280000 : "kernel" +0x00280000-0x00fe0000 : "user" +0x00fe0000-0x01000000 : "signature" +mgt_fec_module_init +mgt_fec_init() +mgt_fec_init +mgt_init_fec_dev(0xc05f6000,0) +dev c05f6000 fec_priv c05f6160 fec f0009000 +mgt_init_fec_dev(0xc05f6800,1) +dev c05f6800 fec_priv c05f6960 fec f0009800 +NET4: Linux TCP/IP 1.0 for NET4.0 +IP Protocols: ICMP, UDP, TCP, IGMP +IP: routing cache hash table of 2048 buckets, 16Kbytes +TCP: Hash tables configured (established 16384 bind 32768) +NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. +RAMDISK: Compressed image found at block 0 +Freeing initrd memory: 1845k freed +JFFS: Trying to mount a non-mtd device. +VFS: Mounted root (romfs filesystem) readonly. +Freeing unused kernel memory: 228k init +INIT: version 2.78 booting +INIT: Entering runlevel: 1 +"Space, a great big place of unknown stuff." -Dexter, for our MotD. +[01/Jan/1970:00:00:01 +0000] boa: server version Boa/0.94.8.3 +[01/Jan/1970:00:00:01 +0000] boa: server built Sep 7 2004 at 17:40:55. +[01/Jan/1970:00:00:01 +0000] boa: starting server pid=28, port 80 +Mounting flash filesystem, will take a minute... +/etc/rc: line 30: /dev/lp0: No such devish-2.05b# +sh-2.05b# ifup eth0 +client (v0.9.9-pre) started +adapter index 2 +adapter hardware address 00:e0:0c:bc:e0:60 +execle'ing /usr/share/udhcpc/default.script +/sbin/ifconfig eth0 +eth0 Link encap:Ethernet HWaddr 00:E0:0C:BC:E0:60 + BROADCAST MULTICAST MTU:1500 Metric:1 + mgt_fec_open + Rfec request irq +X fec_open: rcv_ring_size 8, xmt_ring_size 8 +packmgt_fec_open(): call netif_start_queue() +ets:0 errors:0 dropped:0 overruns:0 frame:0 + TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 + collisions:0 txqueuelen:100 + RX bytes:0 (0.0 b) TX bytes:0 (0.0 b) + Base address:0x9000 + +/sbin/ifconfig eth0 up +entering raw listen mode +Opening raw socket on ifindex 2 +adding option 0x35 +adding option 0x3d +adding option 0x3c +Sending discover... +Waiting on select... +unrelated/bogus packet +Waiting on select... +oooooh!!! got some! +adding option 0x35 +adding option 0x3d +adding option 0x3c +adding option 0x32 +adding option 0x36 +Sending select for 163.12.48.146... +Waiting on select... +oooooh!!! got some! +Waiting on select... +oooooh!!! got some! +Lease of 163.12.48.146 obtained, lease time 345600 +execle'ing /usr/share/udhcpc/default.script +/sbin/ifconfig eth0 163.12.48.146 netmask 255.255.254.0 +/sbin/ifconfig eth0 up +deleting routers +/sbin/route del default +/sbin/route add default gw 163.12.49.254 dev eth0 +adding dns 163.12.252.230 +adding dns 192.55.22.4 +adding dns 192.5.249.4 +entering none listen mode +sh-2.05b# + +5. REPROGRAM U-BOOT +=================== +5.1 Reprogram u-boot (boot from AMD) + 1. Unprotect the boot sector + => protect off bank 3 + 2. Download new u-boot binary file + => tftp 0x10000 u-boot.bin + 3. Erase bootsector (max 7 sectors) + => erase 0xfff00000 0xfff6ffff + 4. Program the u-boot to flash + => cp.b 0x10000 0xfff00000 + 5. Reset for the new u-boot to take place + => reset + +5.2 Reprogram u-boot (boot from AMD program at INTEL) + 1. Unprotect the boot sector + => protect off bank 2 + 2. Download new u-boot binary file + => tftp 0x10000 u-boot.bin + 3. Erase bootsector (max 7 sectors) + => erase 0xfef00000 0xfefdffff + 4. Program the u-boot to flash + => cp.b 0x10000 0xfef00000 + 5. Reset for the new u-boot to take place + => reset + +5.3 Reprogram u-boot (boot from INTEL) + 1. Unprotect the boot sector + => protect off bank 4 + 2. Download new u-boot binary file + => tftp 0x10000 u-boot.bin + 3. Erase bootsector (max 7 sectors) + => erase 0xfff00000 0xfffdffff + 4. Program the u-boot to flash + => cp.b 0x10000 0xfff00000 + 5. Reset for the new u-boot to take place + => reset + +5.4 Reprogram u-boot (boot from INTEL program at AMD) + 1. Unprotect the boot sector + => protect off bank 1 + 2. Download new u-boot binary file + => tftp 0x10000 u-boot.bin + 3. Erase bootsector (max 7 sectors) + => erase 0xfe080000 0xfe0effff + 4. Program the u-boot to flash + => cp.b 0x10000 0xfe080000 + 5. Reset for the new u-boot to take place + => reset |