diff options
Diffstat (limited to 'board/BuR/tseries')
| -rw-r--r-- | board/BuR/tseries/board.c | 3 | ||||
| -rw-r--r-- | board/BuR/tseries/mux.c | 14 |
2 files changed, 13 insertions, 4 deletions
diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c index 89e989f..d1d698e 100644 --- a/board/BuR/tseries/board.c +++ b/board/BuR/tseries/board.c @@ -128,6 +128,9 @@ void am33xx_spl_board_init(void) i2c_set_bus_num(0); i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); pmicsetup(0); + + gpio_direction_output(64+29, 1); /* switch NAND_RnB to GPMC_WAIT1 */ + gpio_direction_output(64+28, 1); /* switch MII2_CRS to GPMC_WAIT0 */ } const struct dpll_params *get_dpll_ddr_params(void) diff --git a/board/BuR/tseries/mux.c b/board/BuR/tseries/mux.c index ac7e885..c5dc4b7 100644 --- a/board/BuR/tseries/mux.c +++ b/board/BuR/tseries/mux.c @@ -17,8 +17,10 @@ #include <i2c.h> static struct module_pin_mux uart0_pin_mux[] = { + /* UART0_RTS */ + {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)}, /* UART0_CTS */ - {OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, + {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* UART0_TXD */ @@ -26,9 +28,13 @@ static struct module_pin_mux uart0_pin_mux[] = { {-1}, }; static struct module_pin_mux uart1_pin_mux[] = { - /* UART0_RXD */ + /* UART1_RTS as I2C2-SCL */ + {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, + /* UART1_CTS as I2C2-SDA */ + {OFFSET(uart1_ctsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, + /* UART1_RXD */ {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, - /* UART0_TXD */ + /* UART1_TXD */ {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, {-1}, }; @@ -123,7 +129,7 @@ static struct module_pin_mux nand_pin_mux[] = { {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ - {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ + {OFFSET(gpmc_clk), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ |