4 files changed, 27 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 88983f4..17f1975 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -1,6 +1,8 @@
 config ARCH_LS1021A
 	bool
 	select SYS_FSL_ERRATUM_A010315
+	select SYS_FSL_SRDS_1
+	select SYS_HAS_SERDES
 
 menu "LS102xA architecture"
 	depends on ARCH_LS1021A
@@ -23,6 +25,15 @@ config MAX_CPUS
 config SYS_FSL_ERRATUM_A010315
 	bool "Workaround for PCIe erratum A010315"
 
+config SYS_FSL_SRDS_1
+	bool
+
+config SYS_FSL_SRDS_2
+	bool
+
+config SYS_HAS_SERDES
+	bool
+
 config SYS_FSL_IFC_BANK_COUNT
 	int "Maximum banks of Integrated flash controller"
 	depends on ARCH_LS1021A
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 7aae397..28589ae 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -14,16 +14,23 @@ config ARCH_LS1046A
 	bool
 	select FSL_LSCH2
 	select SYS_FSL_ERRATUM_A010539
+	select SYS_FSL_SRDS_2
 
 config ARCH_LS2080A
 	bool
 	select FSL_LSCH3
+	select SYS_FSL_HAS_DP_DDR
+	select SYS_FSL_SRDS_2
 
 config FSL_LSCH2
 	bool
+	select SYS_FSL_SRDS_1
+	select SYS_HAS_SERDES
 
 config FSL_LSCH3
 	bool
+	select SYS_FSL_SRDS_1
+	select SYS_HAS_SERDES
 
 menu "Layerscape architecture"
 	depends on FSL_LSCH2 || FSL_LSCH3
@@ -65,4 +72,13 @@ config SYS_FSL_IFC_BANK_COUNT
 config SYS_FSL_HAS_DP_DDR
 	bool
 
+config SYS_FSL_SRDS_1
+	bool
+
+config SYS_FSL_SRDS_2
+	bool
+
+config SYS_HAS_SERDES
+	bool
+
 endmenu
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 6ee75cb..3039e72 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -32,8 +32,6 @@
 #ifdef CONFIG_LS2080A
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS		{ 1, 1, 4, 4 }
 #define	SRDS_MAX_LANES	8
-#define CONFIG_SYS_FSL_SRDS_1
-#define CONFIG_SYS_FSL_SRDS_2
 #define CONFIG_SYS_PAGE_SIZE		0x10000
 #ifndef L1_CACHE_BYTES
 #define L1_CACHE_SHIFT		6
@@ -162,8 +160,6 @@
 #define CONFIG_SYS_FSL_PEX_LUT_BE
 #define CONFIG_SYS_FSL_SEC_BE
 
-#define CONFIG_SYS_FSL_SRDS_1
-
 /* SoC related */
 #ifdef CONFIG_LS1043A
 #define CONFIG_SYS_FMAN_V3
@@ -212,7 +208,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE  ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED           CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_SRDS_2
 #define CONFIG_SYS_FSL_IFC_BE
 #define CONFIG_SYS_FSL_SFP_VER_3_2
 #define CONFIG_SYS_FSL_SNVS_LE
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 70cc703..dfcb546 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -120,8 +120,6 @@
 
 #define DCU_LAYER_MAX_NUM			16
 
-#define CONFIG_SYS_FSL_SRDS_1
-
 #ifdef CONFIG_LS102XA
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT		8
 #define CONFIG_NUM_DDR_CONTROLLERS		1