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-rw-r--r--arch/arm/include/asm/arch-davinci/da8xx_common.h4
-rw-r--r--arch/arm/include/asm/arch-davinci/hardware.h4
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-davinci/da8xx_common.h b/arch/arm/include/asm/arch-davinci/da8xx_common.h
index bc3092d..e52f613 100644
--- a/arch/arm/include/asm/arch-davinci/da8xx_common.h
+++ b/arch/arm/include/asm/arch-davinci/da8xx_common.h
@@ -30,4 +30,8 @@ void irq_init(void);
int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
int n_items);
+#if defined(CONFIG_DRIVER_TI_EMAC) && defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+void da850_emac_mii_mode_sel(int mode_sel);
+#endif
+
#endif /* __COMMON_H */
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index ef616c1..b95fa97 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -152,6 +152,10 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_BOOTCFG_BASE 0x01c14000
#define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18)
+#define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38)
+#define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c)
+#define GPIO_BANK2_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x40)
+#define GPIO_BANK2_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x44)
#endif /* CONFIG_SOC_DA8XX */
/* Power and Sleep Controller (PSC) Domains */