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-rw-r--r--arch/arm/mach-at91/Kconfig6
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/armv7/clock.c11
-rw-r--r--arch/arm/mach-at91/bootparams_atmel.S18
-rw-r--r--arch/arm/mach-at91/include/mach/clk.h2
-rw-r--r--arch/arm/mach-at91/include/mach/sama5_sfr.h24
-rw-r--r--arch/arm/mach-at91/include/mach/sama5d2.h17
-rw-r--r--arch/arm/mach-at91/spl.c36
8 files changed, 115 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 9ce775e..73a9c74 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -71,6 +71,11 @@ config TARGET_AT91SAM9X5EK
select CPU_ARM926EJS
select SUPPORT_SPL
+config TARGET_SAMA5D2_PTC
+ bool "SAMA5D2 PTC board"
+ select CPU_V7
+ select SUPPORT_SPL
+
config TARGET_SAMA5D2_XPLAINED
bool "SAMA5D2 Xplained board"
select CPU_V7
@@ -138,6 +143,7 @@ source "board/atmel/at91sam9m10g45ek/Kconfig"
source "board/atmel/at91sam9n12ek/Kconfig"
source "board/atmel/at91sam9rlek/Kconfig"
source "board/atmel/at91sam9x5ek/Kconfig"
+source "board/atmel/sama5d2_ptc/Kconfig"
source "board/atmel/sama5d2_xplained/Kconfig"
source "board/atmel/sama5d3_xplained/Kconfig"
source "board/atmel/sama5d3xek/Kconfig"
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 4424523..d2abf31 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -9,7 +9,7 @@ obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
-obj-$(CONFIG_SAMA5D2) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
+obj-$(CONFIG_SAMA5D2) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
obj-y += spl.o
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 81e9f69..76fcada 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -162,6 +162,11 @@ int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
if (div > 0xff)
return -EINVAL;
+ if (clk_source == GCK_CSS_UPLL_CLK) {
+ if (at91_upll_clk_enable())
+ return -ENODEV;
+ }
+
writel(id, &pmc->pcr);
regval = readl(&pmc->pcr);
regval &= ~AT91_PMC_PCR_GCKCSS;
@@ -231,6 +236,12 @@ u32 at91_get_periph_generated_clk(u32 id)
case AT91_PMC_PCR_GCKCSS_PLLA_CLK:
freq = gd->arch.plla_rate_hz;
break;
+ case AT91_PMC_PCR_GCKCSS_UPLL_CLK:
+ freq = AT91_UTMI_PLL_CLK_FREQ;
+ break;
+ case AT91_PMC_PCR_GCKCSS_MCK_CLK:
+ freq = gd->arch.mck_rate_hz;
+ break;
default:
printf("Improper GCK clock source selection!\n");
freq = 0;
diff --git a/arch/arm/mach-at91/bootparams_atmel.S b/arch/arm/mach-at91/bootparams_atmel.S
new file mode 100644
index 0000000..568094b
--- /dev/null
+++ b/arch/arm/mach-at91/bootparams_atmel.S
@@ -0,0 +1,18 @@
+/*
+ * Atmel SAMA5Dx boot parameter handling
+ *
+ * Copyright (c) 2016 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm-offsets.h>
+#include <config.h>
+#include <asm/system.h>
+#include <linux/linkage.h>
+
+ENTRY(save_boot_params)
+ ldr r0, =bootrom_stash
+ str r4, [r0, #0]
+ b save_boot_params_ret
+ENDPROC(save_boot_params)
diff --git a/arch/arm/mach-at91/include/mach/clk.h b/arch/arm/mach-at91/include/mach/clk.h
index 8577c74..ca7d7d0 100644
--- a/arch/arm/mach-at91/include/mach/clk.h
+++ b/arch/arm/mach-at91/include/mach/clk.h
@@ -20,6 +20,8 @@
#define GCK_CSS_MCK_CLK 4
#define GCK_CSS_AUDIO_CLK 5
+#define AT91_UTMI_PLL_CLK_FREQ 480000000
+
static inline unsigned long get_cpu_clk_rate(void)
{
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h b/arch/arm/mach-at91/include/mach/sama5_sfr.h
index b040256..b805a2c 100644
--- a/arch/arm/mach-at91/include/mach/sama5_sfr.h
+++ b/arch/arm/mach-at91/include/mach/sama5_sfr.h
@@ -32,6 +32,30 @@ struct atmel_sfr {
#define ATMEL_SFR_DDRCFG_FDQIEN 0x00010000
#define ATMEL_SFR_DDRCFG_FDQSIEN 0x00020000
+/* Bit field in EBICFG */
+#define AT91_SFR_EBICFG_DRIVE0 (0x3 << 0)
+#define AT91_SFR_EBICFG_DRIVE0_LOW (0x0 << 0)
+#define AT91_SFR_EBICFG_DRIVE0_MEDIUM (0x2 << 0)
+#define AT91_SFR_EBICFG_DRIVE0_HIGH (0x3 << 0)
+#define AT91_SFR_EBICFG_PULL0 (0x3 << 2)
+#define AT91_SFR_EBICFG_PULL0_UP (0x0 << 2)
+#define AT91_SFR_EBICFG_PULL0_NONE (0x1 << 2)
+#define AT91_SFR_EBICFG_PULL0_DOWN (0x3 << 2)
+#define AT91_SFR_EBICFG_SCH0 (0x1 << 4)
+#define AT91_SFR_EBICFG_SCH0_OFF (0x0 << 4)
+#define AT91_SFR_EBICFG_SCH0_ON (0x1 << 4)
+#define AT91_SFR_EBICFG_DRIVE1 (0x3 << 8)
+#define AT91_SFR_EBICFG_DRIVE1_LOW (0x0 << 8)
+#define AT91_SFR_EBICFG_DRIVE1_MEDIUM (0x2 << 8)
+#define AT91_SFR_EBICFG_DRIVE1_HIGH (0x3 << 8)
+#define AT91_SFR_EBICFG_PULL1 (0x3 << 10)
+#define AT91_SFR_EBICFG_PULL1_UP (0x0 << 10)
+#define AT91_SFR_EBICFG_PULL1_NONE (0x1 << 10)
+#define AT91_SFR_EBICFG_PULL1_DOWN (0x3 << 10)
+#define AT91_SFR_EBICFG_SCH1 (0x1 << 12)
+#define AT91_SFR_EBICFG_SCH1_OFF (0x0 << 12)
+#define AT91_SFR_EBICFG_SCH1_ON (0x1 << 12)
+
/* Bit field in AICREDIR */
#define ATMEL_SFR_AICREDIR_NSAIC 0x00000001
diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
index dd5a2a7..ee841da 100644
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -135,7 +135,11 @@
/*
* Address Memory Space
*/
+#define ATMEL_BASE_CS0 0x10000000
#define ATMEL_BASE_DDRCS 0x20000000
+#define ATMEL_BASE_CS1 0x60000000
+#define ATMEL_BASE_CS2 0x70000000
+#define ATMEL_BASE_CS3 0x80000000
#define ATMEL_BASE_QSPI0_AES_MEM 0x90000000
#define ATMEL_BASE_QSPI1_AES_MEM 0x98000000
#define ATMEL_BASE_SDMMC0 0xa0000000
@@ -165,6 +169,7 @@
*/
#define ATMEL_BASE_PMECC (ATMEL_BASE_HSMC + 0x70)
#define ATMEL_BASE_PMERRLOC (ATMEL_BASE_HSMC + 0x500)
+#define ATMEL_BASE_SMC (ATMEL_BASE_HSMC + 0x700)
#define ATMEL_BASE_PIOB (ATMEL_BASE_PIOA + 0x40)
#define ATMEL_BASE_PIOC (ATMEL_BASE_PIOB + 0x40)
@@ -225,6 +230,18 @@
/* No PMECC Galois table in ROM */
#define NO_GALOIS_TABLE_IN_ROM
+/* Boot modes stored by BootROM in r4 */
+#define ATMEL_SAMA5D2_BOOT_FROM_OFF 0
+#define ATMEL_SAMA5D2_BOOT_FROM_MASK 0xf
+#define ATMEL_SAMA5D2_BOOT_FROM_SPI (0 << 0)
+#define ATMEL_SAMA5D2_BOOT_FROM_MCI (1 << 0)
+#define ATMEL_SAMA5D2_BOOT_FROM_SMC (2 << 0)
+#define ATMEL_SAMA5D2_BOOT_FROM_TWI (3 << 0)
+#define ATMEL_SAMA5D2_BOOT_FROM_QSPI (4 << 0)
+
+#define ATMEL_SAMA5D2_BOOT_DEV_ID_OFF 4
+#define ATMEL_SAMA5D2_BOOT_DEV_ID_MASK 0xf
+
#ifndef __ASSEMBLY__
unsigned int get_chip_id(void);
unsigned int get_extension_chip_id(void);
diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c
index 27a405a..c4ed224 100644
--- a/arch/arm/mach-at91/spl.c
+++ b/arch/arm/mach-at91/spl.c
@@ -23,6 +23,40 @@ void at91_disable_wdt(void)
}
#endif
+#if defined(CONFIG_SAMA5D2)
+struct {
+ u32 r4;
+} bootrom_stash __attribute__((section(".data")));
+
+u32 spl_boot_device(void)
+{
+ u32 dev = (bootrom_stash.r4 >> ATMEL_SAMA5D2_BOOT_FROM_OFF) &
+ ATMEL_SAMA5D2_BOOT_FROM_MASK;
+ u32 off = (bootrom_stash.r4 >> ATMEL_SAMA5D2_BOOT_DEV_ID_OFF) &
+ ATMEL_SAMA5D2_BOOT_DEV_ID_MASK;
+
+#if defined(CONFIG_SYS_USE_MMC)
+ if (dev == ATMEL_SAMA5D2_BOOT_FROM_MCI) {
+ if (off == 0)
+ return BOOT_DEVICE_MMC1;
+ if (off == 1)
+ return BOOT_DEVICE_MMC2;
+ printf("ERROR: MMC controller %i not present!\n", dev);
+ hang();
+ }
+#endif
+
+#if defined(CONFIG_SYS_USE_SERIALFLASH) || defined(CONFIG_SYS_USE_SPIFLASH)
+ if (dev == ATMEL_SAMA5D2_BOOT_FROM_SPI)
+ return BOOT_DEVICE_SPI;
+#endif
+
+ printf("ERROR: SMC/TWI/QSPI boot device not supported!\n"
+ " Boot device %i, controller number %i\n", dev, off);
+
+ return BOOT_DEVICE_NONE;
+}
+#else
u32 spl_boot_device(void)
{
#ifdef CONFIG_SYS_USE_MMC
@@ -34,12 +68,14 @@ u32 spl_boot_device(void)
#endif
return BOOT_DEVICE_NONE;
}
+#endif
u32 spl_boot_mode(void)
{
switch (spl_boot_device()) {
#ifdef CONFIG_SYS_USE_MMC
case BOOT_DEVICE_MMC1:
+ case BOOT_DEVICE_MMC2:
return MMCSD_MODE_FS;
break;
#endif
generated by cgit v1.1 at 2024-10-30 14:11:44 +0000