diff options
Diffstat (limited to 'arch')
160 files changed, 988 insertions, 1172 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 788d4c1..9b4e581 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -56,9 +56,16 @@ PLATFORM_CPPFLAGS += $(call cc-option,\ # For EABI, make sure to provide raise() ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS))) -# This file is parsed several times; make sure to add only once. -ifeq (,$(findstring arch/arm/lib/eabi_compat.o,$(PLATFORM_LIBS))) -PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o +# This file is parsed many times, so the string may get added multiple +# times. Also, the prefix needs to be different based on whether +# CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry +# before adding the correct one. +ifdef CONFIG_SPL_BUILD +PLATFORM_LIBS := $(SPLTREE)/arch/arm/lib/eabi_compat.o \ + $(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS)) +else +PLATFORM_LIBS := $(OBJTREE)/arch/arm/lib/eabi_compat.o \ + $(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS)) endif endif diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 4ebf38d..248431b 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -23,6 +23,7 @@ #include <common.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/clock.h> #include <asm/io.h> static u32 mx31_decode_pll(u32 reg, u32 infreq) @@ -60,7 +61,7 @@ static u32 mx31_get_mcu_main_clk(void) return mx31_get_mpl_dpdgck_clk(); } -u32 mx31_get_ipg_clk(void) +static u32 mx31_get_ipg_clk(void) { u32 freq = mx31_get_mcu_main_clk(); u32 pdr0 = __REG(CCM_PDR0); @@ -78,6 +79,24 @@ void mx31_dump_clocks(void) printf("ipg clock : %dHz\n", mx31_get_ipg_clk()); } +unsigned int mxc_get_clock(enum mxc_clock clk) +{ + switch (clk) { + case MXC_ARM_CLK: + return mx31_get_mcu_main_clk(); + case MXC_IPG_CLK: + case MXC_CSPI_CLK: + case MXC_UART_CLK: + return mx31_get_ipg_clk(); + } + return -1; +} + +u32 imx_get_uartclk(void) +{ + return mxc_get_clock(MXC_UART_CLK); +} + void mx31_gpio_mux(unsigned long mode) { unsigned long reg, shift, tmp; diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index c4bc3b3..c05a39d 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -106,18 +106,6 @@ int timer_init (void) return 0; } -void reset_timer_masked (void) -{ - /* reset time */ - gd->lastinc = GPTCNT; /* capture current incrementer value time */ - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long long get_ticks (void) { ulong now = GPTCNT; /* current tick value */ @@ -147,11 +135,6 @@ ulong get_timer (ulong base) return get_timer_masked () - base; } -void set_timer (ulong t) -{ - gd->tbl = time_to_tick(t); -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm1136/mx35/Makefile b/arch/arm/cpu/arm1136/mx35/Makefile index 20f36e3..284cdc5 100644 --- a/arch/arm/cpu/arm1136/mx35/Makefile +++ b/arch/arm/cpu/arm1136/mx35/Makefile @@ -50,14 +50,3 @@ include $(SRCTREE)/rules.mk sinclude $(obj).depend ######################################################################### - -$(TOPDIR)/include/asm/arch/asm-offsets.h: $(TOPDIR)/include/autoconf.mk.dep \ - ./asm-offsets.s - @echo Generating $@ - $(TOPDIR)/tools/scripts/make-asm-offsets ./asm-offsets.s $@ - -asm-offsets.s: $(TOPDIR)/include/autoconf.mk.dep \ - ./asm-offsets.c - $(CC) -DDO_DEPS_ONLY \ - $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \ - -o $@ ./asm-offsets.c -c -S diff --git a/arch/arm/cpu/arm1136/mx35/timer.c b/arch/arm/cpu/arm1136/mx35/timer.c index db1e2c9..80c0675 100644 --- a/arch/arm/cpu/arm1136/mx35/timer.c +++ b/arch/arm/cpu/arm1136/mx35/timer.c @@ -73,11 +73,6 @@ inline ulong get_timer_masked(void) return val; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { ulong tmp; @@ -92,10 +87,6 @@ ulong get_timer(ulong base) return (tmp / 1000) - base; } -void set_timer(ulong t) -{ -} - /* * delay x useconds AND preserve advance timstamp value * GPTCNT is now supposed to tick 1 by 1 us. diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c b/arch/arm/cpu/arm1136/omap24xx/timer.c index 228ceba..73bf4a7 100644 --- a/arch/arm/cpu/arm1136/omap24xx/timer.c +++ b/arch/arm/cpu/arm1136/omap24xx/timer.c @@ -41,6 +41,13 @@ DECLARE_GLOBAL_DATA_PTR; +static void reset_timer_masked (void) +{ + /* reset time */ + gd->lastinc = READ_TIMER; /* capture current incrementer value time */ + gd->tbl = 0; /* start "advancing" time stamp from 0 */ +} + int timer_init (void) { int32_t val; @@ -57,21 +64,11 @@ int timer_init (void) /* * timer without interrupts */ -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - gd->tbl = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { @@ -95,13 +92,6 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked (void) -{ - /* reset time */ - gd->lastinc = READ_TIMER; /* capture current incrementer value time */ - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked (void) { ulong now = READ_TIMER; /* current tick value */ diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 200a800..f5a1134 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -33,7 +33,7 @@ #include <version.h> .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD ldr pc, _hang ldr pc, _hang ldr pc, _hang @@ -68,7 +68,7 @@ _not_used: .word not_used _irq: .word irq _fiq: .word fiq _pad: .word 0x12345678 /* now 16*4=64 */ -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .global _end_vect _end_vect: @@ -201,7 +201,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -243,7 +243,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -255,7 +255,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ /* * We are done. Do not return, instead branch to second part of board @@ -329,7 +329,7 @@ cpu_init_crit: mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* ************************************************************************* * @@ -436,17 +436,17 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ /* * exception handlers */ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* use 32 words about stack */ bl hang /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else /* !CONFIG_SPL_BUILD */ .align 5 undefined_instruction: get_bad_stack @@ -519,4 +519,4 @@ arm1136_cache_flush: mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache #endif mov pc, lr @ back to caller -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c index 9768319..f16a37b 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c @@ -135,18 +135,6 @@ ulong get_tbclk(void) return (ulong)(timer_load_val / 100); } -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = read_timer(); - timestamp = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { unsigned long long res = get_ticks(); @@ -159,11 +147,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ)); -} - void __udelay(unsigned long usec) { unsigned long long tmp; diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index b095f22..0aa613d 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -263,7 +263,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -343,7 +343,7 @@ skip_hw_init: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm1176/tnetv107x/timer.c b/arch/arm/cpu/arm1176/tnetv107x/timer.c index a7a400d..b3123c5 100644 --- a/arch/arm/cpu/arm1176/tnetv107x/timer.c +++ b/arch/arm/cpu/arm1176/tnetv107x/timer.c @@ -60,15 +60,6 @@ int timer_init(void) return 0; } -void reset_timer(void) -{ - lastinc = timestamp = 0; - - __raw_writel(0, ®s->tcr); - __raw_writel(0, ®s->tim34); - __raw_writel(2 << 22, ®s->tcr); -} - static ulong get_timer_raw(void) { ulong now = __raw_readl(®s->tim34); @@ -88,11 +79,6 @@ ulong get_timer(ulong base) return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - unsigned long long get_ticks(void) { return get_timer(0); diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index eb8d425..fa9c5a2 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -209,21 +209,11 @@ int timer_init (void) #if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292) -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo; @@ -243,13 +233,6 @@ void __udelay (unsigned long usec) #endif } -void reset_timer_masked (void) -{ - /* reset time */ - lastdec = READ_TIMER; - timestamp = 0; -} - ulong get_timer_masked (void) { ulong now = READ_TIMER; diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c index b4dc4a6..bd6a5b1 100644 --- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c +++ b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c @@ -148,7 +148,7 @@ unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer) /* Command 16 to read aBlocks from the MMC/SD - caed */ unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF}; - /* The addres on the MMC/SD-card is in bytes, + /* The address on the MMC/SD-card is in bytes, addr is transformed from blocks to bytes and the result is placed into the command */ @@ -173,7 +173,7 @@ unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer) /* Command 24 to write a block to the MMC/SD - card */ unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF}; - /* The addres on the MMC/SD-card is in bytes, + /* The address on the MMC/SD-card is in bytes, addr is transformed from blocks to bytes and the result is placed into the command */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index e774c3f..ecb92ef 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -178,7 +178,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -220,7 +220,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -274,7 +274,7 @@ _dynsym_start_ofs: #if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) -/* Interupt-Controller base addresses */ +/* Interrupt-Controller base addresses */ INTMR1: .word 0x80000280 @ 32 bit size INTMR2: .word 0x80001280 @ 16 bit size INTMR3: .word 0x80002280 @ 8 bit size diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c index 95cb8fd..443d31d 100644 --- a/arch/arm/cpu/arm920t/a320/timer.c +++ b/arch/arm/cpu/arm920t/a320/timer.c @@ -81,12 +81,6 @@ void reset_timer_masked(void) debug("%s(): lastdec = %lx\n", __func__, lastdec); } -void reset_timer(void) -{ - debug("%s()\n", __func__); - reset_timer_masked(); -} - /* * return timer ticks */ @@ -132,12 +126,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - debug("%s(%lx)\n", __func__, t); - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c index f0ad7d6..91607b5 100644 --- a/arch/arm/cpu/arm920t/at91/timer.c +++ b/arch/arm/cpu/arm920t/at91/timer.c @@ -59,7 +59,7 @@ int timer_init(void) when the value in TC_RC is reached */ writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr); - writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */ + writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */ writel(TIMER_LOAD_VAL, &tc->tc[0].rc); writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr); @@ -72,35 +72,16 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - void __udelay(unsigned long usec) { udelay_masked(usec); } -void reset_timer_masked(void) -{ - /* reset time */ - at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; - gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff; - gd->tbl = 0; -} - ulong get_timer_raw(void) { at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; diff --git a/arch/arm/cpu/arm920t/at91rm9200/spi.c b/arch/arm/cpu/arm920t/at91rm9200/spi.c index f3cb5d8..c70efc6 100644 --- a/arch/arm/cpu/arm920t/at91rm9200/spi.c +++ b/arch/arm/cpu/arm920t/at91rm9200/spi.c @@ -108,6 +108,7 @@ void AT91F_SpiEnable(int cs) unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) { unsigned int timeout; + unsigned long start; pDesc->state = BUSY; @@ -132,12 +133,12 @@ unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) } /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); timeout = 0; AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && - ((timeout = get_timer_masked() ) < CONFIG_SYS_SPI_WRITE_TOUT)); + ((timeout = get_timer(start) ) < CONFIG_SYS_SPI_WRITE_TOUT)); AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; pDesc->state = IDLE; diff --git a/arch/arm/cpu/arm920t/at91rm9200/timer.c b/arch/arm/cpu/arm920t/at91rm9200/timer.c index 9c54bbe..fbe74b6 100644 --- a/arch/arm/cpu/arm920t/at91rm9200/timer.c +++ b/arch/arm/cpu/arm920t/at91rm9200/timer.c @@ -71,34 +71,16 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { udelay_masked(usec); } -void reset_timer_masked (void) -{ - /* reset time */ - lastinc = READ_TIMER; - timestamp = 0; -} - ulong get_timer_raw (void) { ulong now = READ_TIMER; diff --git a/arch/arm/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c index 4a0ce4d..a3990a7 100644 --- a/arch/arm/cpu/arm920t/ep93xx/timer.c +++ b/arch/arm/cpu/arm920t/ep93xx/timer.c @@ -91,17 +91,6 @@ unsigned long get_timer(unsigned long base) return get_timer_masked() - base; } -void reset_timer_masked(void) -{ - read_timer(); - timer.ticks = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - void __udelay(unsigned long usec) { unsigned long long target; @@ -128,7 +117,9 @@ int timer_init(void) writel(TIMER_ENABLE | TIMER_CLKSEL, &timer_regs->timer3.control); - reset_timer_masked(); + /* Reset the timer */ + read_timer(); + timer.ticks = 0; return 0; } diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c index b06b518..6141bd4 100644 --- a/arch/arm/cpu/arm920t/imx/timer.c +++ b/arch/arm/cpu/arm920t/imx/timer.c @@ -43,7 +43,9 @@ int timer_init (void) TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */ TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */ - reset_timer_masked(); + /* Reset the timer */ + TCTL1 &= ~TCTL_TEN; + TCTL1 |= TCTL_TEN; /* Enable timer */ return (0); } @@ -51,28 +53,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked() - base; } -void set_timer (ulong t) -{ - /* nop */ -} - -void reset_timer_masked (void) -{ - TCTL1 &= ~TCTL_TEN; - TCTL1 |= TCTL_TEN; /* Enable timer */ -} - ulong get_timer_masked (void) { return TCN1; diff --git a/arch/arm/cpu/arm920t/ks8695/timer.c b/arch/arm/cpu/arm920t/ks8695/timer.c index 886e370..234fe91 100644 --- a/arch/arm/cpu/arm920t/ks8695/timer.c +++ b/arch/arm/cpu/arm920t/ks8695/timer.c @@ -33,7 +33,11 @@ ulong timer_ticks; int timer_init (void) { - reset_timer(); + /* Set the hadware timer for 1ms */ + ks8695_write(KS8695_TIMER1, TIMER_COUNT); + ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); + ks8695_write(KS8695_TIMER_CTRL, 0x2); + timer_ticks = 0; return 0; } @@ -46,20 +50,6 @@ int timer_init (void) #define TIMER_COUNT (TIMER_INTERVAL / 2) #define TIMER_PULSE TIMER_COUNT -void reset_timer_masked(void) -{ - /* Set the hadware timer for 1ms */ - ks8695_write(KS8695_TIMER1, TIMER_COUNT); - ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); - ks8695_write(KS8695_TIMER_CTRL, 0x2); - timer_ticks = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { /* Check for timer wrap */ @@ -76,11 +66,6 @@ ulong get_timer(ulong base) return (get_timer_masked() - base); } -void set_timer(ulong t) -{ - timer_ticks = t; -} - void __udelay(ulong usec) { ulong start = get_timer_masked(); diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c index f17b7ea..9571870 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/timer.c +++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c @@ -83,22 +83,11 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo; @@ -112,13 +101,6 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = READ_TIMER(); - timestamp = 0; -} - ulong get_timer_masked(void) { ulong tmr = get_ticks(); diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index a7476b0..0090f89 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -142,11 +142,11 @@ copyex: # if defined(CONFIG_S3C2400) # define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ +# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */ # define CLKDIVN 0x14800014 /* clock divisor register */ #else # define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ +# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */ # define INTSUBMSK 0x4A00001C # define CLKDIVN 0x4C000014 /* clock divisor register */ # endif @@ -221,7 +221,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -263,7 +263,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 39f2e99..23ccf31 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -215,7 +215,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -257,7 +257,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm925t/timer.c b/arch/arm/cpu/arm925t/timer.c index 7dfe2b5..1b9386b 100644 --- a/arch/arm/cpu/arm925t/timer.c +++ b/arch/arm/cpu/arm925t/timer.c @@ -56,7 +56,9 @@ int timer_init (void) CONFIG_SYS_TIMERBASE + CNTL_TIMER); /* init the timestamp and lastdec value */ - reset_timer_masked(); + lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / + (TIMER_CLOCK / CONFIG_SYS_HZ); + timestamp = 0; /* start "advancing" time stamp from 0 */ return 0; } @@ -64,22 +66,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { @@ -96,14 +87,6 @@ void __udelay (unsigned long usec) } } -void reset_timer_masked (void) -{ - /* reset time */ - lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / - (TIMER_CLOCK / CONFIG_SYS_HZ); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked (void) { uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c b/arch/arm/cpu/arm926ejs/armada100/timer.c index 5d911c5..82a6d7b 100644 --- a/arch/arm/cpu/arm926ejs/armada100/timer.c +++ b/arch/arm/cpu/arm926ejs/armada100/timer.c @@ -77,13 +77,6 @@ ulong read_timer(void) return(readl(&armd1timers->cvwr)); } -void reset_timer_masked(void) -{ - /* reset time */ - gd->tbl = read_timer(); - gd->tbu = 0; -} - ulong get_timer_masked(void) { ulong now = read_timer(); @@ -100,22 +93,12 @@ ulong get_timer_masked(void) return gd->tbu; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) - base); } -void set_timer(ulong t) -{ - gd->tbu = t; -} - void __udelay(unsigned long usec) { ulong delayticks; @@ -152,7 +135,8 @@ int timer_init(void) /* Enable timer 0 */ writel(0x1, &armd1timers->cer); /* init the gd->tbu and gd->tbl value */ - reset_timer_masked(); + gd->tbl = read_timer(); + gd->tbu = 0; return 0; } diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c index 1c6fa4a..8b1734c 100644 --- a/arch/arm/cpu/arm926ejs/davinci/timer.c +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c @@ -78,11 +78,6 @@ int timer_init(void) return(0); } -void reset_timer(void) -{ - gd->timer_reset_value = get_ticks(); -} - /* * Get the current 64 bit timer tick count */ diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c b/arch/arm/cpu/arm926ejs/kirkwood/timer.c index 3e80329..b4f6cf8 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c @@ -88,13 +88,6 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->tbl #define lastdec gd->lastinc -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = READ_TIMER; - timestamp = 0; -} - ulong get_timer_masked(void) { ulong now = READ_TIMER; @@ -112,21 +105,11 @@ ulong get_timer_masked(void) return timestamp; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - void __udelay(unsigned long usec) { uint current; @@ -164,7 +147,8 @@ int timer_init(void) writel(cntmrctrl, CNTMR_CTRL_REG); /* init the timestamp and lastdec value */ - reset_timer_masked(); + lastdec = READ_TIMER; + timestamp = 0; return 0; } diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c index 6966b0d..8f38056 100644 --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c +++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c @@ -68,7 +68,9 @@ int timer_init(void) writel(ctrl, &timer->control); - reset_timer_masked(); + /* capture current value time */ + lastdec = readl(&timer->value); + timestamp = 0; /* start "advancing" time stamp from 0 */ return 0; } @@ -94,16 +96,6 @@ unsigned long long get_ticks(void) return timestamp; } -void reset_timer_masked(void) -{ - struct mb86r0x_timer * timer = (struct mb86r0x_timer *) - MB86R0x_TIMER_BASE; - - /* capture current value time */ - lastdec = readl(&timer->value); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked(void) { return tick_to_time(get_ticks()); @@ -121,11 +113,6 @@ void __udelay(unsigned long usec) /*NOP*/; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; diff --git a/arch/arm/cpu/arm926ejs/mx25/Makefile b/arch/arm/cpu/arm926ejs/mx25/Makefile index 38d7f03..9219c06 100644 --- a/arch/arm/cpu/arm926ejs/mx25/Makefile +++ b/arch/arm/cpu/arm926ejs/mx25/Makefile @@ -24,18 +24,18 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o -COBJS = generic.o timer.o -MX27OBJS = reset.o +COBJS = generic.o timer.o reset.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -SRCS += $(addprefix $(SRCTREE)/arch/arm/cpu/arm926ejs/mx27/,$(MX27OBJS:.o=.c)) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(MX27OBJS)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) +$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h + ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c new file mode 100644 index 0000000..ba8dfd4 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c @@ -0,0 +1,60 @@ +/* + * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c + * + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <common.h> +#include <asm/arch/imx-regs.h> + +#include <linux/kbuild.h> + +int main(void) +{ + /* Clock Control Module */ + DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl)); + DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0)); + DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1)); + DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2)); + DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2])); + DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr)); + + /* Enhanced SDRAM Controller */ + DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0)); + DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0)); + DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc)); + + /* Multi-Layer AHB Crossbar Switch */ + DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0)); + DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0)); + DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1)); + DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1)); + DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2)); + DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2)); + DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3)); + DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3)); + DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4)); + DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4)); + DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0)); + DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1)); + DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2)); + DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3)); + DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4)); + + /* AHB <-> IP-Bus Interface */ + DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7)); + DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15)); + + return 0; +} diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c index 14f0c2d..5eb2747 100644 --- a/arch/arm/cpu/arm926ejs/mx25/timer.c +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c @@ -121,20 +121,6 @@ int timer_init(void) return 0; } -void reset_timer_masked(void) -{ - struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE; - /* reset time */ - /* capture current incrementer value time */ - lastinc = readl(&gpt->counter); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long long get_ticks (void) { struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE; @@ -170,11 +156,6 @@ ulong get_timer (ulong base) return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = time_to_tick(t); -} - /* delay x useconds AND preserve advance timstamp value */ void __udelay (unsigned long usec) { @@ -187,3 +168,15 @@ void __udelay (unsigned long usec) while (get_ticks() < tmp) /* loop till event */ /*NOP*/; } + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + ulong tbclk; + + tbclk = CONFIG_MX25_CLK32; + return tbclk; +} diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile index 0e112b3..7ac1a21 100644 --- a/arch/arm/cpu/arm926ejs/mx27/Makefile +++ b/arch/arm/cpu/arm926ejs/mx27/Makefile @@ -34,6 +34,8 @@ all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) +$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h + ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c new file mode 100644 index 0000000..f3a8d7b --- /dev/null +++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c @@ -0,0 +1,45 @@ +/* + * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c + * + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <common.h> +#include <asm/arch/imx-regs.h> + +#include <linux/kbuild.h> + +int main(void) +{ + DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0)); + DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1)); + DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0)); + DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1)); + + DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr)); + DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0)); + DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0)); + DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0)); + DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1)); + DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0)); + DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1)); + + DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0)); + DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0)); + DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1)); + DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1)); + DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc)); + + return 0; +} diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index 27642bf..222a8e9 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -271,7 +271,7 @@ void imx_gpio_mode(int gpio_mode) } #ifdef CONFIG_MXC_UART -void mx27_uart_init_pins(void) +void mx27_uart1_init_pins(void) { int i; unsigned int mode[] = { diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c index 5c1cf01..df76d16 100644 --- a/arch/arm/cpu/arm926ejs/mx27/timer.c +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c @@ -124,20 +124,6 @@ int timer_init(void) return 0; } -void reset_timer_masked(void) -{ - struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE; - /* reset time */ - /* capture current incrementer value time */ - lastinc = readl(®s->gpt_tcn); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long long get_ticks (void) { struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE; @@ -173,11 +159,6 @@ ulong get_timer (ulong base) return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = time_to_tick(t); -} - /* delay x useconds AND preserve advance timstamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm926ejs/nomadik/timer.c b/arch/arm/cpu/arm926ejs/nomadik/timer.c index 1d98ef3..1cd0e1f 100644 --- a/arch/arm/cpu/arm926ejs/nomadik/timer.c +++ b/arch/arm/cpu/arm926ejs/nomadik/timer.c @@ -40,16 +40,12 @@ /* Configure a free-running, auto-wrap counter with no prescaler */ int timer_init(void) { + ulong val; + writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS, CONFIG_SYS_TIMERBASE + MTU_CR(0)); - reset_timer(); - return 0; -} -/* Restart counting from 0 */ -void reset_timer(void) -{ - ulong val; + /* Reset the timer */ writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); /* * The load-register isn't really immediate: it changes on clock @@ -59,6 +55,8 @@ void reset_timer(void) val = READ_TIMER(); while (READ_TIMER() == val) ; + + return 0; } /* Return how many HZ passed since "base" */ diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c index 88a0ee6..390c9c8 100644 --- a/arch/arm/cpu/arm926ejs/omap/timer.c +++ b/arch/arm/cpu/arm926ejs/omap/timer.c @@ -65,22 +65,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index 3e1ff7d..5cc31a9 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -53,7 +53,7 @@ int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ gd->ram_size = get_ram_size( - (volatile long *) orion5x_sdram_bar(0), + (long *) orion5x_sdram_bar(0), CONFIG_MAX_RAM_BANK_SIZE); return 0; } @@ -65,7 +65,7 @@ void dram_init_banksize (void) for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); gd->bd->bi_dram[i].size = get_ram_size( - (volatile long *) (gd->bd->bi_dram[i].start), + (long *) (gd->bd->bi_dram[i].start), CONFIG_MAX_RAM_BANK_SIZE); } } diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c index 9d45260..17df68f 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c @@ -95,13 +95,6 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->tbl #define lastdec gd->lastinc -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = read_timer(); - timestamp = 0; -} - ulong get_timer_masked(void) { ulong now = read_timer(); @@ -119,21 +112,11 @@ ulong get_timer_masked(void) return timestamp; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - static inline ulong uboot_cntr_val(void) { return readl(CNTMR_VAL_REG(UBOOT_CNTR)); @@ -181,5 +164,6 @@ int timer_init(void) void timer_init_r(void) { /* init the timestamp and lastdec value */ - reset_timer_masked(); + lastdec = read_timer(); + timestamp = 0; } diff --git a/arch/arm/cpu/arm926ejs/pantheon/timer.c b/arch/arm/cpu/arm926ejs/pantheon/timer.c index ca7f7f0..c71162a 100644 --- a/arch/arm/cpu/arm926ejs/pantheon/timer.c +++ b/arch/arm/cpu/arm926ejs/pantheon/timer.c @@ -85,13 +85,6 @@ ulong read_timer(void) return val; } -void reset_timer_masked(void) -{ - /* reset time */ - gd->tbl = read_timer(); - gd->tbu = 0; -} - ulong get_timer_masked(void) { ulong now = read_timer(); @@ -108,22 +101,12 @@ ulong get_timer_masked(void) return gd->tbu; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) - base); } -void set_timer(ulong t) -{ - gd->tbu = t; -} - void __udelay(unsigned long usec) { ulong delayticks; @@ -161,7 +144,8 @@ int timer_init(void) /* Enable timer 0 */ writel(0x1, &panthtimers->cer); /* init the gd->tbu and gd->tbl value */ - reset_timer_masked(); + gd->tbl = read_timer(); + gd->tbu = 0; return 0; } diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c index 66cf4de..1dc7860 100644 --- a/arch/arm/cpu/arm926ejs/spear/timer.c +++ b/arch/arm/cpu/arm926ejs/spear/timer.c @@ -68,7 +68,9 @@ int timer_init(void) /* auto reload, start timer */ writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control); - reset_timer_masked(); + /* Reset the timer */ + lastdec = READ_TIMER(); + timestamp = 0; return 0; } @@ -76,22 +78,11 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return (get_timer_masked() / GPT_RESOLUTION) - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - void __udelay(unsigned long usec) { ulong tmo; @@ -108,13 +99,6 @@ void __udelay(unsigned long usec) ; } -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = READ_TIMER(); - timestamp = 0; -} - ulong get_timer_masked(void) { ulong now = READ_TIMER(); diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 0940937..636be75 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -54,7 +54,7 @@ .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD /* No exception handlers in preloader */ ldr pc, _hang ldr pc, _hang @@ -98,7 +98,7 @@ _irq: _fiq: .word fiq -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .balignl 16,0xdeadbeef @@ -214,7 +214,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -256,7 +256,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -343,7 +343,7 @@ cpu_init_crit: mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* ************************************************************************* * @@ -440,18 +440,18 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ /* * exception handlers */ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* switch to abort stack */ 1: bl 1b /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else /* !CONFIG_SPL_BUILD */ .align 5 undefined_instruction: get_bad_stack @@ -514,4 +514,4 @@ fiq: bl do_fiq #endif -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c index 2e243b1..f58e151 100644 --- a/arch/arm/cpu/arm926ejs/versatile/timer.c +++ b/arch/arm/cpu/arm926ejs/versatile/timer.c @@ -94,22 +94,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 0054b22..09374d5 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -186,7 +186,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -228,7 +228,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 2fd3b9a..1a93277 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -182,7 +182,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -224,7 +224,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/armv7/mx5/Makefile b/arch/arm/cpu/armv7/mx5/Makefile index e8be9c9..6e13cc3 100644 --- a/arch/arm/cpu/armv7/mx5/Makefile +++ b/arch/arm/cpu/armv7/mx5/Makefile @@ -45,4 +45,6 @@ include $(SRCTREE)/rules.mk sinclude $(obj).depend +lowlevel_init.o : $(TOPDIR)/include/asm/arch/asm-offsets.h + ######################################################################### diff --git a/arch/arm/cpu/armv7/mx5/asm-offsets.c b/arch/arm/cpu/armv7/mx5/asm-offsets.c new file mode 100644 index 0000000..f972498 --- /dev/null +++ b/arch/arm/cpu/armv7/mx5/asm-offsets.c @@ -0,0 +1,76 @@ +/* + * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c + * + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <common.h> +#include <asm/arch/imx-regs.h> + +#include <linux/kbuild.h> + +int main(void) +{ + + /* Round up to make sure size gives nice stack alignment */ + DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr)); + DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr)); + DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr)); + DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr)); + DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr)); + DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr)); + DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr)); + DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1)); + DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2)); + DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1)); + DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr)); + DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr)); + DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr)); + DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr)); + DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2)); + DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3)); + DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4)); + DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr)); + DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr)); + DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr)); + DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor)); + DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr)); + DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr)); + DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr)); + DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr)); + DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr)); + DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0)); + DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1)); + DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2)); + DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3)); + DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4)); + DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5)); + DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6)); + DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor)); +#if defined(CONFIG_MX53) + DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7)); +#endif + + /* DPLL */ + DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl)); + DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config)); + DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op)); + DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd)); + DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn)); + DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op)); + DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd)); + DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn)); + + return 0; +} diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 96ebfe2..94de9f1 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -39,10 +39,14 @@ orr r0, r0, #(1 << 23) /* disable write allocate combine */ orr r0, r0, #(1 << 22) /* disable write allocate */ - cmp r3, #0x10 /* r3 contains the silicon rev */ +#if defined(CONFIG_MX51) + ldr r1, =0x0 + ldr r3, [r1, #ROM_SI_REV] + cmp r3, #0x10 /* disable write combine for TO 2 and lower revs */ orrls r0, r0, #(1 << 25) +#endif mcr 15, 1, r0, c9, c0, 2 .endm /* init_l2cc */ diff --git a/arch/arm/cpu/armv7/mx5/timer.c b/arch/arm/cpu/armv7/mx5/timer.c index 1972f64..2544b08 100644 --- a/arch/arm/cpu/armv7/mx5/timer.c +++ b/arch/arm/cpu/armv7/mx5/timer.c @@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR; int timer_init(void) { int i; + ulong val; /* setup GP Timer 1 */ __raw_writel(GPTCR_SWR, &cur_gpt->control); @@ -65,20 +66,12 @@ int timer_init(void) /* Freerun Mode, PERCLK1 input */ i = __raw_readl(&cur_gpt->control); __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control); - reset_timer_masked(); - return 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} -void reset_timer_masked(void) -{ - ulong val = __raw_readl(&cur_gpt->counter); + val = __raw_readl(&cur_gpt->counter); lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ); timestamp = 0; + + return 0; } ulong get_timer_masked(void) @@ -99,11 +92,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 59bbca8..9f8bc93 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -55,7 +55,9 @@ int timer_init(void) writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, &timer_base->tclr); - reset_timer_masked(); /* init the timestamp and lastinc value */ + /* reset time, capture current incrementer value time */ + gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); + gd->tbl = 0; /* start "advancing" time stamp from 0 */ return 0; } @@ -63,21 +65,11 @@ int timer_init(void) /* * timer without interrupts */ -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - /* delay x useconds */ void __udelay(unsigned long usec) { @@ -94,13 +86,6 @@ void __udelay(unsigned long usec) } } -void reset_timer_masked(void) -{ - /* reset time, capture current incrementer value time */ - gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked(void) { /* current tick value */ diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index b750d16..359c21f 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -50,21 +50,11 @@ int timer_init(void) /* * timer without interrupts */ -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long get_timer(unsigned long base) { return get_timer_masked() - base; } -void set_timer(unsigned long t) -{ - gd->tbl = t; -} - /* delay x useconds */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 0e698b6..5c87e9c 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -182,7 +182,7 @@ stack_setup: mov sp, r4 adr r0, _start -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD cmp r0, r6 beq clear_bss /* skip relocation */ #endif @@ -196,7 +196,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -248,7 +248,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ /* * We are done. Do not return, instead branch to second part of board @@ -283,6 +283,7 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /************************************************************************* * * CPU_init_critical registers @@ -327,6 +328,7 @@ cpu_init_crit: bl lowlevel_init @ go setup pll,mux,memory mov lr, ip @ restore link mov pc, lr @ back to my caller +#endif /* ************************************************************************* * diff --git a/arch/arm/cpu/armv7/tegra2/timer.c b/arch/arm/cpu/armv7/tegra2/timer.c index fb061d0..0b9fa64 100644 --- a/arch/arm/cpu/armv7/tegra2/timer.c +++ b/arch/arm/cpu/armv7/tegra2/timer.c @@ -48,21 +48,11 @@ struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE; #define TIMER_LOAD_VAL 0xffffffff /* timer without interrupts */ -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - /* delay x useconds */ void __udelay(unsigned long usec) { @@ -79,13 +69,6 @@ void __udelay(unsigned long usec) } } -void reset_timer_masked(void) -{ - /* reset time, capture current incrementer value time */ - gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ); - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked(void) { ulong now; diff --git a/arch/arm/cpu/armv7/u8500/timer.c b/arch/arm/cpu/armv7/u8500/timer.c index 8e96eaa..79aad99 100644 --- a/arch/arm/cpu/armv7/u8500/timer.c +++ b/arch/arm/cpu/armv7/u8500/timer.c @@ -129,11 +129,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - /* * Emulation of Power architecture long long timebase. * diff --git a/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c index 09f69ce..642e67a 100644 --- a/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c +++ b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c @@ -386,7 +386,7 @@ ixQMgrNotificationEnable (IxQMgrQId qId, &dispatchQInfo[qId].statusMask); - /* Set the interupt source is this queue is in the range 0-31 */ + /* Set the interrupt source is this queue is in the range 0-31 */ if (qId < IX_QMGR_MIN_QUEUPP_QID) { ixQMgrAqmIfIntSrcSelWrite (qId, srcSel); diff --git a/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h index 0ee4123..4e0de82 100644 --- a/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h +++ b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h @@ -279,7 +279,7 @@ typedef struct BOOL portInitialized; UINT32 npeId; /**< NpeId for this port */ IxEthAccTxDataInfo ixEthAccTxData; /**< Transmit data control structures */ - IxEthAccRxDataInfo ixEthAccRxData; /**< Recieve data control structures */ + IxEthAccRxDataInfo ixEthAccRxData; /**< Receive data control structures */ } IxEthAccPortDataInfo; extern IxEthAccPortDataInfo ixEthAccPortData[]; diff --git a/arch/arm/cpu/ixp/npe/include/IxNpeA.h b/arch/arm/cpu/ixp/npe/include/IxNpeA.h index 7427cc4..90669c2 100644 --- a/arch/arm/cpu/ixp/npe/include/IxNpeA.h +++ b/arch/arm/cpu/ixp/npe/include/IxNpeA.h @@ -717,7 +717,7 @@ typedef struct */ typedef struct { - UINT32 rxBitField; /**< Recieved bit field */ + UINT32 rxBitField; /**< Received bit field */ UINT32 atmCellHeader; /**< ATM Cell Header */ UINT32 rsvdWord0; /**< Reserved field */ UINT16 currMbufLen; /**< Mbuf Length */ diff --git a/arch/arm/cpu/ixp/npe/include/IxQMgr.h b/arch/arm/cpu/ixp/npe/include/IxQMgr.h index 165ed96..03d7e07 100644 --- a/arch/arm/cpu/ixp/npe/include/IxQMgr.h +++ b/arch/arm/cpu/ixp/npe/include/IxQMgr.h @@ -570,7 +570,7 @@ typedef enum * @brief Queue interrupt source select. * * This enum defines the different source conditions on a queue that result in - * an interupt being fired by the AQM. Interrupt source is configurable for + * an interrupt being fired by the AQM. Interrupt source is configurable for * queues 0-31 only. The interrupt source for queues 32-63 is hardwired to the * NE(Nearly Empty) status flag. * diff --git a/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h index f7194e7..b65d621 100644 --- a/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h +++ b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h @@ -404,7 +404,7 @@ * * @def IX_ETH_ACC_RX_FRAME_ETH_Q * -* @brief Eth0/Eth1 NPE Frame Recieve Q. +* @brief Eth0/Eth1 NPE Frame Receive Q. * * @note THIS IS NOT USED - the Rx queues are read from EthDB QoS configuration * diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index a975d42..b17d267 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -284,7 +284,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -326,7 +326,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c index 9f3ea42..087ddf8 100644 --- a/arch/arm/cpu/ixp/timer.c +++ b/arch/arm/cpu/ixp/timer.c @@ -89,11 +89,6 @@ void reset_timer_masked(void) gd->timestamp = 0; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { return tick_to_time(get_ticks()); @@ -104,11 +99,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->timestamp = time_to_tick(t); -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 81242b1..14e9854 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -124,7 +124,7 @@ reset: msr cpsr,r0 #define pWDTCTL 0x80001400 /* Watchdog Timer control register */ -#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */ +#define pINTENC 0x8000050C /* Interrupt-Controller enable clear register */ #define pCLKSET 0x80000420 /* clock divisor register */ /* disable watchdog, set watchdog control register to @@ -195,7 +195,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -237,7 +237,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/lh7a40x/timer.c b/arch/arm/cpu/lh7a40x/timer.c index 2691315..58b35b1 100644 --- a/arch/arm/cpu/lh7a40x/timer.c +++ b/arch/arm/cpu/lh7a40x/timer.c @@ -74,22 +74,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return (get_timer_masked() - base); } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo,tmp; diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index f1dbc3b..6191a73 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -43,7 +43,7 @@ sub pc,pc,#4 .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD ldr pc, _hang ldr pc, _hang ldr pc, _hang @@ -77,7 +77,7 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .balignl 16,0xdeadbeef @@ -122,7 +122,7 @@ FIQ_STACK_START: .word 0x0badc0de #endif /* CONFIG_USE_IRQ */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -262,7 +262,7 @@ copy_loop: blo copy_loop ldmfd sp!, {r0-r12} -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -301,10 +301,10 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -316,7 +316,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ /* * We are done. Do not return, instead branch to second part of board @@ -350,7 +350,7 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* CONFIG_PRELOADER */ +#else /* CONFIG_SPL_BUILD */ /****************************************************************************/ /* */ @@ -375,9 +375,9 @@ reset: /* Start OneNAND IPL */ ldr pc, =start_oneboot -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /****************************************************************************/ /* */ /* Interrupt handling */ @@ -471,7 +471,7 @@ reset: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER +#endif /* CONFIG_SPL_BUILD /****************************************************************************/ @@ -480,7 +480,7 @@ reset: /* */ /****************************************************************************/ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* use 32 words abort stack */ @@ -545,7 +545,7 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ #endif /* CONFIG_USE_IRQ */ /****************************************************************************/ @@ -584,7 +584,7 @@ reset_endless: b reset_endless -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD .section .mmudata, "a" .align 14 .globl mmu_table @@ -604,4 +604,4 @@ mmu_table: .word (__base << 20) | 0xc12 .set __base, __base + 1 .endr -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c index ec950c7..2866745 100644 --- a/arch/arm/cpu/pxa/timer.c +++ b/arch/arm/cpu/pxa/timer.c @@ -59,37 +59,21 @@ static inline unsigned long long us_to_tick(unsigned long long us) int timer_init (void) { - reset_timer(); + writel(0, OSCR); return 0; } -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - /* nop */ -} - void __udelay (unsigned long usec) { udelay_masked (usec); } - -void reset_timer_masked (void) -{ - writel(0, OSCR); -} - ulong get_timer_masked (void) { return tick_to_time(get_ticks()); diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 10f5284..2545cf6 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -167,7 +167,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -209,7 +209,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/s3c44b0/timer.c b/arch/arm/cpu/s3c44b0/timer.c index 6f1d8f6..6c2f066 100644 --- a/arch/arm/cpu/s3c44b0/timer.c +++ b/arch/arm/cpu/s3c44b0/timer.c @@ -59,22 +59,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo; @@ -89,13 +78,6 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked (void) -{ - /* reset time */ - lastdec = READ_TIMER; - timestamp = 0; -} - ulong get_timer_masked (void) { ulong now = READ_TIMER; diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index b27e970..7223c47 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -171,7 +171,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -213,7 +213,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -263,7 +263,7 @@ _dynsym_start_ofs: */ -/* Interupt-Controller base address */ +/* Interrupt-Controller base address */ IC_BASE: .word 0x90050000 #define ICMR 0x04 diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c index 0207501..53bec0b 100644 --- a/arch/arm/cpu/sa1100/timer.c +++ b/arch/arm/cpu/sa1100/timer.c @@ -34,32 +34,16 @@ int timer_init (void) return 0; } -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked (); } -void set_timer (ulong t) -{ - /* nop */ -} - void __udelay (unsigned long usec) { udelay_masked (usec); } - -void reset_timer_masked (void) -{ - OSCR = 0; -} - ulong get_timer_masked (void) { return OSCR; diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h index 55ad115..2ccb445 100644 --- a/arch/arm/include/asm/arch-mx25/imx-regs.h +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -86,8 +86,8 @@ struct esdramc_regs { /* GPIO registers */ struct gpio_regs { - u32 dr; /* data */ - u32 dir; /* direction */ + u32 gpio_dr; /* data */ + u32 gpio_dir; /* direction */ u32 psr; /* pad satus */ u32 icr1; /* interrupt config 1 */ u32 icr2; /* interrupt config 2 */ @@ -141,6 +141,45 @@ struct fuse_bank0_regs { u32 mac_addr[6]; }; +/* Multi-Layer AHB Crossbar Switch (MAX) registers */ +struct max_regs { + u32 mpr0; + u32 pad00[3]; + u32 sgpcr0; + u32 pad01[59]; + u32 mpr1; + u32 pad02[3]; + u32 sgpcr1; + u32 pad03[59]; + u32 mpr2; + u32 pad04[3]; + u32 sgpcr2; + u32 pad05[59]; + u32 mpr3; + u32 pad06[3]; + u32 sgpcr3; + u32 pad07[59]; + u32 mpr4; + u32 pad08[3]; + u32 sgpcr4; + u32 pad09[251]; + u32 mgpcr0; + u32 pad10[63]; + u32 mgpcr1; + u32 pad11[63]; + u32 mgpcr2; + u32 pad12[63]; + u32 mgpcr3; + u32 pad13[63]; + u32 mgpcr4; +}; + +/* AHB <-> IP-Bus Interface (AIPS) */ +struct aips_regs { + u32 mpr_0_7; + u32 mpr_8_15; +}; + #endif /* AIPS 1 */ @@ -318,4 +357,10 @@ struct fuse_bank0_regs { #define WSR_UNLOCK1 0x5555 #define WSR_UNLOCK2 0xAAAA +/* Names used in GPIO driver */ +#define GPIO1_BASE_ADDR IMX_GPIO1_BASE +#define GPIO2_BASE_ADDR IMX_GPIO2_BASE +#define GPIO3_BASE_ADDR IMX_GPIO3_BASE +#define GPIO4_BASE_ADDR IMX_GPIO4_BASE + #endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx25/macro.h b/arch/arm/include/asm/arch-mx25/macro.h new file mode 100644 index 0000000..276c71c --- /dev/null +++ b/arch/arm/include/asm/arch-mx25/macro.h @@ -0,0 +1,64 @@ +/* + * (C) Copyright 2011 + * Matthias Weisser <weisserm@arcor.de> + * + * (C) Copyright 2009 DENX Software Engineering + * Author: John Rigby <jrigby@gmail.com> + * + * Common asm macros for imx25 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARM_ARCH_MACRO_H__ +#define __ASM_ARM_ARCH_MACRO_H__ +#ifdef __ASSEMBLY__ + +#include <asm/arch/imx-regs.h> +#include <asm/arch/asm-offsets.h> + +.macro init_aips + write32 IMX_AIPS1_BASE + AIPS_MPR_0_7, 0x77777777 + write32 IMX_AIPS1_BASE + AIPS_MPR_8_15, 0x77777777 + write32 IMX_AIPS2_BASE + AIPS_MPR_0_7, 0x77777777 + write32 IMX_AIPS2_BASE + AIPS_MPR_8_15, 0x77777777 +.endm + +.macro init_max + write32 IMX_MAX_BASE + MAX_MPR0, 0x43210 + write32 IMX_MAX_BASE + MAX_MPR1, 0x43210 + write32 IMX_MAX_BASE + MAX_MPR2, 0x43210 + write32 IMX_MAX_BASE + MAX_MPR3, 0x43210 + write32 IMX_MAX_BASE + MAX_MPR4, 0x43210 + + write32 IMX_MAX_BASE + MAX_SGPCR0, 0x10 + write32 IMX_MAX_BASE + MAX_SGPCR1, 0x10 + write32 IMX_MAX_BASE + MAX_SGPCR2, 0x10 + write32 IMX_MAX_BASE + MAX_SGPCR3, 0x10 + write32 IMX_MAX_BASE + MAX_SGPCR4, 0x10 + + write32 IMX_MAX_BASE + MAX_MGPCR0, 0x0 + write32 IMX_MAX_BASE + MAX_MGPCR1, 0x0 + write32 IMX_MAX_BASE + MAX_MGPCR2, 0x0 + write32 IMX_MAX_BASE + MAX_MGPCR3, 0x0 + write32 IMX_MAX_BASE + MAX_MGPCR4, 0x0 +.endm + +#endif /* __ASSEMBLY__ */ +#endif /* __ASM_ARM_ARCH_MACRO_H__ */ diff --git a/arch/arm/include/asm/arch-mx27/asm-offsets.h b/arch/arm/include/asm/arch-mx27/asm-offsets.h deleted file mode 100644 index 497afe5..0000000 --- a/arch/arm/include/asm/arch-mx27/asm-offsets.h +++ /dev/null @@ -1,16 +0,0 @@ -#define AIPI1_PSR0 0x10000000 -#define AIPI1_PSR1 0x10000004 -#define AIPI2_PSR0 0x10020000 -#define AIPI2_PSR1 0x10020004 -#define CSCR 0x10027000 -#define MPCTL0 0x10027004 -#define SPCTL0 0x1002700c -#define PCDR0 0x10027018 -#define PCDR1 0x1002701c -#define PCCR0 0x10027020 -#define PCCR1 0x10027024 -#define ESDCTL0_ROF 0x00 -#define ESDCFG0_ROF 0x04 -#define ESDCTL1_ROF 0x08 -#define ESDCFG1_ROF 0x0C -#define ESDMISC_ROF 0x10 diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 8f40aa7..b4b2fe6 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -29,7 +29,7 @@ extern void imx_gpio_mode (int gpio_mode); #ifdef CONFIG_MXC_UART -extern void mx27_uart_init_pins(void); +extern void mx27_uart1_init_pins(void); #endif /* CONFIG_MXC_UART */ #ifdef CONFIG_FEC_MXC diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h index 9f7ae80..fb035c4 100644 --- a/arch/arm/include/asm/arch-mx31/clock.h +++ b/arch/arm/include/asm/arch-mx31/clock.h @@ -24,8 +24,15 @@ #ifndef __ASM_ARCH_CLOCK_H #define __ASM_ARCH_CLOCK_H -extern u32 mx31_get_ipg_clk(void); -#define imx_get_uartclk mx31_get_ipg_clk +enum mxc_clock { + MXC_ARM_CLK, + MXC_IPG_CLK, + MXC_CSPI_CLK, + MXC_UART_CLK, +}; + +unsigned int mxc_get_clock(enum mxc_clock clk); +extern u32 imx_get_uartclk(); extern void mx31_gpio_mux(unsigned long mode); extern void mx31_set_pad(enum iomux_pins pin, u32 config); diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index 306f966..3c8d607 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -746,7 +746,7 @@ enum iomux_pins { #define IRAM_SIZE (16 * 1024) #define MX31_AIPS1_BASE_ADDR 0x43f00000 -#define MX31_OTG_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000) +#define IMX_USB_BASE (MX31_AIPS1_BASE_ADDR + 0x88000) /* USB portsc */ /* values for portsc field */ diff --git a/arch/arm/include/asm/arch-mx5/asm-offsets.h b/arch/arm/include/asm/arch-mx5/asm-offsets.h deleted file mode 100644 index 793f69c..0000000 --- a/arch/arm/include/asm/arch-mx5/asm-offsets.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * needed for arch/arm/cpu/armv7/mx51/lowlevel_init.S - * - * These should be auto-generated - */ -/* CCM */ -#define CLKCTL_CCR 0x00 -#define CLKCTL_CCDR 0x04 -#define CLKCTL_CSR 0x08 -#define CLKCTL_CCSR 0x0C -#define CLKCTL_CACRR 0x10 -#define CLKCTL_CBCDR 0x14 -#define CLKCTL_CBCMR 0x18 -#define CLKCTL_CSCMR1 0x1C -#define CLKCTL_CSCMR2 0x20 -#define CLKCTL_CSCDR1 0x24 -#define CLKCTL_CS1CDR 0x28 -#define CLKCTL_CS2CDR 0x2C -#define CLKCTL_CDCDR 0x30 -#define CLKCTL_CHSCCDR 0x34 -#define CLKCTL_CSCDR2 0x38 -#define CLKCTL_CSCDR3 0x3C -#define CLKCTL_CSCDR4 0x40 -#define CLKCTL_CWDR 0x44 -#define CLKCTL_CDHIPR 0x48 -#define CLKCTL_CDCR 0x4C -#define CLKCTL_CTOR 0x50 -#define CLKCTL_CLPCR 0x54 -#define CLKCTL_CISR 0x58 -#define CLKCTL_CIMR 0x5C -#define CLKCTL_CCOSR 0x60 -#define CLKCTL_CGPR 0x64 -#define CLKCTL_CCGR0 0x68 -#define CLKCTL_CCGR1 0x6C -#define CLKCTL_CCGR2 0x70 -#define CLKCTL_CCGR3 0x74 -#define CLKCTL_CCGR4 0x78 -#define CLKCTL_CCGR5 0x7C -#define CLKCTL_CCGR6 0x80 -#if defined(CONFIG_MX53) -#define CLKCTL_CCGR7 0x84 -#define CLKCTL_CMEOR 0x88 -#elif defined(CONFIG_MX51) -#define CLKCTL_CMEOR 0x84 -#endif - -/* DPLL */ -#define PLL_DP_CTL 0x00 -#define PLL_DP_CONFIG 0x04 -#define PLL_DP_OP 0x08 -#define PLL_DP_MFD 0x0C -#define PLL_DP_MFN 0x10 -#define PLL_DP_HFS_OP 0x1C -#define PLL_DP_HFS_MFD 0x20 -#define PLL_DP_HFS_MFN 0x24 diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 9589a62..e83ca29 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -317,9 +317,27 @@ struct clkctl { u32 ccgr4; u32 ccgr5; u32 ccgr6; +#if defined(CONFIG_MX53) + u32 ccgr7; +#endif u32 cmeor; }; +/* DPLL registers */ +struct dpll { + u32 dp_ctl; + u32 dp_config; + u32 dp_op; + u32 dp_mfd; + u32 dp_mfn; + u32 dp_mfn_minus; + u32 dp_mfn_plus; + u32 dp_hfs_op; + u32 dp_hfs_mfd; + u32 dp_hfs_mfn; + u32 dp_mfn_togc; + u32 dp_destat; +}; /* WEIM registers */ struct weim { u32 cs0gcr1; diff --git a/arch/arm/include/asm/arch-tegra2/clk_rst.h b/arch/arm/include/asm/arch-tegra2/clk_rst.h index bd8ad2c..36e27b5 100644 --- a/arch/arm/include/asm/arch-tegra2/clk_rst.h +++ b/arch/arm/include/asm/arch-tegra2/clk_rst.h @@ -191,4 +191,9 @@ struct clk_rst_ctlr { #define CPCON (1 << 8) +#define SWR_SDMMC4_RST (1 << 15) +#define CLK_ENB_SDMMC4 (1 << 15) +#define SWR_SDMMC3_RST (1 << 5) +#define CLK_ENB_SDMMC3 (1 << 5) + #endif /* CLK_RST_H */ diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h b/arch/arm/include/asm/arch-tegra2/pinmux.h index 8b4bd8d..cce936d 100644 --- a/arch/arm/include/asm/arch-tegra2/pinmux.h +++ b/arch/arm/include/asm/arch-tegra2/pinmux.h @@ -51,5 +51,11 @@ struct pmux_tri_ctlr { #define Z_GMC (1 << 29) #define Z_IRRX (1 << 20) #define Z_IRTX (1 << 19) +#define Z_GMA (1 << 28) +#define Z_GME (1 << 0) +#define Z_ATB (1 << 1) +#define Z_SDB (1 << 15) +#define Z_SDC (1 << 1) +#define Z_SDD (1 << 2) #endif /* PINMUX_H */ diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 270f163..879e20e 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -106,6 +106,11 @@ static inline int test_bit(int nr, const void * addr) return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7)); } +static inline int __ilog2(unsigned int x) +{ + return generic_fls(x) - 1; +} + /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 26b41b4..4fc51fd 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -24,7 +24,7 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H /* - * The following data structure is placed in some memory wich is + * The following data structure is placed in some memory which is * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or * some locked parts of the data cache) to allow for a minimum set of * global variables during system initialization (until we have set diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index 3904027..d3308f7 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -57,21 +57,10 @@ void dram_init_banksize (void); void setup_serial_tag (struct tag **params); void setup_revision_tag (struct tag **params); -/* ------------------------------------------------------------ */ -/* Here is a list of some prototypes which are incompatible to */ -/* the U-Boot implementation */ -/* To be fixed! */ -/* ------------------------------------------------------------ */ -/* common/cmd_nvedit.c */ -int setenv (char *, char *); - /* cpu/.../interrupt.c */ int arch_interrupt_init (void); void reset_timer_masked (void); ulong get_timer_masked (void); void udelay_masked (unsigned long usec); -/* cpu/.../timer.c */ -int timer_init (void); - #endif /* _U_BOOT_ARM_H_ */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index d31321a..300c8fa 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).o LIBGCC = $(obj)libgcc.o +ifndef CONFIG_SPL_BUILD GLSOBJS += _ashldi3.o GLSOBJS += _ashrdi3.o GLSOBJS += _divsi3.o @@ -45,6 +46,7 @@ COBJS-y += interrupts.o COBJS-y += reset.o SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o +endif SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \ $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index fc52a26..90709d0 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -42,7 +42,6 @@ #include <command.h> #include <malloc.h> #include <stdio_dev.h> -#include <timestamp.h> #include <version.h> #include <net.h> #include <serial.h> @@ -70,13 +69,6 @@ extern int AT91F_DataflashInit(void); extern void dataflash_print_info(void); #endif -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - -const char version_string[] = - U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"CONFIG_IDENT_STRING; - #ifdef CONFIG_DRIVER_RTL8019 extern void rtl8019_get_enetaddr (uchar * addr); #endif @@ -281,6 +273,10 @@ void board_init_f (ulong bootflag) gd->mon_len = _bss_end_ofs; +#ifdef CONFIG_MACH_TYPE + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ +#endif + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) { hang (); @@ -360,7 +356,7 @@ void board_init_f (ulong bootflag) debug ("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, addr); -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * reserve memory for malloc() arena */ diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c index c6ea435..6681e13 100644 --- a/arch/avr32/cpu/interrupts.c +++ b/arch/avr32/cpu/interrupts.c @@ -62,13 +62,6 @@ unsigned long long get_ticks(void) return ((unsigned long long)hi_now << 32) | lo; } -void reset_timer(void) -{ - sysreg_write(COUNT, 0); - cpu_sync_pipeline(); /* process any pending interrupts */ - timer_overflow = 0; -} - unsigned long get_timer(unsigned long base) { u64 now = get_ticks(); @@ -77,22 +70,6 @@ unsigned long get_timer(unsigned long base) return (unsigned long)(now >> 32) - base; } -void set_timer(unsigned long t) -{ - unsigned long long ticks = t; - unsigned long lo, hi, hi_new; - - ticks = (ticks * get_tbclk()) / CONFIG_SYS_HZ; - hi = ticks >> 32; - lo = ticks & 0xffffffffUL; - - do { - timer_overflow = hi; - sysreg_write(COUNT, lo); - hi_new = timer_overflow; - } while (hi_new != hi); -} - /* * For short delays only. It will overflow after a few seconds. */ diff --git a/arch/avr32/include/asm/initcalls.h b/arch/avr32/include/asm/initcalls.h deleted file mode 100644 index 57a278b..0000000 --- a/arch/avr32/include/asm/initcalls.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) 2005, 2006 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_AVR32_INITCALLS_H__ -#define __ASM_AVR32_INITCALLS_H__ - -#include <config.h> - -extern int cpu_init(void); -extern int timer_init(void); - -#endif /* __ASM_AVR32_INITCALLS_H__ */ diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 5edef8f..65473a1 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -23,7 +23,6 @@ #include <command.h> #include <malloc.h> #include <stdio_dev.h> -#include <timestamp.h> #include <version.h> #include <net.h> @@ -31,7 +30,6 @@ #include <miiphy.h> #endif -#include <asm/initcalls.h> #include <asm/sections.h> #include <asm/arch/mmu.h> @@ -41,9 +39,6 @@ DECLARE_GLOBAL_DATA_PTR; -const char version_string[] = - U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME") " CONFIG_IDENT_STRING; - unsigned long monitor_flash_len; /* Weak aliases for optional board functions */ diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk index 71fd53f..f9d46de 100644 --- a/arch/blackfin/config.mk +++ b/arch/blackfin/config.mk @@ -44,7 +44,7 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections PLATFORM_RELFLAGS += -mcpu=$(CONFIG_BFIN_CPU) ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) -ALL += $(obj)u-boot.ldr +ALL-y += $(obj)u-boot.ldr endif ifeq ($(CONFIG_ENV_IS_EMBEDDED_IN_LDR),y) CREATE_LDR_ENV = $(obj)tools/envcrc --binary > $(obj)env-ldr.o diff --git a/arch/blackfin/cpu/interrupts.c b/arch/blackfin/cpu/interrupts.c index 54a67b4..9189816 100644 --- a/arch/blackfin/cpu/interrupts.c +++ b/arch/blackfin/cpu/interrupts.c @@ -152,8 +152,3 @@ ulong get_timer(ulong base) return (milisec - base); } - -void reset_timer(void) -{ - timer_init(); -} diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index 14ad3e8..bfdb586 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -17,7 +17,6 @@ #include <malloc.h> #include <mmc.h> #include <net.h> -#include <timestamp.h> #include <status_led.h> #include <version.h> @@ -40,8 +39,6 @@ int post_flag; DECLARE_GLOBAL_DATA_PTR; -const char version_string[] = U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME")"; - __attribute__((always_inline)) static inline void serial_early_puts(const char *s) { diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S index d09d492..c5096a8 100644 --- a/arch/m68k/cpu/mcf5227x/start.S +++ b/arch/m68k/cpu/mcf5227x/start.S @@ -23,7 +23,6 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> #include "version.h" #include <asm/cache.h> @@ -508,7 +507,5 @@ _int_handler: .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 4 diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S index a726b59..e6a69ab 100644 --- a/arch/m68k/cpu/mcf523x/start.S +++ b/arch/m68k/cpu/mcf523x/start.S @@ -23,7 +23,6 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> #include "version.h" #include <asm/cache.h> @@ -270,7 +269,5 @@ _int_handler: .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 4 diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index f0cfa6f..ee17792 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -23,7 +23,6 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> #include "version.h" #include <asm/cache.h> @@ -330,7 +329,5 @@ _int_handler: .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 4 diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S index 53ac471..fe98d76 100644 --- a/arch/m68k/cpu/mcf532x/start.S +++ b/arch/m68k/cpu/mcf532x/start.S @@ -26,7 +26,6 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> #include "version.h" #include <asm/cache.h> @@ -283,7 +282,5 @@ _int_handler: /*------------------------------------------------------------------------------*/ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 4 diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S index 5255f37..9906014 100644 --- a/arch/m68k/cpu/mcf5445x/start.S +++ b/arch/m68k/cpu/mcf5445x/start.S @@ -23,7 +23,6 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> #include "version.h" #include <asm/cache.h> @@ -540,7 +539,5 @@ _int_handler: .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 4 diff --git a/arch/m68k/cpu/mcf547x_8x/slicetimer.c b/arch/m68k/cpu/mcf547x_8x/slicetimer.c index 8dc010a..467a807 100644 --- a/arch/m68k/cpu/mcf547x_8x/slicetimer.c +++ b/arch/m68k/cpu/mcf547x_8x/slicetimer.c @@ -95,18 +95,9 @@ void timer_init(void) timerp->cr = SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN; } -void reset_timer(void) -{ - timestamp = 0; -} - ulong get_timer(ulong base) { return (timestamp - base); } -void set_timer(ulong t) -{ - timestamp = t; -} #endif /* CONFIG_SLTTMR */ diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S index e30923f..ec65cae 100644 --- a/arch/m68k/cpu/mcf547x_8x/start.S +++ b/arch/m68k/cpu/mcf547x_8x/start.S @@ -23,7 +23,6 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> #include "version.h" #include <asm/cache.h> @@ -277,7 +276,5 @@ _int_handler: .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 4 diff --git a/arch/m68k/include/asm/fec.h b/arch/m68k/include/asm/fec.h index cecec59..e8cea45 100644 --- a/arch/m68k/include/asm/fec.h +++ b/arch/m68k/include/asm/fec.h @@ -39,7 +39,7 @@ typedef struct cpm_buf_desc { uint cbd_bufaddr; /* Buffer address in host memory */ } cbd_t; -#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ +#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ #define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 6a892db..945ab66 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -574,8 +574,6 @@ void board_init_r (gd_t *id, ulong dest_addr) udelay (20); - set_timer (0); - /* Insert function pointers now that we have relocated the code */ /* Initialize from environment */ diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index 7eaea5e..a316cdf 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -116,20 +116,11 @@ void timer_init(void) DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN; } -void reset_timer(void) -{ - timestamp = 0; -} - ulong get_timer(ulong base) { return (timestamp - base); } -void set_timer(ulong t) -{ - timestamp = t; -} #endif /* CONFIG_MCFTMR */ #if defined(CONFIG_MCFPIT) @@ -173,14 +164,6 @@ void timer_init(void) timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; } -void set_timer(ulong t) -{ - volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE); - - timestamp = 0; - timerp->pmr = lastinc = 0; -} - ulong get_timer(ulong base) { unsigned short now, diff; @@ -196,8 +179,8 @@ ulong get_timer(ulong base) void wait_ticks(unsigned long ticks) { - set_timer(0); - while (get_timer(0) < ticks) ; + u32 start = get_timer(0); + while (get_timer(start) < ticks) ; } #endif /* CONFIG_MCFPIT */ diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index 4936c62..a167755 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -28,11 +28,6 @@ volatile int timestamp = 0; -void reset_timer (void) -{ - timestamp = 0; -} - #ifdef CONFIG_SYS_TIMER_0 ulong get_timer (ulong base) { @@ -45,11 +40,6 @@ ulong get_timer (ulong base) } #endif -void set_timer (ulong t) -{ - timestamp = t; -} - #ifdef CONFIG_SYS_INTC_0 #ifdef CONFIG_SYS_TIMER_0 microblaze_timer_t *tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR); @@ -66,7 +56,7 @@ int timer_init (void) tmr->control = TIMER_INTERRUPT | TIMER_RESET; tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT; - reset_timer (); + timestamp = 0; install_interrupt_handler (CONFIG_SYS_TIMER_0_IRQ, timer_isr, (void *)tmr); return 0; } diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index c5f7ac4..d97543b 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -27,7 +27,6 @@ #include <common.h> #include <command.h> #include <malloc.h> -#include <timestamp.h> #include <version.h> #include <watchdog.h> #include <stdio_dev.h> @@ -35,8 +34,6 @@ DECLARE_GLOBAL_DATA_PTR; -const char version_string[] = U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME")"; - #ifdef CONFIG_SYS_GPIO_0 extern int gpio_init (void); #endif diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index 5d7467d..9c1b2f7 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -27,6 +27,10 @@ #include <asm/regdef.h> #include <asm/mipsregs.h> +#ifndef CONFIG_SYS_MIPS_CACHE_MODE +#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT +#endif + /* * For the moment disable interrupts, mark the kernel mode and * set ST0_KX so that the CPU does not spit fire when using @@ -64,9 +68,16 @@ _start: RVECENT(reset,0) # U-boot entry point RVECENT(reset,1) # software reboot -#ifdef CONFIG_INCA_IP - .word INFINEON_EBU_BOOTCFG # EBU init code, fetched during - .word 0x00000000 # booting phase of the flash +#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG + /* + * Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to + * access external NOR flashes. If the board boots from NOR flash the + * internal BootROM does a blind read at address 0xB0000010 to read the + * initial configuration for that EBU in order to access the flash + * device with correct parameters. This config option is board-specific. + */ + .word CONFIG_SYS_XWAY_EBU_BOOTCFG + .word 0x00000000 #else RVECENT(romReserved,2) #endif @@ -242,7 +253,7 @@ reset: nop /* ... and enable them */ - li t0, CONF_CM_CACHABLE_NONCOHERENT + li t0, CONFIG_SYS_MIPS_CACHE_MODE mtc0 t0, CP0_CONFIG #endif diff --git a/arch/mips/cpu/mips32/time.c b/arch/mips/cpu/mips32/time.c index 0e66441..350896a 100644 --- a/arch/mips/cpu/mips32/time.c +++ b/arch/mips/cpu/mips32/time.c @@ -42,12 +42,6 @@ int timer_init(void) return 0; } -void reset_timer(void) -{ - timestamp = 0; - write_c0_compare(read_c0_count() + CYCLES_PER_JIFFY); -} - ulong get_timer(ulong base) { unsigned int count; @@ -64,12 +58,6 @@ ulong get_timer(ulong base) return (timestamp - base); } -void set_timer(ulong t) -{ - timestamp = t; - write_c0_compare(read_c0_count() + CYCLES_PER_JIFFY); -} - void __udelay(unsigned long usec) { unsigned int tmo; diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index 623c4d7..4f85bbd 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -25,7 +25,6 @@ #include <command.h> #include <malloc.h> #include <stdio_dev.h> -#include <timestamp.h> #include <version.h> #include <net.h> #include <environment.h> @@ -50,9 +49,6 @@ extern ulong uboot_end; ulong monitor_flash_len; -const char version_string[] = - U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"; - static char *failed = "*** failed ***\n"; /* diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c index 63acfa9..0a97fa6 100644 --- a/arch/nios2/cpu/interrupts.c +++ b/arch/nios2/cpu/interrupts.c @@ -98,12 +98,6 @@ ulong get_timer (ulong base) return (timestamp - base); } -void set_timer (ulong t) -{ - timestamp = t; -} - - /* The board must handle this interrupt if a timer is not * provided. */ diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S index bf5d672..0f4ab28 100644 --- a/arch/nios2/cpu/start.S +++ b/arch/nios2/cpu/start.S @@ -23,7 +23,6 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> #include <version.h> /************************************************************************* @@ -196,14 +195,8 @@ dly_clks: bge r4, r0, dly_clks ret - -#if !defined(CONFIG_IDENT_STRING) -#define CONFIG_IDENT_STRING "" -#endif .data .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S index f6011fc..75fb773 100644 --- a/arch/powerpc/cpu/74xx_7xx/start.S +++ b/arch/powerpc/cpu/74xx_7xx/start.S @@ -35,7 +35,6 @@ #include <asm-offsets.h> #include <config.h> #include <74xx_7xx.h> -#include <timestamp.h> #include <version.h> #include <ppc_asm.tmpl> @@ -52,10 +51,6 @@ #include <galileo/gt64260R.h> #endif -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -89,9 +84,7 @@ .long 0x27051956 /* U-Boot Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" . = EXC_OFF_SYS_RESET .globl _start diff --git a/arch/powerpc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c index cb5bbf0..5ee9cef 100644 --- a/arch/powerpc/cpu/mpc512x/serial.c +++ b/arch/powerpc/cpu/mpc512x/serial.c @@ -30,6 +30,7 @@ */ #include <common.h> +#include <linux/compiler.h> #include <asm/io.h> #include <asm/processor.h> #include <serial.h> @@ -318,9 +319,8 @@ int serial_getcts_dev(unsigned int idx) serial_puts_dev(port, s); \ } -#define INIT_PSC_SERIAL_STRUCTURE(port, name, bus) { \ +#define INIT_PSC_SERIAL_STRUCTURE(port, name) { \ name, \ - bus, \ serial##port##_init, \ serial##port##_uninit, \ serial##port##_setbrg, \ @@ -333,27 +333,38 @@ int serial_getcts_dev(unsigned int idx) #if defined(CONFIG_SYS_PSC1) DECLARE_PSC_SERIAL_FUNCTIONS(1); struct serial_device serial1_device = -INIT_PSC_SERIAL_STRUCTURE(1, "psc1", "UART1"); +INIT_PSC_SERIAL_STRUCTURE(1, "psc1"); #endif #if defined(CONFIG_SYS_PSC3) DECLARE_PSC_SERIAL_FUNCTIONS(3); struct serial_device serial3_device = -INIT_PSC_SERIAL_STRUCTURE(3, "psc3", "UART3"); +INIT_PSC_SERIAL_STRUCTURE(3, "psc3"); #endif #if defined(CONFIG_SYS_PSC4) DECLARE_PSC_SERIAL_FUNCTIONS(4); struct serial_device serial4_device = -INIT_PSC_SERIAL_STRUCTURE(4, "psc4", "UART4"); +INIT_PSC_SERIAL_STRUCTURE(4, "psc4"); #endif #if defined(CONFIG_SYS_PSC6) DECLARE_PSC_SERIAL_FUNCTIONS(6); struct serial_device serial6_device = -INIT_PSC_SERIAL_STRUCTURE(6, "psc6", "UART6"); +INIT_PSC_SERIAL_STRUCTURE(6, "psc6"); #endif +__weak struct serial_device *default_serial_console(void) +{ +#if (CONFIG_PSC_CONSOLE == 3) + return &serial3_device; +#elif (CONFIG_PSC_CONSOLE == 6) + return &serial6_device; +#else +#error "invalid CONFIG_PSC_CONSOLE" +#endif +} + #else void serial_setbrg(void) diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S index 9c2e488..ed362d8 100644 --- a/arch/powerpc/cpu/mpc512x/start.S +++ b/arch/powerpc/cpu/mpc512x/start.S @@ -31,7 +31,9 @@ #include <asm-offsets.h> #include <config.h> -#include <timestamp.h> +#ifndef CONFIG_IDENT_STRING +#define CONFIG_IDENT_STRING "MPC512X" +#endif #include <version.h> #define CONFIG_521X 1 /* needed for Linux kernel header files*/ @@ -46,10 +48,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "MPC512X" -#endif - /* * Floating Point enable, Machine Check and Recoverable Interr. */ @@ -89,9 +87,7 @@ .long 0x27051956 /* U-Boot Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii " ", CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" /* * Vector Table diff --git a/arch/powerpc/cpu/mpc5xx/start.S b/arch/powerpc/cpu/mpc5xx/start.S index cc11c8f..cc4c33e 100644 --- a/arch/powerpc/cpu/mpc5xx/start.S +++ b/arch/powerpc/cpu/mpc5xx/start.S @@ -33,7 +33,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc5xx.h> -#include <timestamp.h> #include <version.h> #define CONFIG_5xx 1 /* needed for Linux kernel header files */ @@ -46,10 +45,6 @@ #include <asm/processor.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't have a MMU. */ #undef MSR_KERNEL @@ -82,9 +77,7 @@ .long 0x27051956 /* U-Boot Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" . = EXC_OFF_SYS_RESET .globl _start diff --git a/arch/powerpc/cpu/mpc5xxx/serial.c b/arch/powerpc/cpu/mpc5xxx/serial.c index 0127065..aa09f67 100644 --- a/arch/powerpc/cpu/mpc5xxx/serial.c +++ b/arch/powerpc/cpu/mpc5xxx/serial.c @@ -34,6 +34,7 @@ */ #include <common.h> +#include <linux/compiler.h> #include <mpc5xxx.h> #if defined (CONFIG_SERIAL_MULTI) @@ -338,7 +339,6 @@ int serial1_tstc(void) struct serial_device serial0_device = { "serial0", - "UART0", serial0_init, NULL, serial0_setbrg, @@ -348,10 +348,14 @@ struct serial_device serial0_device = serial0_puts, }; +__weak struct serial_device *default_serial_console(void) +{ + return &serial0_device; +} + struct serial_device serial1_device = { "serial1", - "UART1", serial1_init, NULL, serial1_setbrg, diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index 192aa50..51cc4e2 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -28,7 +28,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc5xxx.h> -#include <timestamp.h> #include <version.h> #define CONFIG_MPC5xxx 1 /* needed for Linux kernel header files */ @@ -41,10 +40,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -80,9 +75,7 @@ .data .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" /* * Exception vectors diff --git a/arch/powerpc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S index 300b35c..a1a2dc5 100644 --- a/arch/powerpc/cpu/mpc8220/start.S +++ b/arch/powerpc/cpu/mpc8220/start.S @@ -28,7 +28,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc8220.h> -#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -40,10 +39,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -79,9 +74,7 @@ .data .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" /* * Exception vectors diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S index fc4e922..70db73e 100644 --- a/arch/powerpc/cpu/mpc824x/start.S +++ b/arch/powerpc/cpu/mpc824x/start.S @@ -40,7 +40,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc824x.h> -#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -52,10 +51,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -92,9 +87,7 @@ .long 0x27051956 /* U-Boot Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" . = EXC_OFF_SYS_RESET .globl _start diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S index 702546e..3299d72 100644 --- a/arch/powerpc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -28,7 +28,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc8260.h> -#include <timestamp.h> #include <version.h> #define CONFIG_8260 1 /* needed for Linux kernel header files */ @@ -41,10 +40,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -87,9 +82,7 @@ .data .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" /* * Hard Reset Configuration Word (HRCW) table diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 7e60315..b70b4ca 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -30,7 +30,9 @@ #include <asm-offsets.h> #include <config.h> #include <mpc83xx.h> -#include <timestamp.h> +#ifndef CONFIG_IDENT_STRING +#define CONFIG_IDENT_STRING "MPC83XX" +#endif #include <version.h> #define CONFIG_83XX 1 /* needed for Linux kernel header files*/ @@ -43,10 +45,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "MPC83XX" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -107,9 +105,7 @@ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii " ", CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 2 diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 8a0a8e9..7026bca 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -78,8 +78,8 @@ COBJS-$(CONFIG_PCI) += pci.o COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o # various SoC specific assignments -COBJS-$(CONFIG_PPC_P2040) += p2040_ids.o -COBJS-$(CONFIG_PPC_P2041) += p2040_ids.o +COBJS-$(CONFIG_PPC_P2040) += p2041_ids.o +COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o @@ -111,7 +111,7 @@ COBJS-$(CONFIG_P1024) += p1021_serdes.o COBJS-$(CONFIG_P1025) += p1021_serdes.o COBJS-$(CONFIG_P2010) += p2020_serdes.o COBJS-$(CONFIG_P2020) += p2020_serdes.o -COBJS-$(CONFIG_PPC_P2040) += p2040_serdes.o +COBJS-$(CONFIG_PPC_P2040) += p2041_serdes.o COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 53f0887..22fa461 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -46,7 +46,6 @@ int checkcpu (void) { sys_info_t sysinfo; uint pvr, svr; - uint fam; uint ver; uint major, minor; struct cpu_type *cpu; @@ -94,30 +93,25 @@ int checkcpu (void) printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr); pvr = get_pvr(); - fam = PVR_FAM(pvr); ver = PVR_VER(pvr); major = PVR_MAJ(pvr); minor = PVR_MIN(pvr); printf("Core: "); - if (PVR_FAM(PVR_85xx)) { - switch(PVR_MEM(pvr)) { - case 0x1: - case 0x2: - puts("E500"); - break; - case 0x3: - puts("E500MC"); - break; - case 0x4: - puts("E5500"); - break; - default: - puts("Unknown"); - break; - } - } else { + switch(ver) { + case PVR_VER_E500_V1: + case PVR_VER_E500_V2: + puts("E500"); + break; + case PVR_VER_E500MC: + puts("E500MC"); + break; + case PVR_VER_E5500: + puts("E5500"); + break; + default: puts("Unknown"); + break; } printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr); @@ -358,7 +352,7 @@ phys_size_t initdram(int board_type) lbc_sdram_init(); #endif - puts("DDR: "); + debug("DDR: "); return dram_size; } #endif /* CONFIG_SYS_RAMBOOT */ @@ -374,6 +368,8 @@ void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn, unsigned int setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg); +void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg); + static void dump_spd_ddr_reg(void) { int i, j, k, m; @@ -460,19 +456,9 @@ static int reset_tlb(phys_addr_t p_addr, u32 size, phys_addr_t *phys_offset) u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE; unsigned long epn; u32 tsize, valid, ptr; - phys_addr_t rpn = 0; int ddr_esel; - ptr = vstart; - - while (ptr < (vstart + size)) { - ddr_esel = find_tlb_idx((void *)ptr, 1); - if (ddr_esel != -1) { - read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn); - disable_tlb(ddr_esel); - } - ptr += TSIZE_TO_BYTES(tsize); - } + clear_ddr_tlbs_phys(p_addr, size>>20); /* Setup new tlb to cover the physical address */ setup_ddr_tlbs_phys(p_addr, size>>20); diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index b3da970..6aca166 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -222,6 +222,10 @@ static void corenet_tb_init(void) void cpu_init_f (void) { extern void m8560_cpm_reset (void); +#ifdef CONFIG_SYS_DCSRBAR_PHYS + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); +#endif + #ifdef CONFIG_MPC8548 ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR); uint svr = get_svr(); @@ -262,6 +266,13 @@ void cpu_init_f (void) /* Invalidate the CPC before DDR gets enabled */ invalidate_cpc(); + + #ifdef CONFIG_SYS_DCSRBAR_PHYS + /* set DCSRCR so that DCSR space is 1G */ + setbits_be32(&gur->dcsrcr, FSL_CORENET_DCSR_SZ_1G); + in_be32(&gur->dcsrcr); +#endif + } /* Implement a dummy function for those platforms w/o SERDES */ @@ -381,6 +392,12 @@ int cpu_init_r(void) puts("enabled\n"); } #elif defined(CONFIG_BACKSIDE_L2_CACHE) + if ((SVR_SOC_VER(get_svr()) == SVR_P2040) || + (SVR_SOC_VER(get_svr()) == SVR_P2040_E)) { + puts("N/A\n"); + goto skip_l2; + } + u32 l2cfg0 = mfspr(SPRN_L2CFG0); /* invalidate the L2 cache */ @@ -401,6 +418,8 @@ int cpu_init_r(void) ; printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64); } + +skip_l2: #else puts("disabled\n"); #endif diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 97d3928..8f13cd8 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -33,6 +33,7 @@ #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> #endif +#include "../../../../drivers/qe/qe.h" /* For struct qe_firmware */ DECLARE_GLOBAL_DATA_PTR; @@ -227,6 +228,12 @@ static inline void ft_fixup_l2cache(void *blob) u32 *ph; u32 l2cfg0 = mfspr(SPRN_L2CFG0); u32 size, line_size, num_ways, num_sets; + int has_l2 = 1; + + /* P2040/P2040E has no L2, so dont set any L2 props */ + if ((SVR_SOC_VER(get_svr()) == SVR_P2040) || + (SVR_SOC_VER(get_svr()) == SVR_P2040_E)) + has_l2 = 0; size = (l2cfg0 & 0x3fff) * 64 * 1024; num_ways = ((l2cfg0 >> 14) & 0x1f) + 1; @@ -249,21 +256,22 @@ static inline void ft_fixup_l2cache(void *blob) goto next; } + if (has_l2) { #ifdef CONFIG_SYS_CACHE_STASHING - { u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); if (reg) fdt_setprop_cell(blob, l2_off, "cache-stash-id", (*reg * 2) + 32 + 1); - } #endif - fdt_setprop(blob, l2_off, "cache-unified", NULL, 0); - fdt_setprop_cell(blob, l2_off, "cache-block-size", line_size); - fdt_setprop_cell(blob, l2_off, "cache-size", size); - fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); - fdt_setprop_cell(blob, l2_off, "cache-level", 2); - fdt_setprop(blob, l2_off, "compatible", "cache", 6); + fdt_setprop(blob, l2_off, "cache-unified", NULL, 0); + fdt_setprop_cell(blob, l2_off, "cache-block-size", + line_size); + fdt_setprop_cell(blob, l2_off, "cache-size", size); + fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); + fdt_setprop_cell(blob, l2_off, "cache-level", 2); + fdt_setprop(blob, l2_off, "compatible", "cache", 6); + } if (l3_off < 0) { ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0); @@ -406,6 +414,126 @@ static void ft_fixup_qe_snum(void *blob) } #endif +/** + * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree + * + * The binding for an Fman firmware node is documented in + * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt. This node contains + * the actual Fman firmware binary data. The operating system is expected to + * be able to parse the binary data to determine any attributes it needs. + */ +#ifdef CONFIG_SYS_DPAA_FMAN +void fdt_fixup_fman_firmware(void *blob) +{ + int rc, fmnode, fwnode = -1; + uint32_t phandle; + struct qe_firmware *fmanfw; + const struct qe_header *hdr; + unsigned int length; + uint32_t crc; + const char *p; + + /* The first Fman we find will contain the actual firmware. */ + fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman"); + if (fmnode < 0) + /* Exit silently if there are no Fman devices */ + return; + + /* If we already have a firmware node, then also exit silently. */ + if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0) + return; + + /* If the environment variable is not set, then exit silently */ + p = getenv("fman_ucode"); + if (!p) + return; + + fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0); + if (!fmanfw) + return; + + hdr = &fmanfw->header; + length = be32_to_cpu(hdr->length); + + /* Verify the firmware. */ + if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') || + (hdr->magic[2] != 'F')) { + printf("Data at %p is not an Fman firmware\n", fmanfw); + return; + } + + if (length > CONFIG_SYS_FMAN_FW_LENGTH) { + printf("Fman firmware at %p is too large (size=%u)\n", + fmanfw, length); + return; + } + + length -= sizeof(u32); /* Subtract the size of the CRC */ + crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length)); + if (crc != crc32_no_comp(0, (void *)fmanfw, length)) { + printf("Fman firmware at %p has invalid CRC\n", fmanfw); + return; + } + + /* Increase the size of the fdt to make room for the node. */ + rc = fdt_increase_size(blob, fmanfw->header.length); + if (rc < 0) { + printf("Unable to make room for Fman firmware: %s\n", + fdt_strerror(rc)); + return; + } + + /* Create the firmware node. */ + fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware"); + if (fwnode < 0) { + char s[64]; + fdt_get_path(blob, fmnode, s, sizeof(s)); + printf("Could not add firmware node to %s: %s\n", s, + fdt_strerror(fwnode)); + return; + } + rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware"); + if (rc < 0) { + char s[64]; + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add compatible property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + phandle = fdt_alloc_phandle(blob); + rc = fdt_setprop_cell(blob, fwnode, "linux,phandle", phandle); + if (rc < 0) { + char s[64]; + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add phandle property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length); + if (rc < 0) { + char s[64]; + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add firmware property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + /* Find all other Fman nodes and point them to the firmware node. */ + while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) { + rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle); + if (rc < 0) { + char s[64]; + fdt_get_path(blob, fmnode, s, sizeof(s)); + printf("Could not add pointer property to node %s: %s\n", + s, fdt_strerror(rc)); + return; + } + } +} +#else +#define fdt_fixup_fman_firmware(x) +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -445,6 +573,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) ft_fixup_qe_snum(blob); #endif + fdt_fixup_fman_firmware(blob); + #ifdef CONFIG_SYS_NS16550 do_fixup_by_compat_u32(blob, "ns16550", "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); @@ -505,4 +635,79 @@ void ft_cpu_setup(void *blob, bd_t *bd) */ do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer", "timer-frequency", gd->bus_clk/2, 1); + + do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0", + "clock_freq", gd->bus_clk, 1); +} + +/* + * For some CCSR devices, we only have the virtual address, not the physical + * address. This is because we map CCSR as a whole, so we typically don't need + * a macro for the physical address of any device within CCSR. In this case, + * we calculate the physical address of that device using it's the difference + * between the virtual address of the device and the virtual address of the + * beginning of CCSR. + */ +#define CCSR_VIRT_TO_PHYS(x) \ + (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR)) + +/* + * Verify the device tree + * + * This function compares several CONFIG_xxx macros that contain physical + * addresses with the corresponding nodes in the device tree, to see if + * the physical addresses are all correct. For example, if + * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address + * of the first UART. We convert this to a physical address and compare + * that with the physical address of the first ns16550-compatible node + * in the device tree. If they don't match, then we display a warning. + * + * Returns 1 on success, 0 on failure + */ +int ft_verify_fdt(void *fdt) +{ + uint64_t ccsr = 0; + int aliases; + int off; + + /* First check the CCSR base address */ + off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4); + if (off > 0) + ccsr = fdt_get_base_address(fdt, off); + + if (!ccsr) { + printf("Warning: could not determine base CCSR address in " + "device tree\n"); + /* No point in checking anything else */ + return 0; + } + + if (ccsr != CONFIG_SYS_CCSRBAR_PHYS) { + printf("Warning: U-Boot configured CCSR at address %llx,\n" + "but the device tree has it at %llx\n", + (uint64_t) CONFIG_SYS_CCSRBAR_PHYS, ccsr); + /* No point in checking anything else */ + return 0; + } + + /* + * Get the 'aliases' node. If there isn't one, then there's nothing + * left to do. + */ + aliases = fdt_path_offset(fdt, "/aliases"); + if (aliases > 0) { +#ifdef CONFIG_SYS_NS16550_COM1 + if (!fdt_verify_alias_address(fdt, aliases, "serial0", + CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1))) + return 0; +#endif + +#ifdef CONFIG_SYS_NS16550_COM2 + if (!fdt_verify_alias_address(fdt, aliases, "serial1", + CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2))) + return 0; +#endif + } + + return 1; } diff --git a/arch/powerpc/cpu/mpc85xx/p2040_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 112ea56..112ea56 100644 --- a/arch/powerpc/cpu/mpc85xx/p2040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c diff --git a/arch/powerpc/cpu/mpc85xx/p2040_serdes.c b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c index 83bc82f..f68f281 100644 --- a/arch/powerpc/cpu/mpc85xx/p2040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c @@ -37,8 +37,8 @@ static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { PCIE2, PCIE2, PCIE2, NONE, NONE, NONE, NONE, SATA1, SATA2, NONE, NONE, NONE, NONE, }, [0x9] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2, - PCIE2, PCIE2, PCIE2, NONE, NONE, NONE, NONE, - NONE, NONE, NONE, NONE, NONE, NONE, }, + PCIE2, PCIE2, PCIE2, NONE, NONE, XAUI_FM1, XAUI_FM1, + XAUI_FM1, XAUI_FM1, NONE, NONE, NONE, NONE, }, [0xa] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2, PCIE2, PCIE2, PCIE2, NONE, NONE, PCIE3, PCIE3, PCIE3, PCIE3, NONE, NONE, NONE, NONE, }, @@ -53,8 +53,8 @@ static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, SATA1, SATA2, NONE, NONE, NONE, NONE, }, [0x17] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, SGMII_FM1_DTSEC3, - SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, NONE, - NONE, NONE, NONE, NONE, NONE, }, + SGMII_FM1_DTSEC4, NONE, NONE, XAUI_FM1, XAUI_FM1, XAUI_FM1, + XAUI_FM1, NONE, NONE, NONE, NONE, }, [0x19] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2, PCIE2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, SATA1, SATA2, NONE, NONE, NONE, NONE, }, @@ -68,19 +68,35 @@ static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { enum srds_prtcl serdes_get_prtcl(int cfg, int lane) { + enum srds_prtcl prtcl; + u32 svr = get_svr(); + u32 ver = SVR_SOC_VER(svr); + if (!serdes_lane_enabled(lane)) return NONE; - return serdes_cfg_tbl[cfg][lane]; + prtcl = serdes_cfg_tbl[cfg][lane]; + + /* P2040[e] does not support XAUI */ + if (((ver == SVR_P2040) || (ver == SVR_P2040_E)) && (prtcl == XAUI_FM1)) + prtcl = NONE; + + return prtcl; } int is_serdes_prtcl_valid(u32 prtcl) { int i; + u32 svr = get_svr(); + u32 ver = SVR_SOC_VER(svr); if (prtcl > ARRAY_SIZE(serdes_cfg_tbl)) return 0; + /* P2040[e] does not support XAUI */ + if (((ver == SVR_P2040) || (ver == SVR_P2040_E)) && (prtcl == XAUI_FM1)) + return 0; + for (i = 0; i < SRDS_MAX_LANES; i++) { if (serdes_cfg_tbl[prtcl][i] != NONE) return 1; diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index c014163..ecaa30d 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -151,8 +151,10 @@ static int fdt_qportal(void *blob, int off, int id, char *name, dev_handle = fdt_get_phandle(blob, dev_off); if (dev_handle <= 0) { dev_handle = fdt_alloc_phandle(blob); - fdt_setprop_cell(blob, dev_off, - "linux,phandle", dev_handle); + ret = fdt_create_phandle(blob, dev_off, + dev_handle); + if (ret < 0) + return ret; } ret = fdt_setprop(blob, childoff, "dev-handle", diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 56a853e..6678ed4 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -1,5 +1,5 @@ /* - * Copyright 2008-2010 Freescale Semiconductor, Inc. + * Copyright 2008-2011 Freescale Semiconductor, Inc. * Kumar Gala <kumar.gala@freescale.com> * * See file CREDITS for list of people who contributed to this @@ -144,6 +144,18 @@ __secondary_start_page: #endif #ifdef CONFIG_BACKSIDE_L2_CACHE + /* skip L2 setup on P2040/P2040E as they have no L2 */ + mfspr r2,SPRN_SVR + lis r3,SVR_P2040@h + ori r3,r3,SVR_P2040@l + cmpw r2,r3 + beq 3f + + lis r3,SVR_P2040_E@h + ori r3,r3,SVR_P2040_E@l + cmpw r2,r3 + beq 3f + /* Enable/invalidate the L2 cache */ msync lis r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@h @@ -169,6 +181,7 @@ __secondary_start_page: andis. r1,r3,L2CSR0_L2E@h beq 2b #endif +3: #define EPAPR_MAGIC (0x45504150) #define ENTRY_ADDR_UPPER 0 diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 5777493..878a3d6 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -31,7 +31,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc85xx.h> -#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -42,10 +41,6 @@ #include <asm/cache.h> #include <asm/mmu.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #undef MSR_KERNEL #define MSR_KERNEL ( MSR_ME ) /* Machine Check */ @@ -399,9 +394,7 @@ _start: .long 0x27051956 /* U-BOOT Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .align 4 .globl _start_cont @@ -683,6 +676,8 @@ mck_return: /* Cache functions. */ +.globl flush_icache +flush_icache: .globl invalidate_icache invalidate_icache: mfspr r0,L1CSR1 diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index 295f175..01a3561 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -300,4 +300,33 @@ unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg) return setup_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg); } + +/* Invalidate the DDR TLBs for the requested size */ +void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg) +{ + u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE; + unsigned long epn; + u32 tsize, valid, ptr; + phys_addr_t rpn = 0; + int ddr_esel; + u64 memsize = (u64)memsize_in_meg << 20; + + ptr = vstart; + + while (ptr < (vstart + memsize)) { + ddr_esel = find_tlb_idx((void *)ptr, 1); + if (ddr_esel != -1) { + read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn); + disable_tlb(ddr_esel); + } + ptr += TSIZE_TO_BYTES(tsize); + } +} + +void clear_ddr_tlbs(unsigned int memsize_in_meg) +{ + clear_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg); +} + + #endif /* !CONFIG_NAND_SPL */ diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S index 3e3c21e..32896d4 100644 --- a/arch/powerpc/cpu/mpc86xx/start.S +++ b/arch/powerpc/cpu/mpc86xx/start.S @@ -33,7 +33,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc86xx.h> -#include <timestamp.h> #include <version.h> #include <ppc_asm.tmpl> @@ -43,10 +42,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* * Need MSR_DR | MSR_IR enabled to access I/O (printf) in exceptions */ @@ -78,9 +73,7 @@ .long 0x27051956 /* U-Boot Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" . = EXC_OFF_SYS_RESET .globl _start diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c index 9514c66..9239b24 100644 --- a/arch/powerpc/cpu/mpc8xx/serial.c +++ b/arch/powerpc/cpu/mpc8xx/serial.c @@ -26,6 +26,7 @@ #include <command.h> #include <serial.h> #include <watchdog.h> +#include <linux/compiler.h> DECLARE_GLOBAL_DATA_PTR; @@ -390,7 +391,6 @@ smc_tstc(void) struct serial_device serial_smc_device = { "serial_smc", - "SMC", smc_init, NULL, smc_setbrg, @@ -661,7 +661,6 @@ scc_tstc(void) struct serial_device serial_scc_device = { "serial_scc", - "SCC", scc_init, NULL, scc_setbrg, @@ -673,6 +672,15 @@ struct serial_device serial_scc_device = #endif /* CONFIG_8xx_CONS_SCCx */ +__weak struct serial_device *default_serial_console(void) +{ +#if defined(CONFIG_8xx_CONS_SMC1) || defined(CONFIG_8xx_CONS_SMC2) + return &serial_smc_device; +#else + return &serial_scc_device; +#endif +} + #ifdef CONFIG_MODEM_SUPPORT void disable_putc(void) { @@ -692,7 +700,7 @@ kgdb_serial_init(void) { int i = -1; - if (strcmp(default_serial_console()->ctlr, "SMC") == 0) + if (strcmp(default_serial_console()->name, "serial_smc") == 0) { #if defined(CONFIG_8xx_CONS_SMC1) i = 1; @@ -700,7 +708,7 @@ kgdb_serial_init(void) i = 2; #endif } - else if (strcmp(default_serial_console()->ctlr, "SMC") == 0) + else if (strcmp(default_serial_console()->name, "serial_scc") == 0) { #if defined(CONFIG_8xx_CONS_SCC1) i = 1; @@ -715,7 +723,7 @@ kgdb_serial_init(void) if (i >= 0) { - serial_printf("[on %s%d] ", default_serial_console()->ctlr, i); + serial_printf("[on %s%d] ", default_serial_console()->name, i); } } diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index fe3daa2..ebca3ac 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -40,7 +40,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc8xx.h> -#include <timestamp.h> #include <version.h> #define CONFIG_8xx 1 /* needed for Linux kernel header files */ @@ -53,10 +52,6 @@ #include <asm/mmu.h> #include <asm/u-boot.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -89,9 +84,7 @@ .long 0x27051956 /* U-Boot Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" . = EXC_OFF_SYS_RESET .globl _start diff --git a/arch/powerpc/cpu/mpc8xx/video.c b/arch/powerpc/cpu/mpc8xx/video.c index c79c499..7725c67 100644 --- a/arch/powerpc/cpu/mpc8xx/video.c +++ b/arch/powerpc/cpu/mpc8xx/video.c @@ -33,7 +33,6 @@ #include <common.h> #include <config.h> #include <version.h> -#include <timestamp.h> #include <i2c.h> #include <linux/types.h> #include <stdio_dev.h> diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 85ebcc9..767bc52 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -79,7 +79,7 @@ struct cpu_type cpu_type_list [] = { CPU_TYPE_ENTRY(P1016, P1016_E, 1), CPU_TYPE_ENTRY(P1016, P1016, 1), CPU_TYPE_ENTRY(P1017, P1017, 1), - CPU_TYPE_ENTRY(P1017, P1017, 1), + CPU_TYPE_ENTRY(P1017, P1017_E, 1), CPU_TYPE_ENTRY(P1020, P1020, 2), CPU_TYPE_ENTRY(P1020, P1020_E, 2), CPU_TYPE_ENTRY(P1021, P1021, 2), diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index d9e3e7e..285051d 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -30,9 +30,8 @@ #include <asm/fsl_serdes.h> #include <phy.h> #include <hwconfig.h> -#ifdef CONFIG_HAS_FSL_DR_USB -#include <usb.h> -#endif + +#define FSL_MAX_NUM_USB_CTRLS 2 #if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) static int ft_del_cpuhandle(void *blob, int cpuhandle) @@ -135,7 +134,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) char str[5]; int i, j; - for (i = 1; i <= USB_MAX_DEVICE; i++) { + for (i = 1; i <= FSL_MAX_NUM_USB_CTRLS; i++) { int mode_idx = -1, phy_idx = -1; sprintf(str, "%s%d", "usb", i); if (hwconfig(str)) { @@ -163,8 +162,6 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) usb1_defined = 1; if (mode_idx < 0 && phy_idx < 0) printf("WARNING: invalid phy or mode\n"); - } else { - break; } } if (!usb1_defined) { diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index b43e22c..3b0e364 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -68,7 +68,6 @@ #include <asm-offsets.h> #include <config.h> #include <asm/ppc4xx.h> -#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -80,10 +79,6 @@ #include <asm/mmu.h> #include <asm/ppc4xx-isram.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #ifdef CONFIG_SYS_INIT_DCACHE_CS # if (CONFIG_SYS_INIT_DCACHE_CS == 0) # define PBxAP PB1AP @@ -549,9 +544,7 @@ tlbnx2: addi r4,r4,1 /* Next TLB */ .long 0x27051956 /* U-Boot Magic Number */ .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" . = EXC_OFF_SYS_RESET .globl _start_of_vectors diff --git a/arch/powerpc/include/asm/cpm_8260.h b/arch/powerpc/include/asm/cpm_8260.h index 8302404..6a4a51a 100644 --- a/arch/powerpc/include/asm/cpm_8260.h +++ b/arch/powerpc/include/asm/cpm_8260.h @@ -117,7 +117,7 @@ typedef struct cpm_buf_desc { uint cbd_bufaddr; /* Buffer address in host memory */ } cbd_t; -#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ +#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ #define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ diff --git a/arch/powerpc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h index a74a3a1..1681ecd 100644 --- a/arch/powerpc/include/asm/cpm_85xx.h +++ b/arch/powerpc/include/asm/cpm_85xx.h @@ -110,7 +110,7 @@ typedef struct cpm_buf_desc { uint cbd_bufaddr; /* Buffer address in host memory */ } cbd_t; -#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ +#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ #define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 267a940..6aaade0 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1759,7 +1759,8 @@ typedef struct ccsr_gur { u32 cgencrl; /* Core general control */ u8 res31[184]; u32 sriopstecr; /* SRIO prescaler timer enable control */ - u8 res32[1788]; + u32 dcsrcr; /* DCSR Control register */ + u8 res32[1784]; u32 pmuxcr; /* Pin multiplexing control */ u8 res33[60]; u32 iovselsr; /* I/O voltage selection status */ @@ -1772,6 +1773,10 @@ typedef struct ccsr_gur { u8 res37[380]; } ccsr_gur_t; +#define FSL_CORENET_DCSR_SZ_MASK 0x00000003 +#define FSL_CORENET_DCSR_SZ_4M 0x0 +#define FSL_CORENET_DCSR_SZ_1G 0x3 + /* * On p4080 we have an LIODN for msg unit (rmu) but not maintenance * everything after has RMan thus msg unit LIODN is used for maintenance diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index c01c85f..ef5076b 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -489,6 +489,7 @@ extern int find_free_tlbcam(void); extern void print_tlbcam(void); extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg); +extern void clear_ddr_tlbs(unsigned int memsize_in_meg); extern void write_tlb(u32 _mas0, u32 _mas1, u32 _mas2, u32 _mas3, u32 _mas7); diff --git a/arch/powerpc/include/asm/ppc440ep_gr.h b/arch/powerpc/include/asm/ppc440ep_gr.h index dfd1532..e790963 100644 --- a/arch/powerpc/include/asm/ppc440ep_gr.h +++ b/arch/powerpc/include/asm/ppc440ep_gr.h @@ -182,7 +182,7 @@ #define PLLD_LFBDV_MASK 0x0000003f /* PLL Local Feedback Divisor */ #define OPBDDV_MASK 0x03000000 /* OPB Clock Divisor Register */ -#define PERDV_MASK 0x07000000 /* Periferal Clock Divisor */ +#define PERDV_MASK 0x07000000 /* Peripheral Clock Divisor */ #define PRADV_MASK 0x07000000 /* Primary Divisor A */ #define PRBDV_MASK 0x07000000 /* Primary Divisor B */ #define SPCID_MASK 0x03000000 /* Sync PCI Divisor */ @@ -192,7 +192,7 @@ #define PLLSYS1_PERCLK_DIV_MASK 0x03000000 /* Peripheral Clk Divisor */ #define PLLSYS1_MAL_DIV_MASK 0x00c00000 /* MAL Clk Divisor */ #define PLLSYS1_RW_MASK 0x00300000 /* ROM width */ -#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Addres reset vector */ +#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Address reset vector */ #define PLLSYS1_PAE_MASK 0x00040000 /* PCI arbitor enable */ #define PLLSYS1_PCHE_MASK 0x00020000 /* PCI host config enable */ #define PLLSYS1_PISE_MASK 0x00010000 /* PCI init seq. enable */ diff --git a/arch/powerpc/include/asm/ppc440epx_grx.h b/arch/powerpc/include/asm/ppc440epx_grx.h index 6c21472..c841f0f 100644 --- a/arch/powerpc/include/asm/ppc440epx_grx.h +++ b/arch/powerpc/include/asm/ppc440epx_grx.h @@ -398,7 +398,7 @@ #define PLLD_LFBDV_MASK 0x0000003f /* PLL Local Feedback Divisor */ #define OPBDDV_MASK 0x03000000 /* OPB Clock Divisor Register */ -#define PERDV_MASK 0x07000000 /* Periferal Clock Divisor */ +#define PERDV_MASK 0x07000000 /* Peripheral Clock Divisor */ #define PRADV_MASK 0x07000000 /* Primary Divisor A */ #define PRBDV_MASK 0x07000000 /* Primary Divisor B */ #define SPCID_MASK 0x03000000 /* Sync PCI Divisor */ @@ -408,7 +408,7 @@ #define PLLSYS1_PERCLK_DIV_MASK 0x03000000 /* Peripheral Clk Divisor */ #define PLLSYS1_MAL_DIV_MASK 0x00c00000 /* MAL Clk Divisor */ #define PLLSYS1_RW_MASK 0x00300000 /* ROM width */ -#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Addres reset vector */ +#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Address reset vector */ #define PLLSYS1_PAE_MASK 0x00040000 /* PCI arbitor enable */ #define PLLSYS1_PCHE_MASK 0x00020000 /* PCI host config enable */ #define PLLSYS1_PISE_MASK 0x00010000 /* PCI init seq. enable */ diff --git a/arch/powerpc/include/asm/ppc440gx.h b/arch/powerpc/include/asm/ppc440gx.h index 6f8581b..9924525 100644 --- a/arch/powerpc/include/asm/ppc440gx.h +++ b/arch/powerpc/include/asm/ppc440gx.h @@ -71,7 +71,7 @@ #define PLLD_LFBDV_MASK 0x0000003f /* PLL Local Feedback Divisor */ #define OPBDDV_MASK 0x03000000 /* OPB Clock Divisor Register */ -#define PERDV_MASK 0x07000000 /* Periferal Clock Divisor */ +#define PERDV_MASK 0x07000000 /* Peripheral Clock Divisor */ #define PRADV_MASK 0x07000000 /* Primary Divisor A */ #define PRBDV_MASK 0x07000000 /* Primary Divisor B */ #define SPCID_MASK 0x03000000 /* Sync PCI Divisor */ @@ -81,7 +81,7 @@ #define PLLSYS1_PERCLK_DIV_MASK 0x03000000 /* Peripheral Clk Divisor */ #define PLLSYS1_MAL_DIV_MASK 0x00c00000 /* MAL Clk Divisor */ #define PLLSYS1_RW_MASK 0x00300000 /* ROM width */ -#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Addres reset vector */ +#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Address reset vector */ #define PLLSYS1_PAE_MASK 0x00040000 /* PCI arbitor enable */ #define PLLSYS1_PCHE_MASK 0x00020000 /* PCI host config enable */ #define PLLSYS1_PISE_MASK 0x00010000 /* PCI init seq. enable */ diff --git a/arch/powerpc/include/asm/ppc440sp.h b/arch/powerpc/include/asm/ppc440sp.h index 4387495..cc2ff68 100644 --- a/arch/powerpc/include/asm/ppc440sp.h +++ b/arch/powerpc/include/asm/ppc440sp.h @@ -67,7 +67,7 @@ #define PLLD_LFBDV_MASK 0x0000003f /* PLL Local Feedback Divisor */ #define OPBDDV_MASK 0x03000000 /* OPB Clock Divisor Register */ -#define PERDV_MASK 0x07000000 /* Periferal Clock Divisor */ +#define PERDV_MASK 0x07000000 /* Peripheral Clock Divisor */ #define PRADV_MASK 0x07000000 /* Primary Divisor A */ #define PRBDV_MASK 0x07000000 /* Primary Divisor B */ #define SPCID_MASK 0x03000000 /* Sync PCI Divisor */ @@ -77,7 +77,7 @@ #define PLLSYS1_PERCLK_DIV_MASK 0x03000000 /* Peripheral Clk Divisor */ #define PLLSYS1_MAL_DIV_MASK 0x00c00000 /* MAL Clk Divisor */ #define PLLSYS1_RW_MASK 0x00300000 /* ROM width */ -#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Addres reset vector */ +#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Address reset vector */ #define PLLSYS1_PAE_MASK 0x00040000 /* PCI arbitor enable */ #define PLLSYS1_PCHE_MASK 0x00020000 /* PCI host config enable */ #define PLLSYS1_PISE_MASK 0x00010000 /* PCI init seq. enable */ diff --git a/arch/powerpc/include/asm/ppc440spe.h b/arch/powerpc/include/asm/ppc440spe.h index bad9a40..d59d7d2 100644 --- a/arch/powerpc/include/asm/ppc440spe.h +++ b/arch/powerpc/include/asm/ppc440spe.h @@ -83,7 +83,7 @@ #define PLLD_LFBDV_MASK 0x0000003f /* PLL Local Feedback Divisor */ #define OPBDDV_MASK 0x03000000 /* OPB Clock Divisor Register */ -#define PERDV_MASK 0x07000000 /* Periferal Clock Divisor */ +#define PERDV_MASK 0x07000000 /* Peripheral Clock Divisor */ #define PRADV_MASK 0x07000000 /* Primary Divisor A */ #define PRBDV_MASK 0x07000000 /* Primary Divisor B */ #define SPCID_MASK 0x03000000 /* Sync PCI Divisor */ @@ -93,7 +93,7 @@ #define PLLSYS1_PERCLK_DIV_MASK 0x03000000 /* Peripheral Clk Divisor */ #define PLLSYS1_MAL_DIV_MASK 0x00c00000 /* MAL Clk Divisor */ #define PLLSYS1_RW_MASK 0x00300000 /* ROM width */ -#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Addres reset vector */ +#define PLLSYS1_EAR_MASK 0x00080000 /* ERAP Address reset vector */ #define PLLSYS1_PAE_MASK 0x00040000 /* PCI arbitor enable */ #define PLLSYS1_PCHE_MASK 0x00020000 /* PCI host config enable */ #define PLLSYS1_PISE_MASK 0x00010000 /* PCI init seq. enable */ diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 9c4651a..0c4cc25 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -938,6 +938,10 @@ #define PVR_85xx 0x80200000 #define PVR_85xx_REV1 (PVR_85xx | 0x0010) #define PVR_85xx_REV2 (PVR_85xx | 0x0020) +#define PVR_VER_E500_V1 0x8020 +#define PVR_VER_E500_V2 0x8021 +#define PVR_VER_E500MC 0x8023 +#define PVR_VER_E5500 0x8024 #define PVR_86xx 0x80040000 diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index aaa5add..22bbc52 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -932,8 +932,6 @@ void board_init_r (gd_t *id, ulong dest_addr) udelay (20); - set_timer (0); - /* Initialize from environment */ if ((s = getenv ("loadaddr")) != NULL) { load_addr = simple_strtoul (s, NULL, 16); diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index e01787d..1375474 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -87,7 +87,7 @@ static void boot_jump_linux(bootm_headers_t *images) * r8: 0 * r9: 0 */ -#if defined(CONFIG_85xx) || defined(CONFIG_440) +#if defined(CONFIG_MPC85xx) || defined(CONFIG_440) #define EPAPR_MAGIC (0x45504150) #else #define EPAPR_MAGIC (0x65504150) @@ -226,6 +226,24 @@ static int boot_bd_t_linux(bootm_headers_t *images) return ret; } +/* + * Verify the device tree. + * + * This function is called after all device tree fix-ups have been enacted, + * so that the final device tree can be verified. The definition of "verified" + * is up to the specific implementation. However, it generally means that the + * addresses of some of the devices in the device tree are compared with the + * actual addresses at which U-Boot has placed them. + * + * Returns 1 on success, 0 on failure. If 0 is returned, U-boot will halt the + * boot process. + */ +static int __ft_verify_fdt(void *fdt) +{ + return 1; +} +__attribute__((weak, alias("__ft_verify_fdt"))) int ft_verify_fdt(void *fdt); + static int boot_body_linux(bootm_headers_t *images) { ulong rd_len; @@ -288,14 +306,19 @@ static int boot_body_linux(bootm_headers_t *images) return ret; of_size = ret; - if (*initrd_start && *initrd_end) + if (*initrd_start && *initrd_end) { of_size += FDT_RAMDISK_OVERHEAD; + fdt_set_totalsize(*of_flat_tree, of_size); + } /* Create a new LMB reservation */ lmb_reserve(lmb, (ulong)*of_flat_tree, of_size); /* fixup the initrd now that we know where it should be */ if (*initrd_start && *initrd_end) fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1); + + if (!ft_verify_fdt(*of_flat_tree)) + return -1; } #endif /* CONFIG_OF_LIBFDT */ return 0; diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c index f603170..aeae413 100644 --- a/arch/powerpc/lib/interrupts.c +++ b/arch/powerpc/lib/interrupts.c @@ -137,17 +137,7 @@ void timer_interrupt (struct pt_regs *regs) #endif /* CONFIG_SHOW_ACTIVITY */ } -void reset_timer (void) -{ - timestamp = 0; -} - ulong get_timer (ulong base) { return (timestamp - base); } - -void set_timer (ulong t) -{ - timestamp = t; -} diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index ed91643..90fe796 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -22,7 +22,6 @@ #include <command.h> #include <malloc.h> #include <stdio_dev.h> -#include <timestamp.h> #include <version.h> #include <watchdog.h> #include <net.h> @@ -39,8 +38,6 @@ extern int board_init(void); extern int dram_init(void); extern int timer_init(void); -const char version_string[] = U_BOOT_VERSION" ("U_BOOT_DATE" - "U_BOOT_TIME")"; - unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; #ifndef CONFIG_SYS_NO_FLASH diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index bc1656f..c70baed 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -139,18 +139,6 @@ unsigned long get_timer (unsigned long base) return tick_to_time(get_ticks()) - base; } -void set_timer (unsigned long t) -{ - writel((0 - t), TCNT0); -} - -void reset_timer (void) -{ - tmu_timer_stop(0); - set_timer (0); - tmu_timer_start(0); -} - unsigned long get_tbclk (void) { return timer_freq; diff --git a/arch/sh/lib/time_sh2.c b/arch/sh/lib/time_sh2.c index 789b46f..5827118 100644 --- a/arch/sh/lib/time_sh2.c +++ b/arch/sh/lib/time_sh2.c @@ -54,7 +54,7 @@ int timer_init(void) /* User Device 0 only */ cmt_timer_stop(0); - set_timer(CMT_TIMER_RESET); + writew(CMT_TIMER_RESET, CMCOR_0); cmt_timer_start(0); return 0; @@ -90,19 +90,6 @@ ulong get_timer(ulong base) return (get_usec() / 1000) - base; } -void set_timer(ulong t) -{ - writew((u16) t, CMCOR_0); -} - -void reset_timer(void) -{ - cmt_timer_stop(0); - set_timer(CMT_TIMER_RESET); - cmt0_timer = 0; - cmt_timer_start(0); -} - void __udelay(unsigned long usec) { unsigned long end = get_usec() + usec; diff --git a/arch/sparc/cpu/leon2/start.S b/arch/sparc/cpu/leon2/start.S index f22fb7e..9cd6c66 100644 --- a/arch/sparc/cpu/leon2/start.S +++ b/arch/sparc/cpu/leon2/start.S @@ -28,7 +28,6 @@ #include <asm/psr.h> #include <asm/stack.h> #include <asm/leon.h> -#include <timestamp.h> #include <version.h> /* Entry for traps which jump to a programmer-specified trap handler. */ @@ -200,9 +199,7 @@ _trap_table: .data .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .section ".text" .align 4 diff --git a/arch/sparc/cpu/leon3/start.S b/arch/sparc/cpu/leon3/start.S index 56ae88d..1e393a5 100644 --- a/arch/sparc/cpu/leon3/start.S +++ b/arch/sparc/cpu/leon3/start.S @@ -28,7 +28,6 @@ #include <asm/psr.h> #include <asm/stack.h> #include <asm/leon.h> -#include <timestamp.h> #include <version.h> /* Entry for traps which jump to a programmer-specified trap handler. */ @@ -201,9 +200,7 @@ _trap_table: .extern leon3_snooping_avail .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" .section ".text" .align 4 diff --git a/arch/sparc/cpu/leon3/usb_uhci.c b/arch/sparc/cpu/leon3/usb_uhci.c index 8f99e1d..b1269d2 100644 --- a/arch/sparc/cpu/leon3/usb_uhci.c +++ b/arch/sparc/cpu/leon3/usb_uhci.c @@ -70,7 +70,7 @@ * * Interrupt Transfers. * -------------------- - * For Interupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They + * For Interrupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They * will be inserted after the appropriate (depending the interval setting) skeleton TD. * If an interrupt has been detected the dev->irqhandler is called. The status and number * of transfered bytes is stored in dev->irq_status resp. dev->irq_act_len. If the diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c index 386cd04..6b705e5 100644 --- a/arch/sparc/lib/board.c +++ b/arch/sparc/lib/board.c @@ -365,8 +365,6 @@ void board_init_f(ulong bootflag) udelay(20); - set_timer(0); - /* Initialize from environment */ if ((s = getenv("loadaddr")) != NULL) { load_addr = simple_strtoul(s, NULL, 16); diff --git a/arch/sparc/lib/interrupts.c b/arch/sparc/lib/interrupts.c index 4c73b82..61ee90b 100644 --- a/arch/sparc/lib/interrupts.c +++ b/arch/sparc/lib/interrupts.c @@ -90,26 +90,16 @@ void timer_interrupt(struct pt_regs *regs) timestamp++; } -void reset_timer(void) -{ - timestamp = 0; -} - ulong get_timer(ulong base) { return (timestamp - base); } -void set_timer(ulong t) -{ - timestamp = t; -} - void timer_interrupt_init(void) { int irq; - reset_timer(); + timestamp = 0; irq = timer_interrupt_init_cpu(); diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 7ccc076..6c84c43 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -66,7 +66,7 @@ _start: movw %ax, %es movw %ax, %ss - /* Clear the interupt vectors */ + /* Clear the interrupt vectors */ lidt blank_idt_ptr /* Early platform init (setup gpio, etc ) */ diff --git a/arch/x86/include/asm/interrupt.h b/arch/x86/include/asm/interrupt.h index be52fe4..f33f8ed 100644 --- a/arch/x86/include/asm/interrupt.h +++ b/arch/x86/include/asm/interrupt.h @@ -32,7 +32,7 @@ /* arch/x86/cpu/interrupts.c */ void set_vector(u8 intnum, void *routine); -/* arch/x86/lib/interupts.c */ +/* arch/x86/lib/interrupts.c */ void disable_irq(int irq); void enable_irq(int irq); diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 944e1a2..4f0d2c7 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -36,7 +36,6 @@ typedef void (timer_fnc_t) (void); int register_timer_isr (timer_fnc_t *isr_func); /* Architecture specific - can be in arch/x86/cpu/, arch/x86/lib/, or $(BOARD)/ */ -int timer_init(void); int dram_init_f(void); /* cpu/.../interrupts.c */ diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index df54222..af375dd 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -35,7 +35,6 @@ #include <watchdog.h> #include <command.h> #include <stdio_dev.h> -#include <timestamp.h> #include <version.h> #include <malloc.h> #include <net.h> @@ -66,9 +65,6 @@ extern ulong __rel_dyn_end; extern ulong __bss_start; extern ulong __bss_end; -const char version_string[] = - U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"; - /************************************************************************ * Init Utilities * ************************************************************************ @@ -363,8 +359,6 @@ void board_init_r(gd_t *id, ulong dest_addr) udelay(20); - set_timer (0); - /* Initialize from environment */ if ((s = getenv ("loadaddr")) != NULL) { load_addr = simple_strtoul (s, NULL, 16); diff --git a/arch/x86/lib/timer.c b/arch/x86/lib/timer.c index 8fc68cd..a822d66 100644 --- a/arch/x86/lib/timer.c +++ b/arch/x86/lib/timer.c @@ -94,17 +94,7 @@ void timer_isr(void *unused) } } -void reset_timer (void) -{ - system_ticks = 0; -} - ulong get_timer (ulong base) { return (system_ticks - base); } - -void set_timer (ulong t) -{ - system_ticks = t; -} |