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-rw-r--r--arch/arm/include/asm/arch-davinci/emac_defs.h1
-rw-r--r--arch/arm/lib/board.c19
-rw-r--r--arch/microblaze/cpu/start.S60
-rw-r--r--arch/microblaze/include/asm/byteorder.h4
-rw-r--r--arch/microblaze/lib/board.c12
-rw-r--r--arch/powerpc/cpu/74xx_7xx/start.S16
-rw-r--r--arch/powerpc/cpu/mpc512x/start.S3
-rw-r--r--arch/powerpc/cpu/mpc5xx/start.S16
-rw-r--r--arch/powerpc/cpu/mpc5xxx/start.S17
-rw-r--r--arch/powerpc/cpu/mpc8220/start.S17
-rw-r--r--arch/powerpc/cpu/mpc824x/start.S17
-rw-r--r--arch/powerpc/cpu/mpc8260/start.S18
-rw-r--r--arch/powerpc/cpu/mpc83xx/start.S19
-rw-r--r--arch/powerpc/cpu/mpc85xx/start.S2
-rw-r--r--arch/powerpc/cpu/mpc86xx/start.S15
-rw-r--r--arch/powerpc/cpu/mpc8xx/start.S16
-rw-r--r--arch/powerpc/cpu/ppc4xx/start.S6
-rw-r--r--arch/powerpc/lib/board.c17
18 files changed, 91 insertions, 184 deletions
diff --git a/arch/arm/include/asm/arch-davinci/emac_defs.h b/arch/arm/include/asm/arch-davinci/emac_defs.h
index 35a1585..76493a1 100644
--- a/arch/arm/include/asm/arch-davinci/emac_defs.h
+++ b/arch/arm/include/asm/arch-davinci/emac_defs.h
@@ -367,7 +367,6 @@ typedef struct {
int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data);
int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data);
-void davinci_eth_set_mac_addr(const u_int8_t *addr);
typedef struct
{
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 5f2dfd0..22bd2c9 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -409,15 +409,6 @@ void start_armboot (void)
enable_interrupts ();
/* Perform network card initialisation if necessary */
-#ifdef CONFIG_DRIVER_TI_EMAC
- /* XXX: this needs to be moved to board init */
-extern void davinci_eth_set_mac_addr (const u_int8_t *addr);
- if (getenv ("ethaddr")) {
- uchar enetaddr[6];
- eth_getenv_enetaddr("ethaddr", enetaddr);
- davinci_eth_set_mac_addr(enetaddr);
- }
-#endif
#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96)
/* XXX: this needs to be moved to board init */
@@ -821,16 +812,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
enable_interrupts ();
/* Perform network card initialisation if necessary */
-#ifdef CONFIG_DRIVER_TI_EMAC
- /* XXX: this needs to be moved to board init */
-extern void davinci_eth_set_mac_addr (const u_int8_t *addr);
- if (getenv ("ethaddr")) {
- uchar enetaddr[6];
- eth_getenv_enetaddr("ethaddr", enetaddr);
- davinci_eth_set_mac_addr(enetaddr);
- }
-#endif
-
#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96)
/* XXX: this needs to be moved to board init */
if (getenv ("ethaddr")) {
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 2e9a08d..7f60434 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -32,6 +32,22 @@ _start:
mts rmsr, r0 /* disable cache */
addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
addi r1, r1, -4 /* Decrement SP to top of memory */
+
+ /* Find-out if u-boot is running on BIG/LITTLE endian platform
+ * There are some steps which is necessary to keep in mind:
+ * 1. Setup offset value to r6
+ * 2. Store word offset value to address 0x0
+ * 3. Load just byte from address 0x0
+ * 4a) LITTLE endian - r10 contains 0x2 because it is the smallest
+ * value that's why is on address 0x0
+ * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
+ */
+ addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
+ swi r6, r0, 0
+ lbui r10, r0, 0
+ swi r6, r0, 0x40
+ swi r10, r0, 0x50
+
/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
addi r6, r0, 0xb0000000 /* hex b000 opcode imm */
swi r6, r0, 0x0 /* reset address */
@@ -75,26 +91,52 @@ _start:
/* user_vector_exception */
addik r6, r0, _exception_handler
sw r6, r1, r0
- lhu r7, r1, r0
- shi r7, r0, 0xa
- shi r6, r0, 0xe
+ /*
+ * BIG ENDIAN memory map for user exception
+ * 0x8: 0xB000XXXX
+ * 0xC: 0xB808XXXX
+ *
+ * then it is necessary to count address for storing the most significant
+ * 16bits from _exception_handler address and copy it to
+ * 0xa address. Big endian use offset in r10=0 that's why is it just
+ * 0xa address. The same is done for the least significant 16 bits
+ * for 0xe address.
+ *
+ * LITTLE ENDIAN memory map for user exception
+ * 0x8: 0xXXXX00B0
+ * 0xC: 0xXXXX08B8
+ *
+ * Offset is for little endian setup to 0x2. rsubi instruction decrease
+ * address value to ensure that points to proper place which is
+ * 0x8 for the most significant 16 bits and
+ * 0xC for the least significant 16 bits
+ */
+ lhu r7, r1, r10
+ rsubi r8, r10, 0xa
+ sh r7, r0, r8
+ rsubi r8, r10, 0xe
+ sh r6, r0, r8
#endif
#ifdef CONFIG_SYS_INTC_0
/* interrupt_handler */
addik r6, r0, _interrupt_handler
sw r6, r1, r0
- lhu r7, r1, r0
- shi r7, r0, 0x12
- shi r6, r0, 0x16
+ lhu r7, r1, r10
+ rsubi r8, r10, 0x12
+ sh r7, r0, r8
+ rsubi r8, r10, 0x16
+ sh r6, r0, r8
#endif
/* hardware exception */
addik r6, r0, _hw_exception_handler
sw r6, r1, r0
- lhu r7, r1, r0
- shi r7, r0, 0x22
- shi r6, r0, 0x26
+ lhu r7, r1, r10
+ rsubi r8, r10, 0x22
+ sh r7, r0, r8
+ rsubi r8, r10, 0x26
+ sh r6, r0, r8
/* enable instruction and data cache */
mfs r12, rmsr
diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
index a4a75b7..b2757a4 100644
--- a/arch/microblaze/include/asm/byteorder.h
+++ b/arch/microblaze/include/asm/byteorder.h
@@ -50,6 +50,10 @@ static __inline__ __u16 ___arch__swab16 (__u16 half_word)
#endif /* __GNUC__ */
+#ifdef __MICROBLAZEEL__
+#include <linux/byteorder/little_endian.h>
+#else
#include <linux/byteorder/big_endian.h>
+#endif
#endif /* __MICROBLAZE_BYTEORDER_H__ */
diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c
index 3ff5c17..0ce040e 100644
--- a/arch/microblaze/lib/board.c
+++ b/arch/microblaze/lib/board.c
@@ -31,6 +31,7 @@
#include <version.h>
#include <watchdog.h>
#include <stdio_dev.h>
+#include <net.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +43,7 @@ extern int gpio_init (void);
#ifdef CONFIG_SYS_INTC_0
extern int interrupts_init (void);
#endif
+
#if defined(CONFIG_CMD_NET)
extern int eth_init (bd_t * bis);
#endif
@@ -165,8 +167,14 @@ void board_init (void)
#if defined(CONFIG_CMD_NET)
/* IP Address */
- bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
- eth_init (bd);
+ bd->bi_ip_addr = getenv_IPaddr("ipaddr");
+
+ printf("Net: ");
+ eth_initialize(gd->bd);
+
+ uchar enetaddr[6];
+ eth_getenv_enetaddr("ethaddr", enetaddr);
+ printf("MAC: %pM\n", enetaddr);
#endif
/* main_loop */
diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S
index a36af5a..47694aa 100644
--- a/arch/powerpc/cpu/74xx_7xx/start.S
+++ b/arch/powerpc/cpu/74xx_7xx/start.S
@@ -94,17 +94,7 @@ version_string:
. = EXC_OFF_SYS_RESET
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
b boot_cold
- sync
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
- sync
/* the boot code is located below the exception table */
@@ -188,7 +178,6 @@ _end_of_vectors:
. = 0x2000
boot_cold:
-boot_warm:
/* disable everything */
li r0, 0
mtspr HID0, r0
@@ -288,14 +277,11 @@ in_flash:
bl cpu_init_f
sync
- mr r3, r21
-
- /* r3: BOOTFLAG */
/* run 1st part of board init code (from Flash) */
bl board_init_f
sync
- /* NOTREACHED */
+ /* NOTREACHED - board_init_f() does not return */
.globl invalidate_bats
invalidate_bats:
diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S
index d26b617..1047c51 100644
--- a/arch/powerpc/cpu/mpc512x/start.S
+++ b/arch/powerpc/cpu/mpc512x/start.S
@@ -100,7 +100,6 @@ version_string:
.globl _start
/* Start from here after reset/power on */
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
b boot_cold
.globl _start_of_vectors
@@ -260,8 +259,6 @@ in_flash:
/* run low-level CPU init code (in Flash) */
bl cpu_init_f
- /* r3: BOOTFLAG */
- mr r3, r21
/* run 1st part of board init code (in Flash) */
bl board_init_f
diff --git a/arch/powerpc/cpu/mpc5xx/start.S b/arch/powerpc/cpu/mpc5xx/start.S
index 0af879e..4fd9b63 100644
--- a/arch/powerpc/cpu/mpc5xx/start.S
+++ b/arch/powerpc/cpu/mpc5xx/start.S
@@ -91,18 +91,6 @@ _start:
li r4, CONFIG_SYS_ISB /* Set ISB bit */
or r3, r3, r4
mtspr 638, r3
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x20
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
-
-boot_cold:
-boot_warm:
/* Initialize machine status; enable machine check interrupt */
/*----------------------------------------------------------------------*/
@@ -188,10 +176,10 @@ in_flash:
/* r3: IMMR */
bl cpu_init_f /* run low-level CPU init code (from Flash) */
- mr r3, r21
- /* r3: BOOTFLAG */
bl board_init_f /* run 1st part of board init code (from Flash) */
+ /* NOTREACHED - board_init_f() does not return */
+
.globl _start_of_vectors
_start_of_vectors:
diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S
index 8b9f09b..1385869 100644
--- a/arch/powerpc/cpu/mpc5xxx/start.S
+++ b/arch/powerpc/cpu/mpc5xxx/start.S
@@ -89,19 +89,6 @@ version_string:
. = EXC_OFF_SYS_RESET
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On */
- nop
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
-
-boot_cold:
-boot_warm:
mfmsr r5 /* save msr contents */
/* Move CSBoot and adjust instruction pointer */
@@ -175,10 +162,10 @@ lowboot_reentry:
/* r3: IMMR */
bl cpu_init_f /* run low-level CPU init code (in Flash)*/
- mr r3, r21
- /* r3: BOOTFLAG */
bl board_init_f /* run 1st part of board init code (in Flash)*/
+ /* NOTREACHED - board_init_f() does not return */
+
/*
* Vector Table
*/
diff --git a/arch/powerpc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S
index 3d79d8e..c156e25 100644
--- a/arch/powerpc/cpu/mpc8220/start.S
+++ b/arch/powerpc/cpu/mpc8220/start.S
@@ -88,19 +88,6 @@ version_string:
. = EXC_OFF_SYS_RESET
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On */
- nop
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
-
-boot_cold:
-boot_warm:
mfmsr r5 /* save msr contents */
/* replace default MBAR base address from 0x80000000
@@ -144,10 +131,10 @@ boot_warm:
/* r3: IMMR */
bl cpu_init_f /* run low-level CPU init code (in Flash)*/
- mr r3, r21
- /* r3: BOOTFLAG */
bl board_init_f /* run 1st part of board init code (in Flash)*/
+ /* NOTREACHED - board_init_f() does not return */
+
/*
* Vector Table
*/
diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S
index f3f595a..5b126bb 100644
--- a/arch/powerpc/cpu/mpc824x/start.S
+++ b/arch/powerpc/cpu/mpc824x/start.S
@@ -97,19 +97,6 @@ version_string:
. = EXC_OFF_SYS_RESET
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
-
-boot_cold:
-boot_warm:
-
/* Initialize machine status; enable machine check interrupt */
/*----------------------------------------------------------------------*/
li r3, MSR_KERNEL /* Set FP, ME, RI flags */
@@ -198,10 +185,10 @@ in_flash:
/* r3: IMMR */
bl cpu_init_f /* run low-level CPU init code (from Flash) */
- mr r3, r21
- /* r3: BOOTFLAG */
bl board_init_f /* run 1st part of board init code (from Flash) */
+ /* NOTREACHED - board_init_f() does not return */
+
.globl _start_of_vectors
_start_of_vectors:
diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S
index a435042..9485afa 100644
--- a/arch/powerpc/cpu/mpc8260/start.S
+++ b/arch/powerpc/cpu/mpc8260/start.S
@@ -161,18 +161,6 @@ _hrcw_table:
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/
- nop
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
-
-boot_cold:
#if defined(CONFIG_MPC8260ADS) && defined(CONFIG_SYS_DEFAULT_IMMR)
lis r3, CONFIG_SYS_DEFAULT_IMMR@h
nop
@@ -185,7 +173,7 @@ boot_cold:
stw r4, 0(r3)
nop
#endif /* CONFIG_MPC8260ADS && CONFIG_SYS_DEFAULT_IMMR */
-boot_warm:
+
mfmsr r5 /* save msr contents */
#if defined(CONFIG_COGENT)
@@ -254,10 +242,10 @@ in_flash:
bl init_debug /* set up debugging stuff */
#endif
- mr r3, r21
- /* r3: BOOTFLAG */
bl board_init_f /* run 1st part of board init code (in Flash)*/
+ /* NOTREACHED - board_init_f() does not return */
+
/*
* Vector Table
*/
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index c7d85a8..bdce915 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -183,22 +183,9 @@ ppcDWload:
.globl _start
_start: /* time t 0 */
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/
- nop
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
-
-
-boot_cold: /* time t 3 */
lis r4, CONFIG_DEFAULT_IMMR@h
nop
-boot_warm: /* time t 5 */
+
mfmsr r5 /* save msr contents */
/* 83xx manuals prescribe a specific sequence for updating IMMRBAR. */
@@ -302,11 +289,11 @@ in_flash:
/* run low-level CPU init code (in Flash)*/
bl cpu_init_f
- /* r3: BOOTFLAG */
- mr r3, r21
/* run 1st part of board init code (in Flash)*/
bl board_init_f
+ /* NOTREACHED - board_init_f() does not return */
+
#ifndef CONFIG_NAND_SPL
/*
* Vector Table
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 3278b10..91096ad 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -432,6 +432,8 @@ _start_cont:
bl board_init_f
isync
+ /* NOTREACHED - board_init_f() does not return */
+
#ifndef CONFIG_NAND_SPL
. = EXC_OFF_SYS_RESET
.globl _start_of_vectors
diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S
index ed1e4ca..596053f 100644
--- a/arch/powerpc/cpu/mpc86xx/start.S
+++ b/arch/powerpc/cpu/mpc86xx/start.S
@@ -83,17 +83,7 @@ version_string:
. = EXC_OFF_SYS_RESET
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
b boot_cold
- sync
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
- sync
/* the boot code is located below the exception table */
@@ -166,7 +156,6 @@ _end_of_vectors:
. = 0x2000
boot_cold:
-boot_warm:
/*
* NOTE: Only Cpu 0 will ever come here. Other cores go to an
* address specified by the BPTR
@@ -303,14 +292,12 @@ diag_done:
#endif
/* bl l2cache_enable */
- mr r3, r21
- /* r3: BOOTFLAG */
/* run 1st part of board init code (from Flash) */
bl board_init_f
sync
- /* NOTREACHED */
+ /* NOTREACHED - board_init_f() does not return */
.globl invalidate_bats
invalidate_bats:
diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S
index 7cf602f..d6100ec 100644
--- a/arch/powerpc/cpu/mpc8xx/start.S
+++ b/arch/powerpc/cpu/mpc8xx/start.S
@@ -96,18 +96,6 @@ version_string:
_start:
lis r3, CONFIG_SYS_IMMR@h /* position IMMR */
mtspr 638, r3
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
-
-boot_cold:
-boot_warm:
/* Initialize machine status; enable machine check interrupt */
/*----------------------------------------------------------------------*/
@@ -202,10 +190,10 @@ in_flash:
/* r3: IMMR */
bl cpu_init_f /* run low-level CPU init code (from Flash) */
- mr r3, r21
- /* r3: BOOTFLAG */
bl board_init_f /* run 1st part of board init code (from Flash) */
+ /* NOTREACHED - board_init_f() does not return */
+
.globl _start_of_vectors
_start_of_vectors:
diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index c2d52bf..03bde4d 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -261,6 +261,7 @@
GET_GOT
bl cpu_init_f /* run low-level CPU init code (from Flash) */
bl board_init_f
+ /* NOTREACHED - board_init_f() does not return */
#endif
#if defined(CONFIG_SYS_RAMBOOT)
@@ -803,6 +804,7 @@ _start:
bl cpu_init_f /* run low-level CPU init code (from Flash) */
bl board_init_f
+ /* NOTREACHED - board_init_f() does not return */
#endif
#endif /* CONFIG_440 */
@@ -911,6 +913,7 @@ _start:
GET_GOT /* initialize GOT access */
bl board_init_f /* run first part of init code (from Flash) */
+ /* NOTREACHED - board_init_f() does not return */
#endif /* CONFIG_IOP480 */
@@ -1180,8 +1183,9 @@ _start:
bl cpu_init_f /* run low-level CPU init code (from Flash) */
- /* NEVER RETURNS! */
bl board_init_f /* run first part of init code (from Flash) */
+ /* NOTREACHED - board_init_f() does not return */
+
#endif /* CONFIG_NAND_SPL */
#endif /* CONFIG_405GP || CONFIG_405CR || CONFIG_405 || CONFIG_405EP */
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index bfdfa86..529f719 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -480,6 +480,7 @@ void board_init_f (ulong bootflag)
*/
addr_sp -= sizeof (bd_t);
bd = (bd_t *) addr_sp;
+ memset(bd, 0, sizeof(bd_t));
gd->bd = bd;
debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof (bd_t), addr_sp);
@@ -512,9 +513,6 @@ void board_init_f (ulong bootflag)
#ifdef CONFIG_SYS_SRAM_BASE
bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */
-#else
- bd->bi_sramstart = 0;
- bd->bi_sramsize = 0;
#endif
#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
@@ -739,14 +737,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
bd->bi_flashoffset = TEXT_BASE + flash_size;
# elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
-# else
- bd->bi_flashoffset = 0;
# endif
-#else /* CONFIG_SYS_NO_FLASH */
-
- bd->bi_flashsize = 0;
- bd->bi_flashstart = 0;
- bd->bi_flashoffset = 0;
#endif /* !CONFIG_SYS_NO_FLASH */
WATCHDOG_RESET ();
@@ -803,14 +794,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
if (s && ((*s == 'y') || (*s == 'Y'))) {
bd->bi_iic_fast[0] = 1;
bd->bi_iic_fast[1] = 1;
- } else {
- bd->bi_iic_fast[0] = 0;
- bd->bi_iic_fast[1] = 0;
}
}
-#else
- bd->bi_iic_fast[0] = 0;
- bd->bi_iic_fast[1] = 0;
#endif /* CONFIG_I2CFAST */
#endif /* CONFIG_405GP, CONFIG_405EP */
#endif /* CONFIG_SYS_EXTBDINFO */