353 files changed, 1840 insertions, 567 deletions

diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
index b33e97b..513c635 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -2773,6 +2773,57 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_SKAT91_S3E           2790
 #define MACH_TYPE_OMAP4_PANDA          2791
 #define MACH_TYPE_DF7220               2792
+#define MACH_TYPE_NEMINI               2793
+#define MACH_TYPE_T8200                2794
+#define MACH_TYPE_APF51                2795
+#define MACH_TYPE_DR_RC_UNIT           2796
+#define MACH_TYPE_BORDEAUX             2797
+#define MACH_TYPE_CATANIA_B            2798
+#define MACH_TYPE_MX51_OCEAN           2799
+#define MACH_TYPE_TI8168EVM            2800
+#define MACH_TYPE_NEOCOREOMAP          2801
+#define MACH_TYPE_WITHINGS_WBP         2802
+#define MACH_TYPE_DBPS                 2803
+#define MACH_TYPE_SBC9261              2804
+#define MACH_TYPE_PCBFP0001            2805
+#define MACH_TYPE_SPEEDY               2806
+#define MACH_TYPE_CHRYSAOR             2807
+#define MACH_TYPE_TANGO                2808
+#define MACH_TYPE_SYNOLOGY_DSX11       2809
+#define MACH_TYPE_HANLIN_V3EXT         2810
+#define MACH_TYPE_HANLIN_V5            2811
+#define MACH_TYPE_HANLIN_V3PLUS        2812
+#define MACH_TYPE_IRIVER_STORY         2813
+#define MACH_TYPE_IREX_ILIAD           2814
+#define MACH_TYPE_IREX_DR1000          2815
+#define MACH_TYPE_TETON_BGA            2816
+#define MACH_TYPE_SNAPPER9G45          2817
+#define MACH_TYPE_TAM3517              2818
+#define MACH_TYPE_PDC100               2819
+#define MACH_TYPE_EUKREA_CPUIMX25      2820
+#define MACH_TYPE_EUKREA_CPUIMX35      2821
+#define MACH_TYPE_EUKREA_CPUIMX51SD    2822
+#define MACH_TYPE_EUKREA_CPUIMX51      2823
+#define MACH_TYPE_P565                 2824
+#define MACH_TYPE_ACER_A4              2825
+#define MACH_TYPE_DAVINCI_DM368_BIP    2826
+#define MACH_TYPE_ESHARE               2827
+#define MACH_TYPE_HW_OMAPL138_EUROPA   2828
+#define MACH_TYPE_WLBARGN              2829
+#define MACH_TYPE_BM170                2830
+#define MACH_TYPE_NETSPACE_MINI_V2     2831
+#define MACH_TYPE_NETSPACE_PLUG_V2     2832
+#define MACH_TYPE_SIEMENS_L1           2833
+#define MACH_TYPE_ELV_LCU1             2834
+#define MACH_TYPE_MCU1                 2835
+#define MACH_TYPE_OMAP3_TAO3530        2836
+#define MACH_TYPE_OMAP3_PCUTOUCH       2837
+#define MACH_TYPE_SMDKC210             2838
+#define MACH_TYPE_OMAP3_BRAILLO        2839
+#define MACH_TYPE_SPYPLUG              2840
+#define MACH_TYPE_GINGER               2841
+#define MACH_TYPE_TNY_T3530            2842
+#define MACH_TYPE_PCA102               2843
 
 #ifdef CONFIG_ARCH_EBSA110
 # ifdef machine_arch_type
@@ -33573,9 +33624,9 @@ extern unsigned int __machine_arch_type;
 # else
 #  define machine_arch_type	MACH_TYPE_DAVINCI_CIO
 # endif
-# define machine_is_davinci_cio()	(machine_arch_type == MACH_TYPE_DAVINCI_CIO)
+# define machine_is_davinci_dm6467_cio()	(machine_arch_type == MACH_TYPE_DAVINCI_CIO)
 #else
-# define machine_is_davinci_cio()	(0)
+# define machine_is_davinci_dm6467_cio()	(0)
 #endif
 
 #ifdef CONFIG_MACH_SMARTMETER_DL
@@ -35906,6 +35957,618 @@ extern unsigned int __machine_arch_type;
 # define machine_is_df7220()	(0)
 #endif
 
+#ifdef CONFIG_MACH_NEMINI
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NEMINI
+# endif
+# define machine_is_nemini()	(machine_arch_type == MACH_TYPE_NEMINI)
+#else
+# define machine_is_nemini()	(0)
+#endif
+
+#ifdef CONFIG_MACH_T8200
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_T8200
+# endif
+# define machine_is_t8200()	(machine_arch_type == MACH_TYPE_T8200)
+#else
+# define machine_is_t8200()	(0)
+#endif
+
+#ifdef CONFIG_MACH_APF51
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_APF51
+# endif
+# define machine_is_apf51()	(machine_arch_type == MACH_TYPE_APF51)
+#else
+# define machine_is_apf51()	(0)
+#endif
+
+#ifdef CONFIG_MACH_DR_RC_UNIT
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DR_RC_UNIT
+# endif
+# define machine_is_dr_rc_unit()	(machine_arch_type == MACH_TYPE_DR_RC_UNIT)
+#else
+# define machine_is_dr_rc_unit()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BORDEAUX
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BORDEAUX
+# endif
+# define machine_is_bordeaux()	(machine_arch_type == MACH_TYPE_BORDEAUX)
+#else
+# define machine_is_bordeaux()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CATANIA_B
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CATANIA_B
+# endif
+# define machine_is_catania_b()	(machine_arch_type == MACH_TYPE_CATANIA_B)
+#else
+# define machine_is_catania_b()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MX51_OCEAN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MX51_OCEAN
+# endif
+# define machine_is_mx51_ocean()	(machine_arch_type == MACH_TYPE_MX51_OCEAN)
+#else
+# define machine_is_mx51_ocean()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TI8168EVM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TI8168EVM
+# endif
+# define machine_is_ti8168evm()	(machine_arch_type == MACH_TYPE_TI8168EVM)
+#else
+# define machine_is_ti8168evm()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NEOCOREOMAP
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NEOCOREOMAP
+# endif
+# define machine_is_neocoreomap()	(machine_arch_type == MACH_TYPE_NEOCOREOMAP)
+#else
+# define machine_is_neocoreomap()	(0)
+#endif
+
+#ifdef CONFIG_MACH_WITHINGS_WBP
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_WITHINGS_WBP
+# endif
+# define machine_is_withings_wbp()	(machine_arch_type == MACH_TYPE_WITHINGS_WBP)
+#else
+# define machine_is_withings_wbp()	(0)
+#endif
+
+#ifdef CONFIG_MACH_DBPS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DBPS
+# endif
+# define machine_is_dbps()	(machine_arch_type == MACH_TYPE_DBPS)
+#else
+# define machine_is_dbps()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SBC9261
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SBC9261
+# endif
+# define machine_is_at91sam9261()	(machine_arch_type == MACH_TYPE_SBC9261)
+#else
+# define machine_is_at91sam9261()	(0)
+#endif
+
+#ifdef CONFIG_MACH_PCBFP0001
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_PCBFP0001
+# endif
+# define machine_is_pcbfp0001()	(machine_arch_type == MACH_TYPE_PCBFP0001)
+#else
+# define machine_is_pcbfp0001()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SPEEDY
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SPEEDY
+# endif
+# define machine_is_speedy()	(machine_arch_type == MACH_TYPE_SPEEDY)
+#else
+# define machine_is_speedy()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CHRYSAOR
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CHRYSAOR
+# endif
+# define machine_is_chrysaor()	(machine_arch_type == MACH_TYPE_CHRYSAOR)
+#else
+# define machine_is_chrysaor()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TANGO
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TANGO
+# endif
+# define machine_is_tango()	(machine_arch_type == MACH_TYPE_TANGO)
+#else
+# define machine_is_tango()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SYNOLOGY_DSX11
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SYNOLOGY_DSX11
+# endif
+# define machine_is_synology_dsx11()	(machine_arch_type == MACH_TYPE_SYNOLOGY_DSX11)
+#else
+# define machine_is_synology_dsx11()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HANLIN_V3EXT
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HANLIN_V3EXT
+# endif
+# define machine_is_hanlin_v3ext()	(machine_arch_type == MACH_TYPE_HANLIN_V3EXT)
+#else
+# define machine_is_hanlin_v3ext()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HANLIN_V5
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HANLIN_V5
+# endif
+# define machine_is_hanlin_v5()	(machine_arch_type == MACH_TYPE_HANLIN_V5)
+#else
+# define machine_is_hanlin_v5()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HANLIN_V3PLUS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HANLIN_V3PLUS
+# endif
+# define machine_is_hanlin_v3plus()	(machine_arch_type == MACH_TYPE_HANLIN_V3PLUS)
+#else
+# define machine_is_hanlin_v3plus()	(0)
+#endif
+
+#ifdef CONFIG_MACH_IRIVER_STORY
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_IRIVER_STORY
+# endif
+# define machine_is_iriver_story()	(machine_arch_type == MACH_TYPE_IRIVER_STORY)
+#else
+# define machine_is_iriver_story()	(0)
+#endif
+
+#ifdef CONFIG_MACH_IREX_ILIAD
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_IREX_ILIAD
+# endif
+# define machine_is_irex_iliad()	(machine_arch_type == MACH_TYPE_IREX_ILIAD)
+#else
+# define machine_is_irex_iliad()	(0)
+#endif
+
+#ifdef CONFIG_MACH_IREX_DR1000
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_IREX_DR1000
+# endif
+# define machine_is_irex_dr1000()	(machine_arch_type == MACH_TYPE_IREX_DR1000)
+#else
+# define machine_is_irex_dr1000()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TETON_BGA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TETON_BGA
+# endif
+# define machine_is_teton_bga()	(machine_arch_type == MACH_TYPE_TETON_BGA)
+#else
+# define machine_is_teton_bga()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SNAPPER9G45
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SNAPPER9G45
+# endif
+# define machine_is_snapper9g45()	(machine_arch_type == MACH_TYPE_SNAPPER9G45)
+#else
+# define machine_is_snapper9g45()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TAM3517
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TAM3517
+# endif
+# define machine_is_tam3517()	(machine_arch_type == MACH_TYPE_TAM3517)
+#else
+# define machine_is_tam3517()	(0)
+#endif
+
+#ifdef CONFIG_MACH_PDC100
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_PDC100
+# endif
+# define machine_is_pdc100()	(machine_arch_type == MACH_TYPE_PDC100)
+#else
+# define machine_is_pdc100()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EUKREA_CPUIMX25
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EUKREA_CPUIMX25
+# endif
+# define machine_is_eukrea_cpuimx25sd()	(machine_arch_type == MACH_TYPE_EUKREA_CPUIMX25)
+#else
+# define machine_is_eukrea_cpuimx25sd()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EUKREA_CPUIMX35
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EUKREA_CPUIMX35
+# endif
+# define machine_is_eukrea_cpuimx35sd()	(machine_arch_type == MACH_TYPE_EUKREA_CPUIMX35)
+#else
+# define machine_is_eukrea_cpuimx35sd()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EUKREA_CPUIMX51SD
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EUKREA_CPUIMX51SD
+# endif
+# define machine_is_eukrea_cpuimx51sd()	(machine_arch_type == MACH_TYPE_EUKREA_CPUIMX51SD)
+#else
+# define machine_is_eukrea_cpuimx51sd()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EUKREA_CPUIMX51
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EUKREA_CPUIMX51
+# endif
+# define machine_is_eukrea_cpuimx51()	(machine_arch_type == MACH_TYPE_EUKREA_CPUIMX51)
+#else
+# define machine_is_eukrea_cpuimx51()	(0)
+#endif
+
+#ifdef CONFIG_MACH_P565
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_P565
+# endif
+# define machine_is_p565()	(machine_arch_type == MACH_TYPE_P565)
+#else
+# define machine_is_p565()	(0)
+#endif
+
+#ifdef CONFIG_MACH_ACER_A4
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_ACER_A4
+# endif
+# define machine_is_acer_a4()	(machine_arch_type == MACH_TYPE_ACER_A4)
+#else
+# define machine_is_acer_a4()	(0)
+#endif
+
+#ifdef CONFIG_MACH_DAVINCI_DM368_BIP
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DAVINCI_DM368_BIP
+# endif
+# define machine_is_davinci_dm368_bip()	(machine_arch_type == MACH_TYPE_DAVINCI_DM368_BIP)
+#else
+# define machine_is_davinci_dm368_bip()	(0)
+#endif
+
+#ifdef CONFIG_MACH_ESHARE
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_ESHARE
+# endif
+# define machine_is_eshare()	(machine_arch_type == MACH_TYPE_ESHARE)
+#else
+# define machine_is_eshare()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HW_OMAPL138_EUROPA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HW_OMAPL138_EUROPA
+# endif
+# define machine_is_hw_omapl138_europa()	(machine_arch_type == MACH_TYPE_HW_OMAPL138_EUROPA)
+#else
+# define machine_is_hw_omapl138_europa()	(0)
+#endif
+
+#ifdef CONFIG_MACH_WLBARGN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_WLBARGN
+# endif
+# define machine_is_wlbargn()	(machine_arch_type == MACH_TYPE_WLBARGN)
+#else
+# define machine_is_wlbargn()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BM170
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BM170
+# endif
+# define machine_is_bm170()	(machine_arch_type == MACH_TYPE_BM170)
+#else
+# define machine_is_bm170()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NETSPACE_MINI_V2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NETSPACE_MINI_V2
+# endif
+# define machine_is_netspace_mini_v2()	(machine_arch_type == MACH_TYPE_NETSPACE_MINI_V2)
+#else
+# define machine_is_netspace_mini_v2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NETSPACE_PLUG_V2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NETSPACE_PLUG_V2
+# endif
+# define machine_is_netspace_plug_v2()	(machine_arch_type == MACH_TYPE_NETSPACE_PLUG_V2)
+#else
+# define machine_is_netspace_plug_v2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SIEMENS_L1
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SIEMENS_L1
+# endif
+# define machine_is_siemens_l1()	(machine_arch_type == MACH_TYPE_SIEMENS_L1)
+#else
+# define machine_is_siemens_l1()	(0)
+#endif
+
+#ifdef CONFIG_MACH_ELV_LCU1
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_ELV_LCU1
+# endif
+# define machine_is_elv_lcu1()	(machine_arch_type == MACH_TYPE_ELV_LCU1)
+#else
+# define machine_is_elv_lcu1()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MCU1
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MCU1
+# endif
+# define machine_is_mcu1()	(machine_arch_type == MACH_TYPE_MCU1)
+#else
+# define machine_is_mcu1()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP3_TAO3530
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP3_TAO3530
+# endif
+# define machine_is_omap3_tao3530()	(machine_arch_type == MACH_TYPE_OMAP3_TAO3530)
+#else
+# define machine_is_omap3_tao3530()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP3_PCUTOUCH
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP3_PCUTOUCH
+# endif
+# define machine_is_omap3_pcutouch()	(machine_arch_type == MACH_TYPE_OMAP3_PCUTOUCH)
+#else
+# define machine_is_omap3_pcutouch()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SMDKC210
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SMDKC210
+# endif
+# define machine_is_smdkc210()	(machine_arch_type == MACH_TYPE_SMDKC210)
+#else
+# define machine_is_smdkc210()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP3_BRAILLO
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP3_BRAILLO
+# endif
+# define machine_is_omap3_braillo()	(machine_arch_type == MACH_TYPE_OMAP3_BRAILLO)
+#else
+# define machine_is_omap3_braillo()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SPYPLUG
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SPYPLUG
+# endif
+# define machine_is_spyplug()	(machine_arch_type == MACH_TYPE_SPYPLUG)
+#else
+# define machine_is_spyplug()	(0)
+#endif
+
+#ifdef CONFIG_MACH_GINGER
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_GINGER
+# endif
+# define machine_is_ginger()	(machine_arch_type == MACH_TYPE_GINGER)
+#else
+# define machine_is_ginger()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TNY_T3530
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TNY_T3530
+# endif
+# define machine_is_tny_t3530()	(machine_arch_type == MACH_TYPE_TNY_T3530)
+#else
+# define machine_is_tny_t3530()	(0)
+#endif
+
+#ifdef CONFIG_MACH_PCA102
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_PCA102
+# endif
+# define machine_is_pca102()	(machine_arch_type == MACH_TYPE_PCA102)
+#else
+# define machine_is_pca102()	(0)
+#endif
+
 /*
  * These have not yet been registered
  */
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index 3b7c4d4..d258a69 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -50,6 +50,8 @@ void	icache_enable (void) {
 }
 
 void	icache_disable(void) {
+	/* we are not generate ICACHE size -> flush whole cache */
+	flush_cache(0, 32768);
 	MSRCLR(0x20);
 }
 
@@ -58,5 +60,31 @@ void	dcache_enable (void) {
 }
 
 void	dcache_disable(void) {
+#ifdef XILINX_USE_DCACHE
+#ifdef XILINX_DCACHE_BYTE_SIZE
+	flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
+#else
+#warning please rebuild BSPs and update configuration
+	flush_cache(0, 32768);
+#endif
+#endif
 	MSRCLR(0x80);
 }
+
+void flush_cache (ulong addr, ulong size)
+{
+	int i;
+	for (i = 0; i < size; i += 4)
+		asm volatile (
+#ifdef CONFIG_ICACHE
+				"wic	%0, r0;"
+#endif
+				"nop;"
+#ifdef CONFIG_DCACHE
+				"wdc.flush	%0, r0;"
+#endif
+				"nop;"
+				:
+				: "r" (addr + i)
+				: "memory");
+}
diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index a6021c9..7a9d022 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -46,13 +46,6 @@ int disable_interrupts (void)
 }
 
 #ifdef CONFIG_SYS_INTC_0
-#ifdef CONFIG_SYS_TIMER_0
-extern void timer_init (void);
-#endif
-#ifdef CONFIG_SYS_FSL_2
-extern void fsl_init2 (void);
-#endif
-
 
 static struct irq_action vecs[CONFIG_SYS_INTC_0_NUM];
 
@@ -142,20 +135,14 @@ int interrupts_init (void)
 	}
 	/* initialize intc controller */
 	intc_init ();
-#ifdef CONFIG_SYS_TIMER_0
-	timer_init ();
-#endif
-#ifdef CONFIG_SYS_FSL_2
-	fsl_init2 ();
-#endif
 	enable_interrupts ();
 	return 0;
 }
 
 void interrupt_handler (void)
 {
-	int irqs = (intc->isr & intc->ier);	/* find active interrupt */
-	int i = 1;
+	int irqs = intc->ivr;	/* find active interrupt */
+	int mask = 1;
 #ifdef DEBUG_INT
 	int value;
 	printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
@@ -163,23 +150,17 @@ void interrupt_handler (void)
 	R14(value);
 	printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
 #endif
-	struct irq_action *act = vecs;
-	while (irqs) {
-		if (irqs & 1) {
+	struct irq_action *act = vecs + irqs;
+
+	intc->iar = mask << irqs;
+
 #ifdef DEBUG_INT
-			printf
-			    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
-			     act->handler, act->count, act->arg);
+	printf
+	    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
+	     act->handler, act->count, act->arg);
 #endif
-			act->handler (act->arg);
-			act->count++;
-			intc->iar = i;
-			return;
-		}
-		irqs >>= 1;
-		act++;
-		i <<= 1;
-	}
+	act->handler (act->arg);
+	act->count++;
 
 #ifdef DEBUG_INT
 	printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
diff --git a/arch/microblaze/cpu/irq.S b/arch/microblaze/cpu/irq.S
index e1fc190..47bba36 100644
--- a/arch/microblaze/cpu/irq.S
+++ b/arch/microblaze/cpu/irq.S
@@ -27,129 +27,71 @@
 	.text
 	.global _interrupt_handler
 _interrupt_handler:
-	addi	r1, r1, -4
-	swi	r2, r1, 0
-	addi	r1, r1, -4
-	swi	r3, r1, 0
-	addi	r1, r1, -4
-	swi	r4, r1, 0
-	addi	r1, r1, -4
-	swi	r5, r1, 0
-	addi	r1, r1, -4
-	swi	r6, r1, 0
-	addi	r1, r1, -4
-	swi	r7, r1, 0
-	addi	r1, r1, -4
-	swi	r8, r1, 0
-	addi	r1, r1, -4
-	swi	r9, r1, 0
-	addi	r1, r1, -4
-	swi	r10, r1, 0
-	addi	r1, r1, -4
-	swi	r11, r1, 0
-	addi	r1, r1, -4
-	swi	r12, r1, 0
-	addi	r1, r1, -4
-	swi	r13, r1, 0
-	addi	r1, r1, -4
-	swi	r14, r1, 0
-	addi	r1, r1, -4
-	swi	r15, r1, 0
-	addi	r1, r1, -4
-	swi	r16, r1, 0
-	addi	r1, r1, -4
-	swi	r17, r1, 0
-	addi	r1, r1, -4
-	swi	r18, r1, 0
-	addi	r1, r1, -4
-	swi	r19, r1, 0
-	addi	r1, r1, -4
-	swi	r20, r1, 0
-	addi	r1, r1, -4
-	swi	r21, r1, 0
-	addi	r1, r1, -4
-	swi	r22, r1, 0
-	addi	r1, r1, -4
-	swi	r23, r1, 0
-	addi	r1, r1, -4
-	swi	r24, r1, 0
-	addi	r1, r1, -4
-	swi	r25, r1, 0
-	addi	r1, r1, -4
-	swi	r26, r1, 0
-	addi	r1, r1, -4
-	swi	r27, r1, 0
-	addi	r1, r1, -4
-	swi	r28, r1, 0
-	addi	r1, r1, -4
-	swi	r29, r1, 0
-	addi	r1, r1, -4
-	swi	r30, r1, 0
-	addi	r1, r1, -4
-	swi	r31, r1, 0
+	swi	r2, r1, -4
+	swi	r3, r1, -8
+	swi	r4, r1, -12
+	swi	r5, r1, -16
+	swi	r6, r1, -20
+	swi	r7, r1, -24
+	swi	r8, r1, -28
+	swi	r9, r1, -32
+	swi	r10, r1, -36
+	swi	r11, r1, -40
+	swi	r12, r1, -44
+	swi	r13, r1, -48
+	swi	r14, r1, -52
+	swi	r15, r1, -56
+	swi	r16, r1, -60
+	swi	r17, r1, -64
+	swi	r18, r1, -68
+	swi	r19, r1, -72
+	swi	r20, r1, -76
+	swi	r21, r1, -80
+	swi	r22, r1, -84
+	swi	r23, r1, -88
+	swi	r24, r1, -92
+	swi	r25, r1, -96
+	swi	r26, r1, -100
+	swi	r27, r1, -104
+	swi	r28, r1, -108
+	swi	r29, r1, -112
+	swi	r30, r1, -116
+	swi	r31, r1, -120
+	addik	r1, r1, -124
 	brlid	r15, interrupt_handler
 	nop
 	nop
-	lwi	r31, r1, 0
-	addi	r1, r1, 4
-	lwi	r30, r1, 0
-	addi	r1, r1, 4
-	lwi	r29, r1, 0
-	addi	r1, r1, 4
-	lwi	r28, r1, 0
-	addi	r1, r1, 4
-	lwi	r27, r1, 0
-	addi	r1, r1, 4
-	lwi	r26, r1, 0
-	addi	r1, r1, 4
-	lwi	r25, r1, 0
-	addi	r1, r1, 4
-	lwi	r24, r1, 0
-	addi	r1, r1, 4
-	lwi	r23, r1, 0
-	addi	r1, r1, 4
-	lwi	r22, r1, 0
-	addi	r1, r1, 4
-	lwi	r21, r1, 0
-	addi	r1, r1, 4
-	lwi	r20, r1, 0
-	addi	r1, r1, 4
-	lwi	r19, r1, 0
-	addi	r1, r1, 4
-	lwi	r18, r1, 0
-	addi	r1, r1, 4
-	lwi	r17, r1, 0
-	addi	r1, r1, 4
-	lwi	r16, r1, 0
-	addi	r1, r1, 4
-	lwi	r15, r1, 0
-	addi	r1, r1, 4
-	lwi	r14, r1, 0
-	addi	r1, r1, 4
-	lwi	r13, r1, 0
-	addi	r1, r1, 4
-	lwi	r12, r1, 0
-	addi	r1, r1, 4
-	lwi	r11, r1, 0
-	addi	r1, r1, 4
-	lwi	r10, r1, 0
-	addi	r1, r1, 4
-	lwi	r9, r1, 0
-	addi	r1, r1, 4
-	lwi	r8, r1, 0
-	addi	r1, r1, 4
-	lwi	r7, r1, 0
-	addi	r1, r1, 4
-	lwi	r6, r1, 0
-	addi	r1, r1, 4
-	lwi	r5, r1, 0
-	addi	r1, r1, 4
-	lwi	r4, r1, 0
-	addi	r1, r1, 4
-	lwi	r3, r1, 0
-	addi	r1, r1, 4
-	lwi	r2, r1, 0
-	addi	r1, r1, 4
+	addik	r1, r1, 124
+	lwi	r31, r1, -120
+	lwi	r30, r1, -116
+	lwi	r29, r1, -112
+	lwi	r28, r1, -108
+	lwi	r27, r1, -104
+	lwi	r26, r1, -100
+	lwi	r25, r1, -96
+	lwi	r24, r1, -92
+	lwi	r23, r1, -88
+	lwi	r22, r1, -84
+	lwi	r21, r1, -80
+	lwi	r20, r1, -76
+	lwi	r19, r1, -72
+	lwi	r18, r1, -68
+	lwi	r17, r1, -64
+	lwi	r16, r1, -60
+	lwi	r15, r1, -56
+	lwi	r14, r1, -52
+	lwi	r13, r1, -48
+	lwi	r12, r1, -44
+	lwi	r11, r1, -40
+	lwi	r10, r1, -36
+	lwi	r9, r1, -32
+	lwi	r8, r1, -28
+	lwi	r7, r1, -24
+	lwi	r6, r1, -20
+	lwi	r5, r1, -16
+	lwi	r4, r1, -12
+	lwi	r3, r1, -8
+	lwi	r2, r1, -4
 
 	/* enable_interrupt */
 #ifdef XILINX_USE_MSR_INSTR
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c
index a91eabc..4936c62 100644
--- a/arch/microblaze/cpu/timer.c
+++ b/arch/microblaze/cpu/timer.c
@@ -60,7 +60,7 @@ void timer_isr (void *arg)
 	tmr->control = tmr->control | TIMER_INTERRUPT;
 }
 
-void timer_init (void)
+int timer_init (void)
 {
 	tmr->loadreg = CONFIG_SYS_TIMER_0_PRELOAD;
 	tmr->control = TIMER_INTERRUPT | TIMER_RESET;
@@ -68,6 +68,7 @@ void timer_init (void)
 	    TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT;
 	reset_timer ();
 	install_interrupt_handler (CONFIG_SYS_TIMER_0_IRQ, timer_isr, (void *)tmr);
+	return 0;
 }
 #endif
 #endif
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
index 9b0f296..8176437 100644
--- a/arch/microblaze/lib/Makefile
+++ b/arch/microblaze/lib/Makefile
@@ -29,7 +29,6 @@ SOBJS-y	+=
 
 COBJS-y	+= board.o
 COBJS-y	+= bootm.o
-COBJS-y	+= cache.o
 COBJS-y	+= time.o
 
 SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c
index d4baea9..3ff5c17 100644
--- a/arch/microblaze/lib/board.c
+++ b/arch/microblaze/lib/board.c
@@ -30,6 +30,7 @@
 #include <timestamp.h>
 #include <version.h>
 #include <watchdog.h>
+#include <stdio_dev.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -44,6 +45,12 @@ extern int interrupts_init (void);
 #if defined(CONFIG_CMD_NET)
 extern int eth_init (bd_t * bis);
 #endif
+#ifdef CONFIG_SYS_TIMER_0
+extern int timer_init (void);
+#endif
+#ifdef CONFIG_SYS_FSL_2
+extern void fsl_init2 (void);
+#endif
 
 /*
  * All attempts to come up with a "common" initialization sequence
@@ -68,6 +75,12 @@ init_fnc_t *init_sequence[] = {
 #ifdef CONFIG_SYS_INTC_0
 	interrupts_init,
 #endif
+#ifdef CONFIG_SYS_TIMER_0
+	timer_init,
+#endif
+#ifdef CONFIG_SYS_FSL_2
+	fsl_init2,
+#endif
 	NULL,
 };
 
@@ -76,6 +89,7 @@ void board_init (void)
 	bd_t *bd;
 	init_fnc_t **init_fnc_ptr;
 	gd = (gd_t *) CONFIG_SYS_GBL_DATA_OFFSET;
+	char *s;
 #if defined(CONFIG_CMD_FLASH)
 	ulong flash_size = 0;
 #endif
@@ -104,8 +118,8 @@ void board_init (void)
 	}
 
 	puts ("SDRAM :\n");
-	printf ("\t\tIcache:%s\n", icache_status() ? "OK" : "FAIL");
-	printf ("\t\tDcache:%s\n", dcache_status() ? "OK" : "FAIL");
+	printf ("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF");
+	printf ("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF");
 	printf ("\tU-Boot Start:0x%08x\n", TEXT_BASE);
 
 #if defined(CONFIG_CMD_FLASH)
@@ -139,15 +153,22 @@ void board_init (void)
 	}
 #endif
 
+	/* relocate environment function pointers etc. */
+	env_relocate ();
+
+	/* Initialize stdio devices */
+	stdio_init ();
+
+	if ((s = getenv ("loadaddr")) != NULL) {
+		load_addr = simple_strtoul (s, NULL, 16);
+	}
+
 #if defined(CONFIG_CMD_NET)
 	/* IP Address */
 	bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
 	eth_init (bd);
 #endif
 
-	/* relocate environment function pointers etc. */
-	env_relocate ();
-
 	/* main_loop */
 	for (;;) {
 		WATCHDOG_RESET ();
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index bce4774..2227a81 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -35,22 +35,59 @@ DECLARE_GLOBAL_DATA_PTR;
 int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 {
 	/* First parameter is mapped to $r5 for kernel boot args */
-	void	(*theKernel) (char *);
+	void	(*theKernel) (char *, ulong, ulong);
 	char	*commandline = getenv ("bootargs");
+	ulong	rd_data_start, rd_data_end;
 
 	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
 		return 1;
 
-	theKernel = (void (*)(char *))images->ep;
+	int	ret;
+
+	char	*of_flat_tree = NULL;
+#if defined(CONFIG_OF_LIBFDT)
+	ulong	of_size = 0;
+
+	/* find flattened device tree */
+	ret = boot_get_fdt (flag, argc, argv, images, &of_flat_tree, &of_size);
+	if (ret)
+		return 1;
+#endif
+
+	theKernel = (void (*)(char *, ulong, ulong))images->ep;
+
+	/* find ramdisk */
+	ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_MICROBLAZE,
+			&rd_data_start, &rd_data_end);
+	if (ret)
+		return 1;
 
 	show_boot_progress (15);
 
+	if (!(ulong) of_flat_tree)
+		of_flat_tree = (char *)simple_strtoul (argv[3], NULL, 16);
+
 #ifdef DEBUG
-	printf ("## Transferring control to Linux (at address %08lx) ...\n",
-		(ulong) theKernel);
+	printf ("## Transferring control to Linux (at address 0x%08lx) " \
+				"ramdisk 0x%08lx, FDT 0x%08lx...\n",
+		(ulong) theKernel, rd_data_start, (ulong) of_flat_tree);
 #endif
 
-	theKernel (commandline);
+#ifdef XILINX_USE_DCACHE
+#ifdef XILINX_DCACHE_BYTE_SIZE
+	flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
+#else
+#warning please rebuild BSPs and update configuration
+	flush_cache(0, 32768);
+#endif
+#endif
+	/*
+	 * Linux Kernel Parameters (passing device tree):
+	 * r5: pointer to command line
+	 * r6: pointer to ramdisk
+	 * r7: pointer to the fdt, followed by the board info data
+	 */
+	theKernel (commandline, rd_data_start, (ulong) of_flat_tree);
 	/* does not return */
 
 	return 1;
diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk
index be40639..8e5d6ef 100644
--- a/arch/nios2/config.mk
+++ b/arch/nios2/config.mk
@@ -28,3 +28,5 @@ STANDALONE_LOAD_ADDR = 0x02000000 -L $(gcclibdir)
 
 PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
 PLATFORM_CPPFLAGS += -ffixed-r15 -G0
+
+LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds
diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index 31cd5b0..d1016ea 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -34,6 +34,7 @@
 	.global _start
 
 _start:
+	wrctl	status, r0		/* Disable interrupts */
 	/* ICACHE INIT -- only the icache line at the reset address
 	 * is invalidated at reset. So the init must stay within
 	 * the cache line size (8 words). If GERMS is used, we'll
@@ -43,10 +44,9 @@ _start:
 	ori	r4, r0, %lo(CONFIG_SYS_ICACHELINE_SIZE)
 	movhi	r5, %hi(CONFIG_SYS_ICACHE_SIZE)
 	ori	r5, r5, %lo(CONFIG_SYS_ICACHE_SIZE)
-	mov	r6, r0
-0:	initi	r6
-	add	r6, r6, r4
-	bltu	r6, r5, 0b
+0:	initi	r5
+	sub	r5, r5, r4
+	bgt	r5, r0, 0b
 	br	_except_end	/* Skip the tramp */
 
 	/* EXCEPTION TRAMPOLINE -- the following gets copied
@@ -62,7 +62,6 @@ _except_end:
 	/* INTERRUPTS -- for now, all interrupts masked and globally
 	 * disabled.
 	 */
-	wrctl	status, r0		/* Disable interrupts */
 	wrctl	ienable, r0		/* All disabled	*/
 
 	/* DCACHE INIT -- if dcache not implemented, initd behaves as
diff --git a/arch/nios2/cpu/u-boot.lds b/arch/nios2/cpu/u-boot.lds
new file mode 100644
index 0000000..fe4a2eb
--- /dev/null
+++ b/arch/nios2/cpu/u-boot.lds
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+	.text :
+	{
+	  arch/nios2/cpu/start.o (.text)
+	  *(.text)
+	  *(.text.*)
+	  *(.gnu.linkonce.t*)
+	  *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	  *(.gnu.linkonce.r*)
+	}
+	. = ALIGN (4);
+	_etext = .;
+	PROVIDE (etext = .);
+
+	/* CMD TABLE - sandwich this in between text and data so
+	 * the initialization code relocates the command table as
+	 * well -- admittedly, this is just pure laziness ;-)
+	 */
+	__u_boot_cmd_start = .;
+	.u_boot_cmd :
+	{
+	  *(.u_boot_cmd)
+	}
+	. = ALIGN(4);
+	__u_boot_cmd_end = .;
+
+	/* INIT DATA sections - "Small" data (see the gcc -G option)
+	 * is always gp-relative. Here we make all init data sections
+	 * adjacent to simplify the startup code -- and provide
+	 * the global pointer for gp-relative access.
+	 */
+	_data = .;
+	.data :
+	{
+	  *(.data)
+	  *(.data.*)
+	  *(.gnu.linkonce.d*)
+	}
+
+	. = ALIGN(16);
+	_gp = .;			/* Global pointer addr */
+	PROVIDE (gp = .);
+
+	.sdata :
+	{
+	  *(.sdata)
+	  *(.sdata.*)
+	  *(.gnu.linkonce.s.*)
+	}
+	. = ALIGN(4);
+
+	_edata = .;
+	PROVIDE (edata = .);
+
+	/* UNINIT DATA - Small uninitialized data is first so it's
+	 * adjacent to sdata and can be referenced via gp. The normal
+	 * bss follows. We keep it adjacent to simplify init code.
+	 */
+	__bss_start = .;
+	.sbss (NOLOAD) :
+	{
+	  *(.sbss)
+	  *(.sbss.*)
+	  *(.gnu.linkonce.sb.*)
+	  *(.scommon)
+	}
+	. = ALIGN(4);
+	.bss (NOLOAD) :
+	{
+	  *(.bss)
+	  *(.bss.*)
+	  *(.dynbss)
+	  *(COMMON)
+	  *(.scommon)
+	}
+	. = ALIGN(4);
+	_end = .;
+	PROVIDE (end = .);
+
+	/* DEBUG -- symbol table, string table, etc. etc.
+	 */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug		0 : { *(.debug) }
+	.line		0 : { *(.line) }
+	.debug_srcinfo	0 : { *(.debug_srcinfo) }
+	.debug_sfnames	0 : { *(.debug_sfnames) }
+	.debug_aranges	0 : { *(.debug_aranges) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_info	0 : { *(.debug_info) }
+	.debug_abbrev	0 : { *(.debug_abbrev) }
+	.debug_line	0 : { *(.debug_line) }
+	.debug_frame	0 : { *(.debug_frame) }
+	.debug_str	0 : { *(.debug_str) }
+	.debug_loc	0 : { *(.debug_loc) }
+	.debug_macinfo	0 : { *(.debug_macinfo) }
+	.debug_weaknames 0 : { *(.debug_weaknames) }
+	.debug_funcnames 0 : { *(.debug_funcnames) }
+	.debug_typenames 0 : { *(.debug_typenames) }
+	.debug_varnames	 0 : { *(.debug_varnames) }
+}
diff --git a/arch/nios2/include/asm/byteorder.h b/arch/nios2/include/asm/byteorder.h
index 495c823..d5c152e 100644
--- a/arch/nios2/include/asm/byteorder.h
+++ b/arch/nios2/include/asm/byteorder.h
@@ -25,6 +25,12 @@
 #define __ASM_NIOS2_BYTEORDER_H_
 
 #include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#  define __SWAB_64_THRU_32__
+#endif
+
 #include <linux/byteorder/little_endian.h>
 
 #endif /* __ASM_NIOS2_BYTEORDER_H_ */
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
new file mode 100644
index 0000000..1350e3b
--- /dev/null
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_NIOS2_DMA_MAPPING_H
+#define __ASM_NIOS2_DMA_MAPPING_H
+
+/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
+ * to uncached io region.
+ *
+ * IO_REGION_BASE should be defined in board config header file
+ *   0x80000000 for nommu, 0xe0000000 for mmu
+ */
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+	void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+	if (!addr)
+		return 0;
+	flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
+	*handle = ((unsigned long)addr +
+		   (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
+		~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
+	return (void *)(*handle | IO_REGION_BASE);
+}
+
+#endif /* __ASM_NIOS2_DMA_MAPPING_H */
diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c
index 8ec66a3..f83e691 100644
--- a/arch/nios2/lib/board.c
+++ b/arch/nios2/lib/board.c
@@ -28,6 +28,7 @@
 #include <stdio_dev.h>
 #include <watchdog.h>
 #include <malloc.h>
+#include <mmc.h>
 #include <net.h>
 #ifdef CONFIG_STATUS_LED
 #include <status_led.h>
@@ -35,6 +36,9 @@
 #if defined(CONFIG_SYS_NIOS_EPCSBASE)
 #include <nios2-epcs.h>
 #endif
+#ifdef CONFIG_CMD_NAND
+#include <nand.h>	/* cannot even include nand.h if it isnt configured */
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -100,7 +104,9 @@ void board_init (void)
 	bd = gd->bd;
 	bd->bi_memstart	= CONFIG_SYS_SDRAM_BASE;
 	bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+#ifndef CONFIG_SYS_NO_FLASH
 	bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+#endif
 #if	defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
 	bd->bi_sramstart= CONFIG_SYS_SRAM_BASE;
 	bd->bi_sramsize	= CONFIG_SYS_SRAM_SIZE;
@@ -119,8 +125,20 @@ void board_init (void)
 	/* The Malloc area is immediately below the monitor copy in RAM */
 	mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
 
+#ifndef CONFIG_SYS_NO_FLASH
 	WATCHDOG_RESET ();
 	bd->bi_flashsize = flash_init();
+#endif
+
+#ifdef CONFIG_CMD_NAND
+	puts("NAND:  ");
+	nand_init();
+#endif
+
+#ifdef CONFIG_GENERIC_MMC
+	puts("MMC:   ");
+	mmc_initialize(bd);
+#endif
 
 	WATCHDOG_RESET ();
 	env_relocate();
diff --git a/arch/ppc/config.mk b/arch/powerpc/config.mk
index 06a3b10..06a3b10 100644
--- a/arch/ppc/config.mk
+++ b/arch/powerpc/config.mk
diff --git a/arch/ppc/cpu/74xx_7xx/Makefile b/arch/powerpc/cpu/74xx_7xx/Makefile
index fe905f3..fe905f3 100644
--- a/arch/ppc/cpu/74xx_7xx/Makefile
+++ b/arch/powerpc/cpu/74xx_7xx/Makefile
diff --git a/arch/ppc/cpu/74xx_7xx/cache.S b/arch/powerpc/cpu/74xx_7xx/cache.S
index 66c7298..66c7298 100644
--- a/arch/ppc/cpu/74xx_7xx/cache.S
+++ b/arch/powerpc/cpu/74xx_7xx/cache.S
diff --git a/arch/ppc/cpu/74xx_7xx/config.mk b/arch/powerpc/cpu/74xx_7xx/config.mk
index df1f6ac..df1f6ac 100644
--- a/arch/ppc/cpu/74xx_7xx/config.mk
+++ b/arch/powerpc/cpu/74xx_7xx/config.mk
diff --git a/arch/ppc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c
index 3c17277..3c17277 100644
--- a/arch/ppc/cpu/74xx_7xx/cpu.c
+++ b/arch/powerpc/cpu/74xx_7xx/cpu.c
diff --git a/arch/ppc/cpu/74xx_7xx/cpu_init.c b/arch/powerpc/cpu/74xx_7xx/cpu_init.c
index 1dd1b2c..1dd1b2c 100644
--- a/arch/ppc/cpu/74xx_7xx/cpu_init.c
+++ b/arch/powerpc/cpu/74xx_7xx/cpu_init.c
diff --git a/arch/ppc/cpu/74xx_7xx/interrupts.c b/arch/powerpc/cpu/74xx_7xx/interrupts.c
index 0ea1aec..0ea1aec 100644
--- a/arch/ppc/cpu/74xx_7xx/interrupts.c
+++ b/arch/powerpc/cpu/74xx_7xx/interrupts.c
diff --git a/arch/ppc/cpu/74xx_7xx/io.S b/arch/powerpc/cpu/74xx_7xx/io.S
index af2e6d1..af2e6d1 100644
--- a/arch/ppc/cpu/74xx_7xx/io.S
+++ b/arch/powerpc/cpu/74xx_7xx/io.S
diff --git a/arch/ppc/cpu/74xx_7xx/kgdb.S b/arch/powerpc/cpu/74xx_7xx/kgdb.S
index ad487cd..ad487cd 100644
--- a/arch/ppc/cpu/74xx_7xx/kgdb.S
+++ b/arch/powerpc/cpu/74xx_7xx/kgdb.S
diff --git a/arch/ppc/cpu/74xx_7xx/speed.c b/arch/powerpc/cpu/74xx_7xx/speed.c
index f2fdcd5..f2fdcd5 100644
--- a/arch/ppc/cpu/74xx_7xx/speed.c
+++ b/arch/powerpc/cpu/74xx_7xx/speed.c
diff --git a/arch/ppc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S
index 88fdf88..88fdf88 100644
--- a/arch/ppc/cpu/74xx_7xx/start.S
+++ b/arch/powerpc/cpu/74xx_7xx/start.S
diff --git a/arch/ppc/cpu/74xx_7xx/traps.c b/arch/powerpc/cpu/74xx_7xx/traps.c
index 1d5dd01..5073b05 100644
--- a/arch/ppc/cpu/74xx_7xx/traps.c
+++ b/arch/powerpc/cpu/74xx_7xx/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile
index 1719c66..9cfdb0f 100644
--- a/arch/ppc/cpu/mpc512x/Makefile
+++ b/arch/powerpc/cpu/mpc512x/Makefile
@@ -29,6 +29,7 @@ LIB	= $(obj)lib$(CPU).a
 START	= start.o
 COBJS-y	:= cpu.o
 COBJS-y	+= traps.o
+COBJS-y += common.o
 COBJS-y += cpu_init.o
 COBJS-y += fixed_sdram.o
 COBJS-y += i2c.o
diff --git a/arch/ppc/cpu/mpc512x/asm-offsets.h b/arch/powerpc/cpu/mpc512x/asm-offsets.h
index 5873fe0..957d4be2 100644
--- a/arch/ppc/cpu/mpc512x/asm-offsets.h
+++ b/arch/powerpc/cpu/mpc512x/asm-offsets.h
@@ -1,5 +1,5 @@
 /*
- * needed for arch/ppc/cpu/mpc512x/start.S
+ * needed for arch/powerpc/cpu/mpc512x/start.S
  *
  * These should be auto-generated
  */
diff --git a/arch/powerpc/cpu/mpc512x/common.c b/arch/powerpc/cpu/mpc512x/common.c
new file mode 100644
index 0000000..180d323
--- /dev/null
+++ b/arch/powerpc/cpu/mpc512x/common.c
@@ -0,0 +1,25 @@
+#include <common.h>
+#include <asm/io.h>
+
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+
+#if defined(CONFIG_SYS_POST_WORD_ADDR)
+# define _POST_ADDR	(CONFIG_SYS_POST_WORD_ADDR)
+#else
+#error echo "No POST word address defined"
+#endif
+
+void post_word_store(ulong a)
+{
+	volatile void *save_addr = (volatile void *)(_POST_ADDR);
+
+	out_be32(save_addr, a);
+}
+
+ulong post_word_load(void)
+{
+	volatile void *save_addr = (volatile void *)(_POST_ADDR);
+
+	return in_be32(save_addr);
+}
+#endif  /* CONFIG_POST || CONFIG_LOGBUFFER */
diff --git a/arch/ppc/cpu/mpc512x/config.mk b/arch/powerpc/cpu/mpc512x/config.mk
index b6727dc..b29edb1 100644
--- a/arch/ppc/cpu/mpc512x/config.mk
+++ b/arch/powerpc/cpu/mpc512x/config.mk
@@ -26,4 +26,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
 
 # Use default linker script.
 # A board port can override this setting in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc512x/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc512x/u-boot.lds
diff --git a/arch/ppc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index 09cbd20..09cbd20 100644
--- a/arch/ppc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
diff --git a/arch/ppc/cpu/mpc512x/cpu_init.c b/arch/powerpc/cpu/mpc512x/cpu_init.c
index fe6beaf..fe6beaf 100644
--- a/arch/ppc/cpu/mpc512x/cpu_init.c
+++ b/arch/powerpc/cpu/mpc512x/cpu_init.c
diff --git a/arch/ppc/cpu/mpc512x/diu.c b/arch/powerpc/cpu/mpc512x/diu.c
index 9361161..f8d19a0 100644
--- a/arch/ppc/cpu/mpc512x/diu.c
+++ b/arch/powerpc/cpu/mpc512x/diu.c
@@ -34,6 +34,8 @@
 #include <video_fb.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_FSL_DIU_LOGO_BMP
 extern unsigned int FSL_Logo_BMP[];
 #else
@@ -65,10 +67,11 @@ void diu_set_pixel_clock(unsigned int pixclock)
 char *valid_bmp(char *addr)
 {
 	unsigned long h_addr;
+	bd_t *bd = gd->bd;
 
 	h_addr = simple_strtoul(addr, NULL, 16);
-	if (h_addr < CONFIG_SYS_FLASH_BASE ||
-			h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
+	if (h_addr < bd->bi_flashstart ||
+	    h_addr >= (bd->bi_flashstart + bd->bi_flashsize - 1)) {
 		printf("bmp addr %lx is not a valid flash address\n", h_addr);
 		return 0;
 	} else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) {
@@ -84,8 +87,13 @@ int mpc5121_diu_init(void)
 	char *bmp = NULL;
 	char *bmp_env;
 
+#if defined(CONFIG_VIDEO_XRES) & defined(CONFIG_VIDEO_YRES)
+	xres = CONFIG_VIDEO_XRES;
+	yres = CONFIG_VIDEO_YRES;
+#else
 	xres = 1024;
 	yres = 768;
+#endif
 	pixel_format = 0x88883316;
 
 	debug("mpc5121_diu_init\n");
diff --git a/arch/ppc/cpu/mpc512x/fixed_sdram.c b/arch/powerpc/cpu/mpc512x/fixed_sdram.c
index 442b5fc..550cbd0 100644
--- a/arch/ppc/cpu/mpc512x/fixed_sdram.c
+++ b/arch/powerpc/cpu/mpc512x/fixed_sdram.c
@@ -78,7 +78,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
 			u32 *dram_init_seq, int seq_sz)
 {
 	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-	u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
+	u32 msize = CONFIG_SYS_MAX_RAM_SIZE;
 	u32 msize_log2 = __ilog2(msize);
 	u32 i;
 
@@ -91,7 +91,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
 	}
 
 	/* Initialize IO Control */
-	out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR);
+	out_be32(&im->io_ctrl.io_control_mem, CONFIG_SYS_IOCTRL_MUX_DDR);
 
 	/* Initialize DDR Local Window */
 	out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000);
@@ -148,5 +148,10 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
 	out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0);
 	out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config);
 
+	msize = get_ram_size(CONFIG_SYS_DDR_BASE, CONFIG_SYS_MAX_RAM_SIZE);
+	/* Fix DDR Local Window for new size */
+	out_be32(&im->sysconf.ddrlaw.ar, __ilog2(msize) - 1);
+	sync_law(&im->sysconf.ddrlaw.ar);
+
 	return msize;
 }
diff --git a/arch/ppc/cpu/mpc512x/i2c.c b/arch/powerpc/cpu/mpc512x/i2c.c
index e2d9097..e2d9097 100644
--- a/arch/ppc/cpu/mpc512x/i2c.c
+++ b/arch/powerpc/cpu/mpc512x/i2c.c
diff --git a/arch/ppc/cpu/mpc512x/ide.c b/arch/powerpc/cpu/mpc512x/ide.c
index dd6b2f4..dd6b2f4 100644
--- a/arch/ppc/cpu/mpc512x/ide.c
+++ b/arch/powerpc/cpu/mpc512x/ide.c
diff --git a/arch/ppc/cpu/mpc512x/iim.c b/arch/powerpc/cpu/mpc512x/iim.c
index 8f2eb37..8f2eb37 100644
--- a/arch/ppc/cpu/mpc512x/iim.c
+++ b/arch/powerpc/cpu/mpc512x/iim.c
diff --git a/arch/ppc/cpu/mpc512x/interrupts.c b/arch/powerpc/cpu/mpc512x/interrupts.c
index ef7c773..ef7c773 100644
--- a/arch/ppc/cpu/mpc512x/interrupts.c
+++ b/arch/powerpc/cpu/mpc512x/interrupts.c
diff --git a/arch/ppc/cpu/mpc512x/iopin.c b/arch/powerpc/cpu/mpc512x/iopin.c
index be20947..be20947 100644
--- a/arch/ppc/cpu/mpc512x/iopin.c
+++ b/arch/powerpc/cpu/mpc512x/iopin.c
diff --git a/arch/ppc/cpu/mpc512x/pci.c b/arch/powerpc/cpu/mpc512x/pci.c
index 141db8b..141db8b 100644
--- a/arch/ppc/cpu/mpc512x/pci.c
+++ b/arch/powerpc/cpu/mpc512x/pci.c
diff --git a/arch/powerpc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c
new file mode 100644
index 0000000..cb5bbf0
--- /dev/null
+++ b/arch/powerpc/cpu/mpc512x/serial.c
@@ -0,0 +1,490 @@
+/*
+ * (C) Copyright 2000 - 2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Based ont the MPC5200 PSC driver.
+ * Adapted for MPC512x by Jan Wrobel <wrr@semihalf.com>
+ */
+
+/*
+ * Minimal serial functions needed to use one of the PSC ports
+ * as serial console interface.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <serial.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_PSC_CONSOLE) || defined(CONFIG_SERIAL_MULTI)
+
+static void fifo_init (volatile psc512x_t *psc)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	u32 tfsize, rfsize;
+
+	/* reset Rx & Tx fifo slice */
+	out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE);
+	out_be32(&psc->tfcmd, PSC_FIFO_RESET_SLICE);
+
+	/* disable Tx & Rx FIFO interrupts */
+	out_be32(&psc->rfintmask, 0);
+	out_be32(&psc->tfintmask, 0);
+
+#if defined(CONFIG_SERIAL_MULTI)
+	switch (((u32)psc & 0xf00) >> 8) {
+	case 0:
+		tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR << 16);
+		rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR << 16);
+		break;
+	case 1:
+		tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR << 16);
+		rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR << 16);
+		break;
+	case 2:
+		tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR << 16);
+		rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR << 16);
+		break;
+	case 3:
+		tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR << 16);
+		rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR << 16);
+		break;
+	case 4:
+		tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR << 16);
+		rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR << 16);
+		break;
+	case 5:
+		tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR << 16);
+		rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR << 16);
+		break;
+	case 6:
+		tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR << 16);
+		rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR << 16);
+		break;
+	case 7:
+		tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR << 16);
+		rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR << 16);
+		break;
+	case 8:
+		tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR << 16);
+		rfsize = FIFOC_PSC8_RX_SIZE | (FIFOC_PSC8_RX_ADDR << 16);
+		break;
+	case 9:
+		tfsize = FIFOC_PSC9_TX_SIZE | (FIFOC_PSC9_TX_ADDR << 16);
+		rfsize = FIFOC_PSC9_RX_SIZE | (FIFOC_PSC9_RX_ADDR << 16);
+		break;
+	case 10:
+		tfsize = FIFOC_PSC10_TX_SIZE | (FIFOC_PSC10_TX_ADDR << 16);
+		rfsize = FIFOC_PSC10_RX_SIZE | (FIFOC_PSC10_RX_ADDR << 16);
+		break;
+	case 11:
+		tfsize = FIFOC_PSC11_TX_SIZE | (FIFOC_PSC11_TX_ADDR << 16);
+		rfsize = FIFOC_PSC11_RX_SIZE | (FIFOC_PSC11_RX_ADDR << 16);
+		break;
+	default:
+		return;
+	}
+#else
+	tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16);
+	rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16);
+#endif
+	out_be32(&psc->tfsize, tfsize);
+	out_be32(&psc->rfsize, rfsize);
+
+	/* enable Tx & Rx FIFO slice */
+	out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE);
+	out_be32(&psc->tfcmd, PSC_FIFO_ENABLE_SLICE);
+
+	out_be32(&im->fifoc.fifoc_cmd, FIFOC_DISABLE_CLOCK_GATE);
+	__asm__ volatile ("sync");
+}
+
+void serial_setbrg_dev(unsigned int idx)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+	unsigned long baseclk, div;
+	unsigned long baudrate;
+	char buf[16];
+	char *br_env;
+
+	baudrate = gd->baudrate;
+	if (idx != CONFIG_PSC_CONSOLE) {
+		/* Allows setting baudrate for other serial devices
+		 * on PSCx using environment. If not specified, use
+		 * the same baudrate as for console.
+		 */
+		sprintf(buf, "psc%d_baudrate", idx);
+		br_env = getenv(buf);
+		if (br_env)
+			baudrate = simple_strtoul(br_env, NULL, 10);
+
+		debug("%s: idx %d, baudrate %d\n", __func__, idx, baudrate);
+	}
+
+	/* calculate divisor for setting PSC CTUR and CTLR registers */
+	baseclk = (gd->ips_clk + 8) / 16;
+	div = (baseclk + (baudrate / 2)) / baudrate;
+
+	out_8(&psc->ctur, (div >> 8) & 0xff);
+	out_8(&psc->ctlr,  div & 0xff); /* set baudrate */
+}
+
+int serial_init_dev(unsigned int idx)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+#if defined(CONFIG_SERIAL_MULTI)
+	u32 reg;
+
+	reg = in_be32(&im->clk.sccr[0]);
+	out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx));
+#endif
+
+	fifo_init (psc);
+
+	/* set MR register to point to MR1 */
+	out_8(&psc->command, PSC_SEL_MODE_REG_1);
+
+	/* disable Tx/Rx */
+	out_8(&psc->command, PSC_TX_DISABLE | PSC_RX_DISABLE);
+
+	/* choose the prescaler	by 16 for the Tx/Rx clock generation */
+	out_be16(&psc->psc_clock_select, 0xdd00);
+
+	/* switch to UART mode */
+	out_be32(&psc->sicr, 0);
+
+	/* mode register points to mr1 */
+	/* configure parity, bit length and so on in mode register 1*/
+	out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE);
+	/* now, mode register points to mr2 */
+	out_8(&psc->mode, PSC_MODE_1_STOPBIT);
+
+	/* set baudrate */
+	serial_setbrg_dev(idx);
+
+	/* disable all interrupts */
+	out_be16(&psc->psc_imr, 0);
+
+	/* reset and enable Rx/Tx */
+	out_8(&psc->command, PSC_RST_RX);
+	out_8(&psc->command, PSC_RST_TX);
+	out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE);
+
+	return 0;
+}
+
+int serial_uninit_dev(unsigned int idx)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+	u32 reg;
+
+	out_8(&psc->command, PSC_RX_DISABLE | PSC_TX_DISABLE);
+	reg = in_be32(&im->clk.sccr[0]);
+	reg &= ~CLOCK_SCCR1_PSC_EN(idx);
+	out_be32(&im->clk.sccr[0], reg);
+
+	return 0;
+}
+
+void serial_putc_dev(unsigned int idx, const char c)
+{
+	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+
+	if (c == '\n')
+		serial_putc_dev(idx, '\r');
+
+	/* Wait for last character to go. */
+	while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
+		;
+
+	out_8(&psc->tfdata_8, c);
+}
+
+void serial_putc_raw_dev(unsigned int idx, const char c)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+
+	/* Wait for last character to go. */
+	while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
+		;
+
+	out_8(&psc->tfdata_8, c);
+}
+
+void serial_puts_dev(unsigned int idx, const char *s)
+{
+	while (*s)
+		serial_putc_dev(idx, *s++);
+}
+
+int serial_getc_dev(unsigned int idx)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+
+	/* Wait for a character to arrive. */
+	while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
+		;
+
+	return in_8(&psc->rfdata_8);
+}
+
+int serial_tstc_dev(unsigned int idx)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+
+	return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY);
+}
+
+void serial_setrts_dev(unsigned int idx, int s)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+
+	if (s) {
+		/* Assert RTS (become LOW) */
+		out_8(&psc->op1, 0x1);
+	}
+	else {
+		/* Negate RTS (become HIGH) */
+		out_8(&psc->op0, 0x1);
+	}
+}
+
+int serial_getcts_dev(unsigned int idx)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+
+	return (in_8(&psc->ip) & 0x1) ? 0 : 1;
+}
+#endif /* CONFIG_PSC_CONSOLE || CONFIG_SERIAL_MULTI */
+
+#if defined(CONFIG_SERIAL_MULTI)
+
+#define DECLARE_PSC_SERIAL_FUNCTIONS(port) \
+	int serial##port##_init(void) \
+	{ \
+		return serial_init_dev(port); \
+	} \
+	int serial##port##_uninit(void) \
+	{ \
+		return serial_uninit_dev(port); \
+	} \
+	void serial##port##_setbrg(void) \
+	{ \
+		serial_setbrg_dev(port); \
+	} \
+	int serial##port##_getc(void) \
+	{ \
+		return serial_getc_dev(port); \
+	} \
+	int serial##port##_tstc(void) \
+	{ \
+		return serial_tstc_dev(port); \
+	} \
+	void serial##port##_putc(const char c) \
+	{ \
+		serial_putc_dev(port, c); \
+	} \
+	void serial##port##_puts(const char *s) \
+	{ \
+		serial_puts_dev(port, s); \
+	}
+
+#define INIT_PSC_SERIAL_STRUCTURE(port, name, bus) { \
+	name, \
+	bus, \
+	serial##port##_init, \
+	serial##port##_uninit, \
+	serial##port##_setbrg, \
+	serial##port##_getc, \
+	serial##port##_tstc, \
+	serial##port##_putc, \
+	serial##port##_puts, \
+}
+
+#if defined(CONFIG_SYS_PSC1)
+DECLARE_PSC_SERIAL_FUNCTIONS(1);
+struct serial_device serial1_device =
+INIT_PSC_SERIAL_STRUCTURE(1, "psc1", "UART1");
+#endif
+
+#if defined(CONFIG_SYS_PSC3)
+DECLARE_PSC_SERIAL_FUNCTIONS(3);
+struct serial_device serial3_device =
+INIT_PSC_SERIAL_STRUCTURE(3, "psc3", "UART3");
+#endif
+
+#if defined(CONFIG_SYS_PSC4)
+DECLARE_PSC_SERIAL_FUNCTIONS(4);
+struct serial_device serial4_device =
+INIT_PSC_SERIAL_STRUCTURE(4, "psc4", "UART4");
+#endif
+
+#if defined(CONFIG_SYS_PSC6)
+DECLARE_PSC_SERIAL_FUNCTIONS(6);
+struct serial_device serial6_device =
+INIT_PSC_SERIAL_STRUCTURE(6, "psc6", "UART6");
+#endif
+
+#else
+
+void serial_setbrg(void)
+{
+	serial_setbrg_dev(CONFIG_PSC_CONSOLE);
+}
+
+int serial_init(void)
+{
+	return serial_init_dev(CONFIG_PSC_CONSOLE);
+}
+
+void serial_putc(const char c)
+{
+	serial_putc_dev(CONFIG_PSC_CONSOLE, c);
+}
+
+void serial_putc_raw(const char c)
+{
+	serial_putc_raw_dev(CONFIG_PSC_CONSOLE, c);
+}
+
+void serial_puts(const char *s)
+{
+	serial_puts_dev(CONFIG_PSC_CONSOLE, s);
+}
+
+int serial_getc(void)
+{
+	return serial_getc_dev(CONFIG_PSC_CONSOLE);
+}
+
+int serial_tstc(void)
+{
+	return serial_tstc_dev(CONFIG_PSC_CONSOLE);
+}
+
+void serial_setrts(int s)
+{
+	return serial_setrts_dev(CONFIG_PSC_CONSOLE, s);
+}
+
+int serial_getcts(void)
+{
+	return serial_getcts_dev(CONFIG_PSC_CONSOLE);
+}
+#endif /* CONFIG_PSC_CONSOLE */
+
+#if defined(CONFIG_SERIAL_MULTI)
+#include <stdio_dev.h>
+/*
+ * Routines for communication with serial devices over PSC
+ */
+/* Bitfield for initialized PSCs */
+static unsigned int initialized;
+
+struct stdio_dev *open_port(int num, int baudrate)
+{
+	struct stdio_dev *port;
+	char env_var[16];
+	char env_val[10];
+	char name[7];
+
+	if (num < 0 || num > 11)
+		return NULL;
+
+	sprintf(name, "psc%d", num);
+	port = stdio_get_by_name(name);
+	if (!port)
+		return NULL;
+
+	if (!test_bit(num, &initialized)) {
+		sprintf(env_var, "psc%d_baudrate", num);
+		sprintf(env_val, "%d", baudrate);
+		setenv(env_var, env_val);
+
+		if (port->start())
+			return NULL;
+
+		set_bit(num, &initialized);
+	}
+
+	return port;
+}
+
+int close_port(int num)
+{
+	struct stdio_dev *port;
+	int ret;
+	char name[7];
+
+	if (num < 0 || num > 11)
+		return -1;
+
+	sprintf(name, "psc%d", num);
+	port = stdio_get_by_name(name);
+	if (!port)
+		return -1;
+
+	ret = port->stop();
+	clear_bit(num, &initialized);
+
+	return ret;
+}
+
+int write_port(struct stdio_dev *port, char *buf)
+{
+	if (!port || !buf)
+		return -1;
+
+	port->puts(buf);
+
+	return 0;
+}
+
+int read_port(struct stdio_dev *port, char *buf, int size)
+{
+	int cnt = 0;
+
+	if (!port || !buf)
+		return -1;
+
+	if (!size)
+		return 0;
+
+	while (port->tstc()) {
+		buf[cnt++] = port->getc();
+		if (cnt > size)
+			break;
+	}
+
+	return cnt;
+}
+#endif /* CONFIG_SERIAL_MULTI */
diff --git a/arch/ppc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c
index ce8d094..ce8d094 100644
--- a/arch/ppc/cpu/mpc512x/speed.c
+++ b/arch/powerpc/cpu/mpc512x/speed.c
diff --git a/arch/ppc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S
index d26b617..d26b617 100644
--- a/arch/ppc/cpu/mpc512x/start.S
+++ b/arch/powerpc/cpu/mpc512x/start.S
diff --git a/arch/ppc/cpu/mpc512x/traps.c b/arch/powerpc/cpu/mpc512x/traps.c
index 786f4a5..786f4a5 100644
--- a/arch/ppc/cpu/mpc512x/traps.c
+++ b/arch/powerpc/cpu/mpc512x/traps.c
diff --git a/arch/ppc/cpu/mpc512x/u-boot.lds b/arch/powerpc/cpu/mpc512x/u-boot.lds
index fbc2026..c716799 100644
--- a/arch/ppc/cpu/mpc512x/u-boot.lds
+++ b/arch/powerpc/cpu/mpc512x/u-boot.lds
@@ -49,7 +49,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    arch/ppc/cpu/mpc512x/start.o	(.text)
+    arch/powerpc/cpu/mpc512x/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/arch/ppc/cpu/mpc5xx/Makefile b/arch/powerpc/cpu/mpc5xx/Makefile
index f2ebb9a..80c5320 100644
--- a/arch/ppc/cpu/mpc5xx/Makefile
+++ b/arch/powerpc/cpu/mpc5xx/Makefile
@@ -25,11 +25,11 @@
 #
 
 #
-# File:			arch/ppc/cpu/mpc5xx/Makefile
+# File:			arch/powerpc/cpu/mpc5xx/Makefile
 #
 # Discription:		Makefile to build mpc5xx cpu configuration.
 #			Will include top config.mk which itselfs
-#			uses the definitions made in arch/ppc/cpu/mpc5xx/config.mk
+#			uses the definitions made in arch/powerpc/cpu/mpc5xx/config.mk
 #
 
 
diff --git a/arch/ppc/cpu/mpc5xx/config.mk b/arch/powerpc/cpu/mpc5xx/config.mk
index e0b0ce1..5f9285d 100644
--- a/arch/ppc/cpu/mpc5xx/config.mk
+++ b/arch/powerpc/cpu/mpc5xx/config.mk
@@ -33,4 +33,4 @@ PLATFORM_RELFLAGS +=	-fPIC -meabi
 PLATFORM_CPPFLAGS +=	-DCONFIG_5xx -ffixed-r2 -mpowerpc -msoft-float
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xx/u-boot.lds
diff --git a/arch/ppc/cpu/mpc5xx/cpu.c b/arch/powerpc/cpu/mpc5xx/cpu.c
index 7fffebc..7fffebc 100644
--- a/arch/ppc/cpu/mpc5xx/cpu.c
+++ b/arch/powerpc/cpu/mpc5xx/cpu.c
diff --git a/arch/ppc/cpu/mpc5xx/cpu_init.c b/arch/powerpc/cpu/mpc5xx/cpu_init.c
index cb4bf84..cb4bf84 100644
--- a/arch/ppc/cpu/mpc5xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc5xx/cpu_init.c
diff --git a/arch/ppc/cpu/mpc5xx/interrupts.c b/arch/powerpc/cpu/mpc5xx/interrupts.c
index 167543f..167543f 100644
--- a/arch/ppc/cpu/mpc5xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc5xx/interrupts.c
diff --git a/arch/ppc/cpu/mpc5xx/serial.c b/arch/powerpc/cpu/mpc5xx/serial.c
index 88c6db8..88c6db8 100644
--- a/arch/ppc/cpu/mpc5xx/serial.c
+++ b/arch/powerpc/cpu/mpc5xx/serial.c
diff --git a/arch/ppc/cpu/mpc5xx/speed.c b/arch/powerpc/cpu/mpc5xx/speed.c
index ea5c1de..ea5c1de 100644
--- a/arch/ppc/cpu/mpc5xx/speed.c
+++ b/arch/powerpc/cpu/mpc5xx/speed.c
diff --git a/arch/ppc/cpu/mpc5xx/spi.c b/arch/powerpc/cpu/mpc5xx/spi.c
index 3ca15ea..3ca15ea 100644
--- a/arch/ppc/cpu/mpc5xx/spi.c
+++ b/arch/powerpc/cpu/mpc5xx/spi.c
diff --git a/arch/ppc/cpu/mpc5xx/start.S b/arch/powerpc/cpu/mpc5xx/start.S
index 0af879e..0af879e 100644
--- a/arch/ppc/cpu/mpc5xx/start.S
+++ b/arch/powerpc/cpu/mpc5xx/start.S
diff --git a/arch/ppc/cpu/mpc5xx/traps.c b/arch/powerpc/cpu/mpc5xx/traps.c
index 6882c21..e3ce11b 100644
--- a/arch/ppc/cpu/mpc5xx/traps.c
+++ b/arch/powerpc/cpu/mpc5xx/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/mpc5xx/u-boot.lds b/arch/powerpc/cpu/mpc5xx/u-boot.lds
index 55190c7..d5e5dc1 100644
--- a/arch/ppc/cpu/mpc5xx/u-boot.lds
+++ b/arch/powerpc/cpu/mpc5xx/u-boot.lds
@@ -55,7 +55,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    arch/ppc/cpu/mpc5xx/start.o	(.text)
+    arch/powerpc/cpu/mpc5xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/arch/ppc/cpu/mpc5xxx/Makefile b/arch/powerpc/cpu/mpc5xxx/Makefile
index 0ee0611..0ee0611 100644
--- a/arch/ppc/cpu/mpc5xxx/Makefile
+++ b/arch/powerpc/cpu/mpc5xxx/Makefile
diff --git a/arch/ppc/cpu/mpc5xxx/config.mk b/arch/powerpc/cpu/mpc5xxx/config.mk
index 9a64cb6..7ef8a47 100644
--- a/arch/ppc/cpu/mpc5xxx/config.mk
+++ b/arch/powerpc/cpu/mpc5xxx/config.mk
@@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 \
 		     -mstring -mcpu=603e -mmultiple
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot.lds
diff --git a/arch/ppc/cpu/mpc5xxx/cpu.c b/arch/powerpc/cpu/mpc5xxx/cpu.c
index b20234d..b20234d 100644
--- a/arch/ppc/cpu/mpc5xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc5xxx/cpu.c
diff --git a/arch/ppc/cpu/mpc5xxx/cpu_init.c b/arch/powerpc/cpu/mpc5xxx/cpu_init.c
index 9daf375..9daf375 100644
--- a/arch/ppc/cpu/mpc5xxx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc5xxx/cpu_init.c
diff --git a/arch/ppc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S b/arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S
index 00c2312..00c2312 100644
--- a/arch/ppc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S
+++ b/arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S
diff --git a/arch/ppc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c
index 4f7f716..4f7f716 100644
--- a/arch/ppc/cpu/mpc5xxx/i2c.c
+++ b/arch/powerpc/cpu/mpc5xxx/i2c.c
diff --git a/arch/ppc/cpu/mpc5xxx/ide.c b/arch/powerpc/cpu/mpc5xxx/ide.c
index d337abb..d337abb 100644
--- a/arch/ppc/cpu/mpc5xxx/ide.c
+++ b/arch/powerpc/cpu/mpc5xxx/ide.c
diff --git a/arch/ppc/cpu/mpc5xxx/interrupts.c b/arch/powerpc/cpu/mpc5xxx/interrupts.c
index 6035771..16eee3a 100644
--- a/arch/ppc/cpu/mpc5xxx/interrupts.c
+++ b/arch/powerpc/cpu/mpc5xxx/interrupts.c
@@ -27,7 +27,7 @@
  * MA 02111-1307 USA
  */
 
-/* this section was ripped out of arch/ppc/syslib/mpc52xx_pic.c in the
+/* this section was ripped out of arch/powerpc/syslib/mpc52xx_pic.c in the
  * Linux 2.6 source with the following copyright.
  *
  * Based on (well, mostly copied from) the code from the 2.4 kernel by
diff --git a/arch/ppc/cpu/mpc5xxx/io.S b/arch/powerpc/cpu/mpc5xxx/io.S
index 2178a26..2178a26 100644
--- a/arch/ppc/cpu/mpc5xxx/io.S
+++ b/arch/powerpc/cpu/mpc5xxx/io.S
diff --git a/arch/ppc/cpu/mpc5xxx/loadtask.c b/arch/powerpc/cpu/mpc5xxx/loadtask.c
index 47e7b59..47e7b59 100644
--- a/arch/ppc/cpu/mpc5xxx/loadtask.c
+++ b/arch/powerpc/cpu/mpc5xxx/loadtask.c
diff --git a/arch/ppc/cpu/mpc5xxx/pci_mpc5200.c b/arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c
index 8268f8a..8268f8a 100644
--- a/arch/ppc/cpu/mpc5xxx/pci_mpc5200.c
+++ b/arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c
diff --git a/arch/ppc/cpu/mpc5xxx/serial.c b/arch/powerpc/cpu/mpc5xxx/serial.c
index 6675988..0127065 100644
--- a/arch/ppc/cpu/mpc5xxx/serial.c
+++ b/arch/powerpc/cpu/mpc5xxx/serial.c
@@ -21,7 +21,7 @@
  * MA 02111-1307 USA
  *
  * Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00, with
- * changes based on the file arch/ppc/mbxboot/m8260_tty.c from the
+ * changes based on the file arch/powerpc/mbxboot/m8260_tty.c from the
  * Linux/PPC sources (m8260_tty.c had no copyright info in it).
  *
  * Martin Krause, 8 Jun 2006
@@ -340,6 +340,7 @@ struct serial_device serial0_device =
 	"serial0",
 	"UART0",
 	serial0_init,
+	NULL,
 	serial0_setbrg,
 	serial0_getc,
 	serial0_tstc,
@@ -352,6 +353,7 @@ struct serial_device serial1_device =
 	"serial1",
 	"UART1",
 	serial1_init,
+	NULL,
 	serial1_setbrg,
 	serial1_getc,
 	serial1_tstc,
diff --git a/arch/ppc/cpu/mpc5xxx/speed.c b/arch/powerpc/cpu/mpc5xxx/speed.c
index 8027d3e..8027d3e 100644
--- a/arch/ppc/cpu/mpc5xxx/speed.c
+++ b/arch/powerpc/cpu/mpc5xxx/speed.c
diff --git a/arch/ppc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S
index ba49944..8b9f09b 100644
--- a/arch/ppc/cpu/mpc5xxx/start.S
+++ b/arch/powerpc/cpu/mpc5xxx/start.S
@@ -442,7 +442,7 @@ init_5xxx_core:
 	/*								*/
 	/* bits 15-19 correspond to addresses 0x00000000 to 0x0001F000	*/
 	/* incrementing by 0x1000 each time. The code below is sort of	*/
-	/* based on code in "flush_tlbs" from arch/ppc/kernel/head.S	*/
+	/* based on code in "flush_tlbs" from arch/powerpc/kernel/head.S	*/
 	/*								*/
 	/*--------------------------------------------------------------*/
 
diff --git a/arch/ppc/cpu/mpc5xxx/traps.c b/arch/powerpc/cpu/mpc5xxx/traps.c
index 934a2f2..5972f34 100644
--- a/arch/ppc/cpu/mpc5xxx/traps.c
+++ b/arch/powerpc/cpu/mpc5xxx/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds b/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds
index 81ebde9..ecffc1b 100644
--- a/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds
+++ b/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within  */
     /* the sector layout of our flash chips!    XXX FIXME XXX   */
 
-    arch/ppc/cpu/mpc5xxx/start.o          (.text)
-    arch/ppc/cpu/mpc5xxx/traps.o          (.text)
+    arch/powerpc/cpu/mpc5xxx/start.o          (.text)
+    arch/powerpc/cpu/mpc5xxx/traps.o          (.text)
     lib/crc32.o         (.text)
-    arch/ppc/lib/cache.o             (.text)
-    arch/ppc/lib/time.o              (.text)
+    arch/powerpc/lib/cache.o             (.text)
+    arch/powerpc/lib/time.o              (.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o        (.ppcenv)
diff --git a/arch/ppc/cpu/mpc5xxx/u-boot.lds b/arch/powerpc/cpu/mpc5xxx/u-boot.lds
index 64ef481..ea4060d 100644
--- a/arch/ppc/cpu/mpc5xxx/u-boot.lds
+++ b/arch/powerpc/cpu/mpc5xxx/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    arch/ppc/cpu/mpc5xxx/start.o	(.text)
+    arch/powerpc/cpu/mpc5xxx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/arch/ppc/cpu/mpc5xxx/usb.c b/arch/powerpc/cpu/mpc5xxx/usb.c
index bec7da3..bec7da3 100644
--- a/arch/ppc/cpu/mpc5xxx/usb.c
+++ b/arch/powerpc/cpu/mpc5xxx/usb.c
diff --git a/arch/ppc/cpu/mpc5xxx/usb_ohci.c b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
index 7976e4d..7976e4d 100644
--- a/arch/ppc/cpu/mpc5xxx/usb_ohci.c
+++ b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
diff --git a/arch/ppc/cpu/mpc5xxx/usb_ohci.h b/arch/powerpc/cpu/mpc5xxx/usb_ohci.h
index 629b529..629b529 100644
--- a/arch/ppc/cpu/mpc5xxx/usb_ohci.h
+++ b/arch/powerpc/cpu/mpc5xxx/usb_ohci.h
diff --git a/arch/ppc/cpu/mpc8220/Makefile b/arch/powerpc/cpu/mpc8220/Makefile
index b4fad28..b4fad28 100644
--- a/arch/ppc/cpu/mpc8220/Makefile
+++ b/arch/powerpc/cpu/mpc8220/Makefile
diff --git a/arch/ppc/cpu/mpc8220/config.mk b/arch/powerpc/cpu/mpc8220/config.mk
index e2ebf38..e706883 100644
--- a/arch/ppc/cpu/mpc8220/config.mk
+++ b/arch/powerpc/cpu/mpc8220/config.mk
@@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 \
 		     -mstring -mcpu=603e -mmultiple
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc8220/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc8220/u-boot.lds
diff --git a/arch/ppc/cpu/mpc8220/cpu.c b/arch/powerpc/cpu/mpc8220/cpu.c
index 563cfe0..563cfe0 100644
--- a/arch/ppc/cpu/mpc8220/cpu.c
+++ b/arch/powerpc/cpu/mpc8220/cpu.c
diff --git a/arch/ppc/cpu/mpc8220/cpu_init.c b/arch/powerpc/cpu/mpc8220/cpu_init.c
index 8f52c7d..8f52c7d 100644
--- a/arch/ppc/cpu/mpc8220/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8220/cpu_init.c
diff --git a/arch/ppc/cpu/mpc8220/dma.h b/arch/powerpc/cpu/mpc8220/dma.h
index d06ee63..d06ee63 100644
--- a/arch/ppc/cpu/mpc8220/dma.h
+++ b/arch/powerpc/cpu/mpc8220/dma.h
diff --git a/arch/ppc/cpu/mpc8220/dramSetup.c b/arch/powerpc/cpu/mpc8220/dramSetup.c
index 52cf133..52cf133 100644
--- a/arch/ppc/cpu/mpc8220/dramSetup.c
+++ b/arch/powerpc/cpu/mpc8220/dramSetup.c
diff --git a/arch/ppc/cpu/mpc8220/dramSetup.h b/arch/powerpc/cpu/mpc8220/dramSetup.h
index 3b64e08..3b64e08 100644
--- a/arch/ppc/cpu/mpc8220/dramSetup.h
+++ b/arch/powerpc/cpu/mpc8220/dramSetup.h
diff --git a/arch/ppc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c
index 992e0ff..992e0ff 100644
--- a/arch/ppc/cpu/mpc8220/fec.c
+++ b/arch/powerpc/cpu/mpc8220/fec.c
diff --git a/arch/ppc/cpu/mpc8220/fec.h b/arch/powerpc/cpu/mpc8220/fec.h
index a8927fc..a8927fc 100644
--- a/arch/ppc/cpu/mpc8220/fec.h
+++ b/arch/powerpc/cpu/mpc8220/fec.h
diff --git a/arch/ppc/cpu/mpc8220/fec_dma_tasks.S b/arch/powerpc/cpu/mpc8220/fec_dma_tasks.S
index 3f8a03b..3f8a03b 100644
--- a/arch/ppc/cpu/mpc8220/fec_dma_tasks.S
+++ b/arch/powerpc/cpu/mpc8220/fec_dma_tasks.S
diff --git a/arch/ppc/cpu/mpc8220/i2c.c b/arch/powerpc/cpu/mpc8220/i2c.c
index 76ecdf1..76ecdf1 100644
--- a/arch/ppc/cpu/mpc8220/i2c.c
+++ b/arch/powerpc/cpu/mpc8220/i2c.c
diff --git a/arch/ppc/cpu/mpc8220/i2cCore.c b/arch/powerpc/cpu/mpc8220/i2cCore.c
index b89ad03..b89ad03 100644
--- a/arch/ppc/cpu/mpc8220/i2cCore.c
+++ b/arch/powerpc/cpu/mpc8220/i2cCore.c
diff --git a/arch/ppc/cpu/mpc8220/i2cCore.h b/arch/powerpc/cpu/mpc8220/i2cCore.h
index 72783fd..72783fd 100644
--- a/arch/ppc/cpu/mpc8220/i2cCore.h
+++ b/arch/powerpc/cpu/mpc8220/i2cCore.h
diff --git a/arch/ppc/cpu/mpc8220/interrupts.c b/arch/powerpc/cpu/mpc8220/interrupts.c
index 78e9917..78e9917 100644
--- a/arch/ppc/cpu/mpc8220/interrupts.c
+++ b/arch/powerpc/cpu/mpc8220/interrupts.c
diff --git a/arch/ppc/cpu/mpc8220/io.S b/arch/powerpc/cpu/mpc8220/io.S
index 5ecdf55..5ecdf55 100644
--- a/arch/ppc/cpu/mpc8220/io.S
+++ b/arch/powerpc/cpu/mpc8220/io.S
diff --git a/arch/ppc/cpu/mpc8220/loadtask.c b/arch/powerpc/cpu/mpc8220/loadtask.c
index 6d8b627..6d8b627 100644
--- a/arch/ppc/cpu/mpc8220/loadtask.c
+++ b/arch/powerpc/cpu/mpc8220/loadtask.c
diff --git a/arch/ppc/cpu/mpc8220/pci.c b/arch/powerpc/cpu/mpc8220/pci.c
index 7ef43b7..7ef43b7 100644
--- a/arch/ppc/cpu/mpc8220/pci.c
+++ b/arch/powerpc/cpu/mpc8220/pci.c
diff --git a/arch/ppc/cpu/mpc8220/speed.c b/arch/powerpc/cpu/mpc8220/speed.c
index 62ac845..62ac845 100644
--- a/arch/ppc/cpu/mpc8220/speed.c
+++ b/arch/powerpc/cpu/mpc8220/speed.c
diff --git a/arch/ppc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S
index e28999d..3d79d8e 100644
--- a/arch/ppc/cpu/mpc8220/start.S
+++ b/arch/powerpc/cpu/mpc8220/start.S
@@ -419,7 +419,7 @@ init_8220_core:
 	/*								*/
 	/* bits 15-19 correspond to addresses 0x00000000 to 0x0001F000	*/
 	/* incrementing by 0x1000 each time. The code below is sort of	*/
-	/* based on code in "flush_tlbs" from arch/ppc/kernel/head.S	*/
+	/* based on code in "flush_tlbs" from arch/powerpc/kernel/head.S	*/
 	/*								*/
 	/*--------------------------------------------------------------*/
 
diff --git a/arch/ppc/cpu/mpc8220/traps.c b/arch/powerpc/cpu/mpc8220/traps.c
index 4565780..13894c9 100644
--- a/arch/ppc/cpu/mpc8220/traps.c
+++ b/arch/powerpc/cpu/mpc8220/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/mpc8220/u-boot.lds b/arch/powerpc/cpu/mpc8220/u-boot.lds
index 8c5d307..31a7a0e 100644
--- a/arch/ppc/cpu/mpc8220/u-boot.lds
+++ b/arch/powerpc/cpu/mpc8220/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    arch/ppc/cpu/mpc8220/start.o	(.text)
+    arch/powerpc/cpu/mpc8220/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/arch/ppc/cpu/mpc8220/uart.c b/arch/powerpc/cpu/mpc8220/uart.c
index 0c4b536..0c4b536 100644
--- a/arch/ppc/cpu/mpc8220/uart.c
+++ b/arch/powerpc/cpu/mpc8220/uart.c
diff --git a/arch/ppc/cpu/mpc824x/.gitignore b/arch/powerpc/cpu/mpc824x/.gitignore
index 2d79931..2d79931 100644
--- a/arch/ppc/cpu/mpc824x/.gitignore
+++ b/arch/powerpc/cpu/mpc824x/.gitignore
diff --git a/arch/ppc/cpu/mpc824x/Makefile b/arch/powerpc/cpu/mpc824x/Makefile
index a57ad12..a57ad12 100644
--- a/arch/ppc/cpu/mpc824x/Makefile
+++ b/arch/powerpc/cpu/mpc824x/Makefile
diff --git a/arch/ppc/cpu/mpc824x/config.mk b/arch/powerpc/cpu/mpc824x/config.mk
index 31ecd20..27c2873 100644
--- a/arch/ppc/cpu/mpc824x/config.mk
+++ b/arch/powerpc/cpu/mpc824x/config.mk
@@ -26,4 +26,4 @@ PLATFORM_RELFLAGS += -fPIC -meabi
 PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -mstring -mcpu=603e -msoft-float
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc824x/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc824x/u-boot.lds
diff --git a/arch/ppc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c
index 08f6a94..08f6a94 100644
--- a/arch/ppc/cpu/mpc824x/cpu.c
+++ b/arch/powerpc/cpu/mpc824x/cpu.c
diff --git a/arch/ppc/cpu/mpc824x/cpu_init.c b/arch/powerpc/cpu/mpc824x/cpu_init.c
index 395f776..395f776 100644
--- a/arch/ppc/cpu/mpc824x/cpu_init.c
+++ b/arch/powerpc/cpu/mpc824x/cpu_init.c
diff --git a/arch/ppc/cpu/mpc824x/drivers/epic.h b/arch/powerpc/cpu/mpc824x/drivers/epic.h
index 2803f63..2803f63 100644
--- a/arch/ppc/cpu/mpc824x/drivers/epic.h
+++ b/arch/powerpc/cpu/mpc824x/drivers/epic.h
diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/README b/arch/powerpc/cpu/mpc824x/drivers/epic/README
index 5798996..5798996 100644
--- a/arch/ppc/cpu/mpc824x/drivers/epic/README
+++ b/arch/powerpc/cpu/mpc824x/drivers/epic/README
diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epic.h b/arch/powerpc/cpu/mpc824x/drivers/epic/epic.h
index 58f81c5..58f81c5 100644
--- a/arch/ppc/cpu/mpc824x/drivers/epic/epic.h
+++ b/arch/powerpc/cpu/mpc824x/drivers/epic/epic.h
diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epic1.c b/arch/powerpc/cpu/mpc824x/drivers/epic/epic1.c
index ecbb42d..ecbb42d 100644
--- a/arch/ppc/cpu/mpc824x/drivers/epic/epic1.c
+++ b/arch/powerpc/cpu/mpc824x/drivers/epic/epic1.c
diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epic2.S b/arch/powerpc/cpu/mpc824x/drivers/epic/epic2.S
index 52d19aa..52d19aa 100644
--- a/arch/ppc/cpu/mpc824x/drivers/epic/epic2.S
+++ b/arch/powerpc/cpu/mpc824x/drivers/epic/epic2.S
diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S b/arch/powerpc/cpu/mpc824x/drivers/epic/epicutil.S
index 4877050..4877050 100644
--- a/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S
+++ b/arch/powerpc/cpu/mpc824x/drivers/epic/epicutil.S
diff --git a/arch/ppc/cpu/mpc824x/drivers/errors.h b/arch/powerpc/cpu/mpc824x/drivers/errors.h
index 20794a2..20794a2 100644
--- a/arch/ppc/cpu/mpc824x/drivers/errors.h
+++ b/arch/powerpc/cpu/mpc824x/drivers/errors.h
diff --git a/arch/ppc/cpu/mpc824x/drivers/i2c/i2c.c b/arch/powerpc/cpu/mpc824x/drivers/i2c/i2c.c
index 637ae4c..637ae4c 100644
--- a/arch/ppc/cpu/mpc824x/drivers/i2c/i2c.c
+++ b/arch/powerpc/cpu/mpc824x/drivers/i2c/i2c.c
diff --git a/arch/ppc/cpu/mpc824x/drivers/i2c_export.h b/arch/powerpc/cpu/mpc824x/drivers/i2c_export.h
index 6264d18..6264d18 100644
--- a/arch/ppc/cpu/mpc824x/drivers/i2c_export.h
+++ b/arch/powerpc/cpu/mpc824x/drivers/i2c_export.h
diff --git a/arch/ppc/cpu/mpc824x/interrupts.c b/arch/powerpc/cpu/mpc824x/interrupts.c
index 139c52c..139c52c 100644
--- a/arch/ppc/cpu/mpc824x/interrupts.c
+++ b/arch/powerpc/cpu/mpc824x/interrupts.c
diff --git a/arch/ppc/cpu/mpc824x/pci.c b/arch/powerpc/cpu/mpc824x/pci.c
index cf9cf41..72aaec7 100644
--- a/arch/ppc/cpu/mpc824x/pci.c
+++ b/arch/powerpc/cpu/mpc824x/pci.c
@@ -1,5 +1,5 @@
 /*
- * arch/ppc/kernel/mpc10x_common.c
+ * arch/powerpc/kernel/mpc10x_common.c
  *
  * Common routines for the Motorola SPS MPC106, MPC107 and MPC8240 Host bridge,
  * Mem ctlr, EPIC, etc.
diff --git a/arch/ppc/cpu/mpc824x/speed.c b/arch/powerpc/cpu/mpc824x/speed.c
index fdcb972..fdcb972 100644
--- a/arch/ppc/cpu/mpc824x/speed.c
+++ b/arch/powerpc/cpu/mpc824x/speed.c
diff --git a/arch/ppc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S
index f3f595a..f3f595a 100644
--- a/arch/ppc/cpu/mpc824x/start.S
+++ b/arch/powerpc/cpu/mpc824x/start.S
diff --git a/arch/ppc/cpu/mpc824x/traps.c b/arch/powerpc/cpu/mpc824x/traps.c
index 0a72430..163b983 100644
--- a/arch/ppc/cpu/mpc824x/traps.c
+++ b/arch/powerpc/cpu/mpc824x/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/mpc824x/u-boot.lds b/arch/powerpc/cpu/mpc824x/u-boot.lds
index 8a6d508..d1fcd7c 100644
--- a/arch/ppc/cpu/mpc824x/u-boot.lds
+++ b/arch/powerpc/cpu/mpc824x/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    arch/ppc/cpu/mpc824x/start.o		(.text)
+    arch/powerpc/cpu/mpc824x/start.o		(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/arch/ppc/cpu/mpc8260/Makefile b/arch/powerpc/cpu/mpc8260/Makefile
index 9f0c2dd..9f0c2dd 100644
--- a/arch/ppc/cpu/mpc8260/Makefile
+++ b/arch/powerpc/cpu/mpc8260/Makefile
diff --git a/arch/ppc/cpu/mpc8260/bedbug_603e.c b/arch/powerpc/cpu/mpc8260/bedbug_603e.c
index c969ff6..c969ff6 100644
--- a/arch/ppc/cpu/mpc8260/bedbug_603e.c
+++ b/arch/powerpc/cpu/mpc8260/bedbug_603e.c
diff --git a/arch/ppc/cpu/mpc8260/commproc.c b/arch/powerpc/cpu/mpc8260/commproc.c
index 94f6bc2..111a67c 100644
--- a/arch/ppc/cpu/mpc8260/commproc.c
+++ b/arch/powerpc/cpu/mpc8260/commproc.c
@@ -1,5 +1,5 @@
 /*
- * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's
+ * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
  * copyright notice:
  *
  * General Purpose functions for the global management of the
diff --git a/arch/ppc/cpu/mpc8260/config.mk b/arch/powerpc/cpu/mpc8260/config.mk
index 51bb9fa..a9bb688 100644
--- a/arch/ppc/cpu/mpc8260/config.mk
+++ b/arch/powerpc/cpu/mpc8260/config.mk
@@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 \
 		     -mstring -mcpu=603e -mmultiple
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc8260/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc8260/u-boot.lds
diff --git a/arch/ppc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c
index aedbf29..aedbf29 100644
--- a/arch/ppc/cpu/mpc8260/cpu.c
+++ b/arch/powerpc/cpu/mpc8260/cpu.c
diff --git a/arch/ppc/cpu/mpc8260/cpu_init.c b/arch/powerpc/cpu/mpc8260/cpu_init.c
index 1d52773..1d52773 100644
--- a/arch/ppc/cpu/mpc8260/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8260/cpu_init.c
diff --git a/arch/ppc/cpu/mpc8260/ether_fcc.c b/arch/powerpc/cpu/mpc8260/ether_fcc.c
index 5ac02a0..5ac02a0 100644
--- a/arch/ppc/cpu/mpc8260/ether_fcc.c
+++ b/arch/powerpc/cpu/mpc8260/ether_fcc.c
diff --git a/arch/ppc/cpu/mpc8260/ether_scc.c b/arch/powerpc/cpu/mpc8260/ether_scc.c
index 432111d..432111d 100644
--- a/arch/ppc/cpu/mpc8260/ether_scc.c
+++ b/arch/powerpc/cpu/mpc8260/ether_scc.c
diff --git a/arch/ppc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c
index d2bdcc2..d2bdcc2 100644
--- a/arch/ppc/cpu/mpc8260/i2c.c
+++ b/arch/powerpc/cpu/mpc8260/i2c.c
diff --git a/arch/ppc/cpu/mpc8260/interrupts.c b/arch/powerpc/cpu/mpc8260/interrupts.c
index a7700c4..2606c60 100644
--- a/arch/ppc/cpu/mpc8260/interrupts.c
+++ b/arch/powerpc/cpu/mpc8260/interrupts.c
@@ -44,7 +44,7 @@ static struct irq_action irq_handlers[NR_IRQS];
 static ulong ppc_cached_irq_mask[NR_MASK_WORDS];
 
 /****************************************************************************/
-/* this section was ripped out of arch/ppc/kernel/ppc8260_pic.c in the	    */
+/* this section was ripped out of arch/powerpc/kernel/ppc8260_pic.c in the	    */
 /* Linux/PPC 2.4.x source. There was no copyright notice in that file.	    */
 
 /* The 8260 internal interrupt controller.  It is usually
@@ -137,7 +137,7 @@ static int m8260_get_irq (struct pt_regs *regs)
 	return irq;
 }
 
-/* end of code ripped out of arch/ppc/kernel/ppc8260_pic.c		    */
+/* end of code ripped out of arch/powerpc/kernel/ppc8260_pic.c		    */
 /****************************************************************************/
 
 int interrupt_init_cpu (unsigned *decrementer_count)
diff --git a/arch/ppc/cpu/mpc8260/kgdb.S b/arch/powerpc/cpu/mpc8260/kgdb.S
index c5936c7..c5936c7 100644
--- a/arch/ppc/cpu/mpc8260/kgdb.S
+++ b/arch/powerpc/cpu/mpc8260/kgdb.S
diff --git a/arch/ppc/cpu/mpc8260/pci.c b/arch/powerpc/cpu/mpc8260/pci.c
index 6a14ba4..6a14ba4 100644
--- a/arch/ppc/cpu/mpc8260/pci.c
+++ b/arch/powerpc/cpu/mpc8260/pci.c
diff --git a/arch/ppc/cpu/mpc8260/serial_scc.c b/arch/powerpc/cpu/mpc8260/serial_scc.c
index 4ab6a28..4ab6a28 100644
--- a/arch/ppc/cpu/mpc8260/serial_scc.c
+++ b/arch/powerpc/cpu/mpc8260/serial_scc.c
diff --git a/arch/ppc/cpu/mpc8260/serial_smc.c b/arch/powerpc/cpu/mpc8260/serial_smc.c
index fbb3fb0..7b6eaba 100644
--- a/arch/ppc/cpu/mpc8260/serial_smc.c
+++ b/arch/powerpc/cpu/mpc8260/serial_smc.c
@@ -21,7 +21,7 @@
  * MA 02111-1307 USA
  *
  * Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00, with
- * changes based on the file arch/ppc/mbxboot/m8260_tty.c from the
+ * changes based on the file arch/powerpc/mbxboot/m8260_tty.c from the
  * Linux/PPC sources (m8260_tty.c had no copyright info in it).
  */
 
diff --git a/arch/ppc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c
index 0e1c2b0..0e1c2b0 100644
--- a/arch/ppc/cpu/mpc8260/speed.c
+++ b/arch/powerpc/cpu/mpc8260/speed.c
diff --git a/arch/ppc/cpu/mpc8260/speed.h b/arch/powerpc/cpu/mpc8260/speed.h
index 3f32a14..3f32a14 100644
--- a/arch/ppc/cpu/mpc8260/speed.h
+++ b/arch/powerpc/cpu/mpc8260/speed.h
diff --git a/arch/ppc/cpu/mpc8260/spi.c b/arch/powerpc/cpu/mpc8260/spi.c
index f5d2ac3..f5d2ac3 100644
--- a/arch/ppc/cpu/mpc8260/spi.c
+++ b/arch/powerpc/cpu/mpc8260/spi.c
diff --git a/arch/ppc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S
index 1fc70bc..a435042 100644
--- a/arch/ppc/cpu/mpc8260/start.S
+++ b/arch/powerpc/cpu/mpc8260/start.S
@@ -576,7 +576,7 @@ init_8260_core:
 	/*								*/
 	/* bits 15-19 correspond to addresses 0x00000000 to 0x0001F000	*/
 	/* incrementing by 0x1000 each time. The code below is sort of	*/
-	/* based on code in "flush_tlbs" from arch/ppc/kernel/head.S	*/
+	/* based on code in "flush_tlbs" from arch/powerpc/kernel/head.S	*/
 	/*								*/
 	/*--------------------------------------------------------------*/
 
diff --git a/arch/ppc/cpu/mpc8260/traps.c b/arch/powerpc/cpu/mpc8260/traps.c
index d216f71..c116cdf 100644
--- a/arch/ppc/cpu/mpc8260/traps.c
+++ b/arch/powerpc/cpu/mpc8260/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/mpc8260/u-boot.lds b/arch/powerpc/cpu/mpc8260/u-boot.lds
index 9887844..b8681e7 100644
--- a/arch/ppc/cpu/mpc8260/u-boot.lds
+++ b/arch/powerpc/cpu/mpc8260/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    arch/ppc/cpu/mpc8260/start.o		(.text)
+    arch/powerpc/cpu/mpc8260/start.o		(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/arch/ppc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index 15e2c18..15e2c18 100644
--- a/arch/ppc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
diff --git a/arch/ppc/cpu/mpc83xx/config.mk b/arch/powerpc/cpu/mpc83xx/config.mk
index 8596f6a..8a3a8c1 100644
--- a/arch/ppc/cpu/mpc83xx/config.mk
+++ b/arch/powerpc/cpu/mpc83xx/config.mk
@@ -26,4 +26,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \
 			-ffixed-r2 -msoft-float
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc83xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc83xx/u-boot.lds
diff --git a/arch/ppc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 51180d6..8b98a57 100644
--- a/arch/ppc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -106,7 +106,9 @@ int checkcpu(void)
 			puts(cpu_type_list[i].name);
 			if (IS_E_PROCESSOR(spridr))
 				puts("E");
-			if (REVID_MAJOR(spridr) >= 2)
+			if ((SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
+			     SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
+			    REVID_MAJOR(spridr) >= 2)
 				puts("A");
 			printf(", Rev: %d.%d", REVID_MAJOR(spridr),
 			       REVID_MINOR(spridr));
diff --git a/arch/ppc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 75b4522..75b4522 100644
--- a/arch/ppc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
diff --git a/arch/ppc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c
index f3942b4..f3942b4 100644
--- a/arch/ppc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
diff --git a/arch/ppc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index daf73a6..daf73a6 100644
--- a/arch/ppc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
diff --git a/arch/ppc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c
index faffbaf..faffbaf 100644
--- a/arch/ppc/cpu/mpc83xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc83xx/interrupts.c
diff --git a/arch/ppc/cpu/mpc83xx/nand_init.c b/arch/powerpc/cpu/mpc83xx/nand_init.c
index 38e141a..38e141a 100644
--- a/arch/ppc/cpu/mpc83xx/nand_init.c
+++ b/arch/powerpc/cpu/mpc83xx/nand_init.c
diff --git a/arch/ppc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index a42b230..a42b230 100644
--- a/arch/ppc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
diff --git a/arch/ppc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 77f8906..77f8906 100644
--- a/arch/ppc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
diff --git a/arch/ppc/cpu/mpc83xx/qe_io.c b/arch/powerpc/cpu/mpc83xx/qe_io.c
index db94f00..db94f00 100644
--- a/arch/ppc/cpu/mpc83xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc83xx/qe_io.c
diff --git a/arch/ppc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c
index 64033fe..fecfc80 100644
--- a/arch/ppc/cpu/mpc83xx/serdes.c
+++ b/arch/powerpc/cpu/mpc83xx/serdes.c
@@ -15,7 +15,7 @@
 #include <config.h>
 #include <common.h>
 #include <asm/io.h>
-#include <asm/fsl_serdes.h>
+#include <asm/fsl_mpc83xx_serdes.h>
 
 /* SerDes registers */
 #define FSL_SRDSCR0_OFFS		0x0
diff --git a/arch/ppc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 44aaa9a..44aaa9a 100644
--- a/arch/ppc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
diff --git a/arch/ppc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index bde7e92..500eef1 100644
--- a/arch/ppc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -116,7 +116,7 @@ int get_clocks(void)
 #if defined(CONFIG_MPC8315)
 	u32 tdm_clk;
 #endif
-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
 	u32 sdhc_clk;
 #endif
 	u32 enc_clk;
@@ -274,7 +274,7 @@ int get_clocks(void)
 		return -7;
 	}
 
-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
 	switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) {
 	case 0:
 		sdhc_clk = 0;
@@ -321,7 +321,7 @@ int get_clocks(void)
 	i2c1_clk = enc_clk;
 #elif defined(CONFIG_MPC831x)
 	i2c1_clk = enc_clk;
-#elif defined(CONFIG_MPC837x)
+#elif defined(CONFIG_FSL_ESDHC)
 	i2c1_clk = sdhc_clk;
 #endif
 #if !defined(CONFIG_MPC832x)
@@ -455,7 +455,7 @@ int get_clocks(void)
 #if defined(CONFIG_MPC8315)
 	gd->tdm_clk = tdm_clk;
 #endif
-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
 	gd->sdhc_clk = sdhc_clk;
 #endif
 	gd->core_clk = core_clk;
@@ -522,7 +522,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 #if defined(CONFIG_MPC8315)
 	printf("  TDM:                 %-4s MHz\n", strmhz(buf, gd->tdm_clk));
 #endif
-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
 	printf("  SDHC:                %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
 #endif
 #if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
diff --git a/arch/ppc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 68bb620..a7c8079 100644
--- a/arch/ppc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -720,7 +720,7 @@ setup_bats:
 	 *
 	 * bits 15-19 correspond to addresses 0x00000000 to 0x0001F000
 	 * incrementing by 0x1000 each time. The code below is sort of
-	 * based on code in "flush_tlbs" from arch/ppc/kernel/head.S
+	 * based on code in "flush_tlbs" from arch/powerpc/kernel/head.S
 	 *
 	 */
 	lis	r3, 0
diff --git a/arch/ppc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c
index 9d71b8b..9d71b8b 100644
--- a/arch/ppc/cpu/mpc83xx/traps.c
+++ b/arch/powerpc/cpu/mpc83xx/traps.c
diff --git a/arch/ppc/cpu/mpc83xx/u-boot.lds b/arch/powerpc/cpu/mpc83xx/u-boot.lds
index 157cef6..0b74a13 100644
--- a/arch/ppc/cpu/mpc83xx/u-boot.lds
+++ b/arch/powerpc/cpu/mpc83xx/u-boot.lds
@@ -50,7 +50,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    arch/ppc/cpu/mpc83xx/start.o	(.text)
+    arch/powerpc/cpu/mpc83xx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/arch/ppc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index f064fee..f064fee 100644
--- a/arch/ppc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
diff --git a/arch/ppc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c
index 594aace..f0fd1cb 100644
--- a/arch/ppc/cpu/mpc85xx/commproc.c
+++ b/arch/powerpc/cpu/mpc85xx/commproc.c
@@ -2,7 +2,7 @@
  * Adapted for Motorola MPC8560 chips
  * Xianghua Xiao <x.xiao@motorola.com>
  *
- * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's
+ * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
  * copyright notice:
  *
  * General Purpose functions for the global management of the
diff --git a/arch/ppc/cpu/mpc85xx/config.mk b/arch/powerpc/cpu/mpc85xx/config.mk
index ffb813d..f07d920 100644
--- a/arch/ppc/cpu/mpc85xx/config.mk
+++ b/arch/powerpc/cpu/mpc85xx/config.mk
@@ -32,4 +32,4 @@ PLATFORM_CPPFLAGS +=$(call cc-option,-mspe=yes)
 PLATFORM_CPPFLAGS +=$(call cc-option,-mno-spe)
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc85xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc85xx/u-boot.lds
diff --git a/arch/ppc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 0cc6e03..fddeb2f 100644
--- a/arch/ppc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004,2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004,2007-2010 Freescale Semiconductor, Inc.
  * (C) Copyright 2002, 2003 Motorola Inc.
  * Xianghua Xiao (X.Xiao@motorola.com)
  *
@@ -44,21 +44,19 @@ int checkcpu (void)
 	uint major, minor;
 	struct cpu_type *cpu;
 	char buf1[32], buf2[32];
-#ifdef CONFIG_DDR_CLK_FREQ
+#if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET)
 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-#ifdef CONFIG_FSL_CORENET
-	u32 ddr_sync = ((gur->rcwsr[5]) & FSL_CORENET_RCWSR5_DDR_SYNC)
-		>> FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT;
-#else
+#endif /* CONFIG_FSL_CORENET */
+#ifdef CONFIG_DDR_CLK_FREQ
 	u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
 		>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
-#endif
 #else
 #ifdef CONFIG_FSL_CORENET
-	u32 ddr_sync = 0;
+	u32 ddr_sync = ((gur->rcwsr[5]) & FSL_CORENET_RCWSR5_DDR_SYNC)
+		>> FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT;
 #else
 	u32 ddr_ratio = 0;
-#endif
+#endif /* CONFIG_FSL_CORENET */
 #endif /* CONFIG_DDR_CLK_FREQ */
 	int i;
 
diff --git a/arch/ppc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index e0126d3..e578b29 100644
--- a/arch/ppc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -180,54 +180,54 @@ void cpu_init_f (void)
 	 * has been determined
 	 */
 #if defined(CONFIG_SYS_OR0_REMAP)
-	memctl->or0 = CONFIG_SYS_OR0_REMAP;
+	out_be32(&memctl->or0, CONFIG_SYS_OR0_REMAP);
 #endif
 #if defined(CONFIG_SYS_OR1_REMAP)
-	memctl->or1 = CONFIG_SYS_OR1_REMAP;
+	out_be32(&memctl->or1, CONFIG_SYS_OR1_REMAP);
 #endif
 
 	/* now restrict to preliminary range */
 	/* if cs1 is already set via debugger, leave cs0/cs1 alone */
 	if (! memctl->br1 & 1) {
 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
-		memctl->br0 = CONFIG_SYS_BR0_PRELIM;
-		memctl->or0 = CONFIG_SYS_OR0_PRELIM;
+		out_be32(&memctl->br0, CONFIG_SYS_BR0_PRELIM);
+		out_be32(&memctl->or0, CONFIG_SYS_OR0_PRELIM);
 #endif
 
 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
-		memctl->or1 = CONFIG_SYS_OR1_PRELIM;
-		memctl->br1 = CONFIG_SYS_BR1_PRELIM;
+		out_be32(&memctl->or1, CONFIG_SYS_OR1_PRELIM);
+		out_be32(&memctl->br1, CONFIG_SYS_BR1_PRELIM);
 #endif
 	}
 
 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
-	memctl->or2 = CONFIG_SYS_OR2_PRELIM;
-	memctl->br2 = CONFIG_SYS_BR2_PRELIM;
+	out_be32(&memctl->or2, CONFIG_SYS_OR2_PRELIM);
+	out_be32(&memctl->br2, CONFIG_SYS_BR2_PRELIM);
 #endif
 
 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
-	memctl->or3 = CONFIG_SYS_OR3_PRELIM;
-	memctl->br3 = CONFIG_SYS_BR3_PRELIM;
+	out_be32(&memctl->or3, CONFIG_SYS_OR3_PRELIM);
+	out_be32(&memctl->br3, CONFIG_SYS_BR3_PRELIM);
 #endif
 
 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
-	memctl->or4 = CONFIG_SYS_OR4_PRELIM;
-	memctl->br4 = CONFIG_SYS_BR4_PRELIM;
+	out_be32(&memctl->or4, CONFIG_SYS_OR4_PRELIM);
+	out_be32(&memctl->br4, CONFIG_SYS_BR4_PRELIM);
 #endif
 
 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
-	memctl->or5 = CONFIG_SYS_OR5_PRELIM;
-	memctl->br5 = CONFIG_SYS_BR5_PRELIM;
+	out_be32(&memctl->or5, CONFIG_SYS_OR5_PRELIM);
+	out_be32(&memctl->br5, CONFIG_SYS_BR5_PRELIM);
 #endif
 
 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
-	memctl->or6 = CONFIG_SYS_OR6_PRELIM;
-	memctl->br6 = CONFIG_SYS_BR6_PRELIM;
+	out_be32(&memctl->or6, CONFIG_SYS_OR6_PRELIM);
+	out_be32(&memctl->br6, CONFIG_SYS_BR6_PRELIM);
 #endif
 
 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
-	memctl->or7 = CONFIG_SYS_OR7_PRELIM;
-	memctl->br7 = CONFIG_SYS_BR7_PRELIM;
+	out_be32(&memctl->or7, CONFIG_SYS_OR7_PRELIM);
+	out_be32(&memctl->br7, CONFIG_SYS_BR7_PRELIM);
 #endif
 
 #if defined(CONFIG_CPM2)
@@ -260,6 +260,10 @@ void cpu_init_f (void)
 
 int cpu_init_r(void)
 {
+#ifdef CONFIG_SYS_LBC_LCRR
+	volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+#endif
+
 	puts ("L2:    ");
 
 #if defined(CONFIG_L2_CACHE)
@@ -383,6 +387,17 @@ int cpu_init_r(void)
 #if defined(CONFIG_MP)
 	setup_mp();
 #endif
+
+#ifdef CONFIG_SYS_LBC_LCRR
+	/*
+	 * Modify the CLKDIV field of LCRR register to improve the writing
+	 * speed for NOR flash.
+	 */
+	clrsetbits_be32(&lbc->lcrr, LCRR_CLKDIV, CONFIG_SYS_LBC_LCRR);
+	__raw_readl(&lbc->lcrr);
+	isync();
+#endif
+
 	return 0;
 }
 
diff --git a/arch/ppc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 32aa94b..32aa94b 100644
--- a/arch/ppc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
diff --git a/arch/ppc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
index 184cca4..184cca4 100644
--- a/arch/ppc/cpu/mpc85xx/cpu_init_nand.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
diff --git a/arch/ppc/cpu/mpc85xx/ddr-gen1.c b/arch/powerpc/cpu/mpc85xx/ddr-gen1.c
index 54437dd..54437dd 100644
--- a/arch/ppc/cpu/mpc85xx/ddr-gen1.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen1.c
diff --git a/arch/ppc/cpu/mpc85xx/ddr-gen2.c b/arch/powerpc/cpu/mpc85xx/ddr-gen2.c
index 655f99c..655f99c 100644
--- a/arch/ppc/cpu/mpc85xx/ddr-gen2.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen2.c
diff --git a/arch/ppc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
index 0691ca4..0691ca4 100644
--- a/arch/ppc/cpu/mpc85xx/ddr-gen3.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
diff --git a/arch/ppc/cpu/mpc85xx/ether_fcc.c b/arch/powerpc/cpu/mpc85xx/ether_fcc.c
index 5f1414d..5f1414d 100644
--- a/arch/ppc/cpu/mpc85xx/ether_fcc.c
+++ b/arch/powerpc/cpu/mpc85xx/ether_fcc.c
diff --git a/arch/ppc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 1d11ab4..1d11ab4 100644
--- a/arch/ppc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
diff --git a/arch/ppc/cpu/mpc85xx/fixed_ivor.S b/arch/powerpc/cpu/mpc85xx/fixed_ivor.S
index 320cae3..320cae3 100644
--- a/arch/ppc/cpu/mpc85xx/fixed_ivor.S
+++ b/arch/powerpc/cpu/mpc85xx/fixed_ivor.S
diff --git a/arch/ppc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c
index 409367d..409367d 100644
--- a/arch/ppc/cpu/mpc85xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc85xx/interrupts.c
diff --git a/arch/ppc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 826bf32..826bf32 100644
--- a/arch/ppc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
diff --git a/arch/ppc/cpu/mpc85xx/mp.h b/arch/powerpc/cpu/mpc85xx/mp.h
index 3422cc1..3422cc1 100644
--- a/arch/ppc/cpu/mpc85xx/mp.h
+++ b/arch/powerpc/cpu/mpc85xx/mp.h
diff --git a/arch/ppc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
index cb6a6f0..cb6a6f0 100644
--- a/arch/ppc/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
diff --git a/arch/ppc/cpu/mpc85xx/pci.c b/arch/powerpc/cpu/mpc85xx/pci.c
index 75d2716..75d2716 100644
--- a/arch/ppc/cpu/mpc85xx/pci.c
+++ b/arch/powerpc/cpu/mpc85xx/pci.c
diff --git a/arch/ppc/cpu/mpc85xx/qe_io.c b/arch/powerpc/cpu/mpc85xx/qe_io.c
index 72a29b7..72a29b7 100644
--- a/arch/ppc/cpu/mpc85xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc85xx/qe_io.c
diff --git a/arch/ppc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S
index 0b5b9da..0b5b9da 100644
--- a/arch/ppc/cpu/mpc85xx/release.S
+++ b/arch/powerpc/cpu/mpc85xx/release.S
diff --git a/arch/ppc/cpu/mpc85xx/resetvec.S b/arch/powerpc/cpu/mpc85xx/resetvec.S
index 29555d4..29555d4 100644
--- a/arch/ppc/cpu/mpc85xx/resetvec.S
+++ b/arch/powerpc/cpu/mpc85xx/resetvec.S
diff --git a/arch/ppc/cpu/mpc85xx/serial_scc.c b/arch/powerpc/cpu/mpc85xx/serial_scc.c
index 2dab212..2dab212 100644
--- a/arch/ppc/cpu/mpc85xx/serial_scc.c
+++ b/arch/powerpc/cpu/mpc85xx/serial_scc.c
diff --git a/arch/ppc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 268edbc..8132115 100644
--- a/arch/ppc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007-2010 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2003 Motorola Inc.
  * Xianghua Xiao, (X.Xiao@motorola.com)
@@ -71,22 +71,30 @@ void get_sys_info (sys_info_t * sysInfo)
 		[14] = 4,	/* CC4 PPL / 4 */
 	};
 	uint lcrr_div, i, freqCC_PLL[4], rcw_tmp;
+	uint ratio[4];
 	unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
+	uint mem_pll_rat;
 
 	sysInfo->freqSystemBus = sysclk;
 	sysInfo->freqDDRBus = sysclk;
-	freqCC_PLL[0] = sysclk;
-	freqCC_PLL[1] = sysclk;
-	freqCC_PLL[2] = sysclk;
-	freqCC_PLL[3] = sysclk;
 
 	sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
-	sysInfo->freqDDRBus *= ((in_be32(&gur->rcwsr[0]) >> 17) & 0x1f);
-	freqCC_PLL[0] *= (in_be32(&clk->pllc1gsr) >> 1) & 0x3f;
-	freqCC_PLL[1] *= (in_be32(&clk->pllc2gsr) >> 1) & 0x3f;
-	freqCC_PLL[2] *= (in_be32(&clk->pllc3gsr) >> 1) & 0x3f;
-	freqCC_PLL[3] *= (in_be32(&clk->pllc4gsr) >> 1) & 0x3f;
+	mem_pll_rat = (in_be32(&gur->rcwsr[0]) >> 17) & 0x1f;
+	if (mem_pll_rat > 2)
+		sysInfo->freqDDRBus *= mem_pll_rat;
+	else
+		sysInfo->freqDDRBus = sysInfo->freqSystemBus * mem_pll_rat;
 
+	ratio[0] = (in_be32(&clk->pllc1gsr) >> 1) & 0x3f;
+	ratio[1] = (in_be32(&clk->pllc2gsr) >> 1) & 0x3f;
+	ratio[2] = (in_be32(&clk->pllc3gsr) >> 1) & 0x3f;
+	ratio[3] = (in_be32(&clk->pllc4gsr) >> 1) & 0x3f;
+	for (i = 0; i < 4; i++) {
+		if (ratio[i] > 4)
+			freqCC_PLL[i] = sysclk * ratio[i];
+		else
+			freqCC_PLL[i] = sysInfo->freqSystemBus * ratio[i];
+	}
 	rcw_tmp = in_be32(&gur->rcwsr[3]);
 	for (i = 0; i < cpu_numcores(); i++) {
 		u32 c_pll_sel = (in_be32(&clk->clkc0csr + i*8) >> 27) & 0xf;
diff --git a/arch/ppc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index b3cb56a..b3cb56a 100644
--- a/arch/ppc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
diff --git a/arch/ppc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index b3037ac..b3037ac 100644
--- a/arch/ppc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
diff --git a/arch/ppc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c
index 10108d8..7e96664 100644
--- a/arch/ppc/cpu/mpc85xx/traps.c
+++ b/arch/powerpc/cpu/mpc85xx/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright 2007 Freescale Semiconductor.
  * Copyright (C) 2003 Motorola
diff --git a/arch/ppc/cpu/mpc85xx/u-boot-nand.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds
index b9240f2..5fd3e6c 100644
--- a/arch/ppc/cpu/mpc85xx/u-boot-nand.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds
@@ -117,7 +117,7 @@ SECTIONS
 
   .bootpg ADDR(.text) - 0x1000 :
   {
-    arch/ppc/cpu/mpc85xx/start.o	(.bootpg)
+    arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
   } :text = 0xffff
 
   . = ADDR(.text) + 0x80000;
diff --git a/arch/ppc/cpu/mpc85xx/u-boot-nand_spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds
index fef3e42..7d9cee9 100644
--- a/arch/ppc/cpu/mpc85xx/u-boot-nand_spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds
@@ -29,7 +29,7 @@ SECTIONS
 	. = 0xfff00000;
 	.text : {
 		*(.text)
-  	}
+	}
 	_etext = .;
 
 	.reloc : {
diff --git a/arch/ppc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds
index 9698bf4..c88b1f3 100644
--- a/arch/ppc/cpu/mpc85xx/u-boot.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds
@@ -121,7 +121,7 @@ SECTIONS
 
   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
   {
-    arch/ppc/cpu/mpc85xx/start.o	(.bootpg)
+    arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
   } :text = 0xffff
 
   .resetvec RESET_VECTOR_ADDRESS :
diff --git a/arch/ppc/cpu/mpc86xx/Makefile b/arch/powerpc/cpu/mpc86xx/Makefile
index daca79a..daca79a 100644
--- a/arch/ppc/cpu/mpc86xx/Makefile
+++ b/arch/powerpc/cpu/mpc86xx/Makefile
diff --git a/arch/ppc/cpu/mpc86xx/cache.S b/arch/powerpc/cpu/mpc86xx/cache.S
index 0bb058b..0bb058b 100644
--- a/arch/ppc/cpu/mpc86xx/cache.S
+++ b/arch/powerpc/cpu/mpc86xx/cache.S
diff --git a/arch/ppc/cpu/mpc86xx/config.mk b/arch/powerpc/cpu/mpc86xx/config.mk
index ca2f837..ca2f837 100644
--- a/arch/ppc/cpu/mpc86xx/config.mk
+++ b/arch/powerpc/cpu/mpc86xx/config.mk
diff --git a/arch/ppc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index 1887575..1887575 100644
--- a/arch/ppc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
diff --git a/arch/ppc/cpu/mpc86xx/cpu_init.c b/arch/powerpc/cpu/mpc86xx/cpu_init.c
index b4f047d..b4f047d 100644
--- a/arch/ppc/cpu/mpc86xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu_init.c
diff --git a/arch/ppc/cpu/mpc86xx/ddr-8641.c b/arch/powerpc/cpu/mpc86xx/ddr-8641.c
index b8f2c93..b8f2c93 100644
--- a/arch/ppc/cpu/mpc86xx/ddr-8641.c
+++ b/arch/powerpc/cpu/mpc86xx/ddr-8641.c
diff --git a/arch/ppc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c
index 51f3f4c..51f3f4c 100644
--- a/arch/ppc/cpu/mpc86xx/fdt.c
+++ b/arch/powerpc/cpu/mpc86xx/fdt.c
diff --git a/arch/ppc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c
index c78fc72..c78fc72 100644
--- a/arch/ppc/cpu/mpc86xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc86xx/interrupts.c
diff --git a/arch/ppc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c
index b4a0faa..b4a0faa 100644
--- a/arch/ppc/cpu/mpc86xx/mp.c
+++ b/arch/powerpc/cpu/mpc86xx/mp.c
diff --git a/arch/ppc/cpu/mpc86xx/release.S b/arch/powerpc/cpu/mpc86xx/release.S
index 67a6f2b..67a6f2b 100644
--- a/arch/ppc/cpu/mpc86xx/release.S
+++ b/arch/powerpc/cpu/mpc86xx/release.S
diff --git a/arch/ppc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c
index 64a3479..64a3479 100644
--- a/arch/ppc/cpu/mpc86xx/speed.c
+++ b/arch/powerpc/cpu/mpc86xx/speed.c
diff --git a/arch/ppc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S
index ed1e4ca..ed1e4ca 100644
--- a/arch/ppc/cpu/mpc86xx/start.S
+++ b/arch/powerpc/cpu/mpc86xx/start.S
diff --git a/arch/ppc/cpu/mpc86xx/traps.c b/arch/powerpc/cpu/mpc86xx/traps.c
index 406403e..406403e 100644
--- a/arch/ppc/cpu/mpc86xx/traps.c
+++ b/arch/powerpc/cpu/mpc86xx/traps.c
diff --git a/arch/ppc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 5f70459..5f70459 100644
--- a/arch/ppc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
diff --git a/arch/ppc/cpu/mpc8xx/bedbug_860.c b/arch/powerpc/cpu/mpc8xx/bedbug_860.c
index 0308bbb..0308bbb 100644
--- a/arch/ppc/cpu/mpc8xx/bedbug_860.c
+++ b/arch/powerpc/cpu/mpc8xx/bedbug_860.c
diff --git a/arch/ppc/cpu/mpc8xx/commproc.c b/arch/powerpc/cpu/mpc8xx/commproc.c
index a87a0dc..a87a0dc 100644
--- a/arch/ppc/cpu/mpc8xx/commproc.c
+++ b/arch/powerpc/cpu/mpc8xx/commproc.c
diff --git a/arch/ppc/cpu/mpc8xx/config.mk b/arch/powerpc/cpu/mpc8xx/config.mk
index 5540d65..5540d65 100644
--- a/arch/ppc/cpu/mpc8xx/config.mk
+++ b/arch/powerpc/cpu/mpc8xx/config.mk
diff --git a/arch/ppc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 2eb848b..2eb848b 100644
--- a/arch/ppc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
diff --git a/arch/ppc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index eb0091b..eb0091b 100644
--- a/arch/ppc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
diff --git a/arch/ppc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index 7130983..7130983 100644
--- a/arch/ppc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
diff --git a/arch/ppc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index 89c1ff9..89c1ff9 100644
--- a/arch/ppc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
diff --git a/arch/ppc/cpu/mpc8xx/fec.h b/arch/powerpc/cpu/mpc8xx/fec.h
index a49417c..a49417c 100644
--- a/arch/ppc/cpu/mpc8xx/fec.h
+++ b/arch/powerpc/cpu/mpc8xx/fec.h
diff --git a/arch/ppc/cpu/mpc8xx/i2c.c b/arch/powerpc/cpu/mpc8xx/i2c.c
index 338caba..338caba 100644
--- a/arch/ppc/cpu/mpc8xx/i2c.c
+++ b/arch/powerpc/cpu/mpc8xx/i2c.c
diff --git a/arch/ppc/cpu/mpc8xx/interrupts.c b/arch/powerpc/cpu/mpc8xx/interrupts.c
index 5daa6b2..5daa6b2 100644
--- a/arch/ppc/cpu/mpc8xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc8xx/interrupts.c
diff --git a/arch/ppc/cpu/mpc8xx/kgdb.S b/arch/powerpc/cpu/mpc8xx/kgdb.S
index 2cc8fe6..2cc8fe6 100644
--- a/arch/ppc/cpu/mpc8xx/kgdb.S
+++ b/arch/powerpc/cpu/mpc8xx/kgdb.S
diff --git a/arch/ppc/cpu/mpc8xx/lcd.c b/arch/powerpc/cpu/mpc8xx/lcd.c
index 4b88b21..4b88b21 100644
--- a/arch/ppc/cpu/mpc8xx/lcd.c
+++ b/arch/powerpc/cpu/mpc8xx/lcd.c
diff --git a/arch/ppc/cpu/mpc8xx/plprcr_write.S b/arch/powerpc/cpu/mpc8xx/plprcr_write.S
index e325671..e325671 100644
--- a/arch/ppc/cpu/mpc8xx/plprcr_write.S
+++ b/arch/powerpc/cpu/mpc8xx/plprcr_write.S
diff --git a/arch/ppc/cpu/mpc8xx/scc.c b/arch/powerpc/cpu/mpc8xx/scc.c
index effb967..effb967 100644
--- a/arch/ppc/cpu/mpc8xx/scc.c
+++ b/arch/powerpc/cpu/mpc8xx/scc.c
diff --git a/arch/ppc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c
index 664db65..9514c66 100644
--- a/arch/ppc/cpu/mpc8xx/serial.c
+++ b/arch/powerpc/cpu/mpc8xx/serial.c
@@ -392,6 +392,7 @@ struct serial_device serial_smc_device =
 	"serial_smc",
 	"SMC",
 	smc_init,
+	NULL,
 	smc_setbrg,
 	smc_getc,
 	smc_tstc,
@@ -662,6 +663,7 @@ struct serial_device serial_scc_device =
 	"serial_scc",
 	"SCC",
 	scc_init,
+	NULL,
 	scc_setbrg,
 	scc_getc,
 	scc_tstc,
diff --git a/arch/ppc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index f309f29..f309f29 100644
--- a/arch/ppc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
diff --git a/arch/ppc/cpu/mpc8xx/spi.c b/arch/powerpc/cpu/mpc8xx/spi.c
index b2ac23e..b2ac23e 100644
--- a/arch/ppc/cpu/mpc8xx/spi.c
+++ b/arch/powerpc/cpu/mpc8xx/spi.c
diff --git a/arch/ppc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S
index 7cf602f..7cf602f 100644
--- a/arch/ppc/cpu/mpc8xx/start.S
+++ b/arch/powerpc/cpu/mpc8xx/start.S
diff --git a/arch/ppc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c
index 6efe8e0..343dced 100644
--- a/arch/ppc/cpu/mpc8xx/traps.c
+++ b/arch/powerpc/cpu/mpc8xx/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/mpc8xx/upatch.c b/arch/powerpc/cpu/mpc8xx/upatch.c
index a8cb735..a8cb735 100644
--- a/arch/ppc/cpu/mpc8xx/upatch.c
+++ b/arch/powerpc/cpu/mpc8xx/upatch.c
diff --git a/arch/ppc/cpu/mpc8xx/video.c b/arch/powerpc/cpu/mpc8xx/video.c
index c79c499..c79c499 100644
--- a/arch/ppc/cpu/mpc8xx/video.c
+++ b/arch/powerpc/cpu/mpc8xx/video.c
diff --git a/arch/ppc/cpu/mpc8xx/wlkbd.c b/arch/powerpc/cpu/mpc8xx/wlkbd.c
index 13009e2..13009e2 100644
--- a/arch/ppc/cpu/mpc8xx/wlkbd.c
+++ b/arch/powerpc/cpu/mpc8xx/wlkbd.c
diff --git a/arch/ppc/cpu/mpc8xxx/Makefile b/arch/powerpc/cpu/mpc8xxx/Makefile
index 481f9e5..481f9e5 100644
--- a/arch/ppc/cpu/mpc8xxx/Makefile
+++ b/arch/powerpc/cpu/mpc8xxx/Makefile
diff --git a/arch/ppc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index fef062b..22f3423 100644
--- a/arch/ppc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -1,8 +1,8 @@
 /*
  * Copyright 2009-2010 Freescale Semiconductor, Inc.
  *
- * This file is derived from arch/ppc/cpu/mpc85xx/cpu.c and
- * arch/ppc/cpu/mpc86xx/cpu.c. Basically this file contains
+ * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
+ * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
  * cpu specific common code for 85xx/86xx processors.
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/Makefile b/arch/powerpc/cpu/mpc8xxx/ddr/Makefile
index cb7f856..cb7f856 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/Makefile
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/Makefile
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/common_timing_params.h b/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h
index 5aea517..5aea517 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/common_timing_params.h
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index 03f9c43..4a282bc 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -198,6 +198,8 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr)
 	pre_pd_exit_mclk = act_pd_exit_mclk;
 	taxpd_mclk = 8;
 	tmrd_mclk = 4;
+	/* set the turnaround time */
+	trwt_mclk = 1;
 #else /* CONFIG_FSL_DDR2 */
 	/*
 	 * (tXARD and tXARDS). Empirical?
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr.h b/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
index f122075..f122075 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/ddr.h
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
index 9184764..9184764 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
index d9d0fa7..d9d0fa7 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
index d4199ba..d4199ba 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index e888e3e..e888e3e 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index faa1af9..faa1af9 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/options.c b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
index 46731c8..46731c8 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/options.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
diff --git a/arch/ppc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
index 1e2d921..1e2d921 100644
--- a/arch/ppc/cpu/mpc8xxx/ddr/util.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
diff --git a/arch/ppc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index e68d6f3..ccefaf5 100644
--- a/arch/ppc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -1,8 +1,8 @@
 /*
  * Copyright 2009 Freescale Semiconductor, Inc.
  *
- * This file is derived from arch/ppc/cpu/mpc85xx/cpu.c and
- * arch/ppc/cpu/mpc86xx/cpu.c. Basically this file contains
+ * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
+ * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
  * cpu specific common code for 85xx/86xx processors.
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/arch/ppc/cpu/mpc8xxx/pci_cfg.c b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
index 9b7181d..85995ca 100644
--- a/arch/ppc/cpu/mpc8xxx/pci_cfg.c
+++ b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
@@ -176,15 +176,14 @@ static struct pci_info pci_config_info[] =
 			 (1 << 0x1d) | (1 << 0x1e) | (1 << 0x1f),
 	},
 	[LAW_TRGT_IF_PCIE_2] = {
-		.cfg =   (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) |
-			 (1 << 9) | (1 << 0xa) | (1 << 0xb) | (1 << 0xd) |
-			 (1 << 0x15) | (1 << 0x16) | (1 << 0x17) |
-			 (1 << 0x18) | (1 << 0x1c),
+		.cfg =   (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
+			 (1 << 0xd) | (1 << 0x15) | (1 << 0x16) | (1 << 0x17) |
+			 (1 << 0x18) | (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b),
 	},
 	[LAW_TRGT_IF_PCIE_3] = {
-		.cfg =   (1 << 6) | (1 << 7) | (1 << 9) | (1 << 0xd) |
-			 (1 << 0x15) | (1 << 0x16) | (1 << 0x17) | (1 << 0x18) |
-			 (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b),
+		.cfg =   (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
+			 (1 << 0xa) | (1 << 0xb) | (1 << 0xd) | (1 << 0x15) |
+			 (1 << 0x16) | (1 << 0x17) | (1 << 0x18) | (1 << 0x1c),
 	},
 };
 #elif defined(CONFIG_P2010) || defined(CONFIG_P2020)
diff --git a/arch/ppc/cpu/ppc4xx/40x_spd_sdram.c b/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c
index 595d568..f65cd88 100644
--- a/arch/ppc/cpu/ppc4xx/40x_spd_sdram.c
+++ b/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c
@@ -1,5 +1,5 @@
 /*
- * arch/ppc/cpu/ppc4xx/40x_spd_sdram.c
+ * arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c
  * This SPD SDRAM detection code supports IBM/AMCC PPC44x cpu with a
  * SDRAM controller. Those are all current 405 PPC's.
  *
diff --git a/arch/ppc/cpu/ppc4xx/44x_spd_ddr.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
index 9d1994f..005315b 100644
--- a/arch/ppc/cpu/ppc4xx/44x_spd_ddr.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
@@ -1,5 +1,5 @@
 /*
- * arch/ppc/cpu/ppc4xx/44x_spd_ddr.c
+ * arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
  * This SPD DDR detection code supports IBM/AMCC PPC44x cpu with a
  * DDR controller. Those are 440GP/GX/EP/GR.
  *
diff --git a/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
index ea6c2ac..faddee9 100644
--- a/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
@@ -1,5 +1,5 @@
 /*
- * arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c
+ * arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
  * This SPD SDRAM detection code supports AMCC PPC44x cpu's with a
  * DDR2 controller (non Denali Core). Those currently are:
  *
diff --git a/arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
index 7263071..aed0ed7 100644
--- a/arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
@@ -1,5 +1,5 @@
 /*
- * arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+ * arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
  * This SPD SDRAM detection code supports AMCC PPC44x cpu's with a
  * DDR2 controller (non Denali Core). Those currently are:
  *
diff --git a/arch/ppc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
index eed4534..eed4534 100644
--- a/arch/ppc/cpu/ppc4xx/4xx_pci.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
diff --git a/arch/ppc/cpu/ppc4xx/4xx_pcie.c b/arch/powerpc/cpu/ppc4xx/4xx_pcie.c
index 10b58b7..10b58b7 100644
--- a/arch/ppc/cpu/ppc4xx/4xx_pcie.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_pcie.c
diff --git a/arch/ppc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index 8de6542..e6ab570 100644
--- a/arch/ppc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -822,6 +822,7 @@ struct serial_device serial0_device =
 	"serial0",
 	"UART0",
 	serial0_init,
+	NULL,
 	serial0_setbrg,
 	serial0_getc,
 	serial0_tstc,
@@ -834,6 +835,7 @@ struct serial_device serial1_device =
 	"serial1",
 	"UART1",
 	serial1_init,
+	NULL,
 	serial1_setbrg,
 	serial1_getc,
 	serial1_tstc,
diff --git a/arch/ppc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile
index 88d53fb..88d53fb 100644
--- a/arch/ppc/cpu/ppc4xx/Makefile
+++ b/arch/powerpc/cpu/ppc4xx/Makefile
diff --git a/arch/ppc/cpu/ppc4xx/bedbug_405.c b/arch/powerpc/cpu/ppc4xx/bedbug_405.c
index ef11cb6..ef11cb6 100644
--- a/arch/ppc/cpu/ppc4xx/bedbug_405.c
+++ b/arch/powerpc/cpu/ppc4xx/bedbug_405.c
diff --git a/arch/ppc/cpu/ppc4xx/cache.S b/arch/powerpc/cpu/ppc4xx/cache.S
index 269716f..269716f 100644
--- a/arch/ppc/cpu/ppc4xx/cache.S
+++ b/arch/powerpc/cpu/ppc4xx/cache.S
diff --git a/arch/ppc/cpu/ppc4xx/cmd_chip_config.c b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c
index ba57211..ba57211 100644
--- a/arch/ppc/cpu/ppc4xx/cmd_chip_config.c
+++ b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c
diff --git a/arch/ppc/cpu/ppc4xx/commproc.c b/arch/powerpc/cpu/ppc4xx/commproc.c
index a1696d3..a1696d3 100644
--- a/arch/ppc/cpu/ppc4xx/commproc.c
+++ b/arch/powerpc/cpu/ppc4xx/commproc.c
diff --git a/arch/ppc/cpu/ppc4xx/config.mk b/arch/powerpc/cpu/ppc4xx/config.mk
index ea4d707..5bda710 100644
--- a/arch/ppc/cpu/ppc4xx/config.mk
+++ b/arch/powerpc/cpu/ppc4xx/config.mk
@@ -34,4 +34,4 @@ PLATFORM_CPPFLAGS += -Wa,-m405 -mcpu=405
 endif
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/ppc4xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/ppc4xx/u-boot.lds
diff --git a/arch/ppc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index e1a023b..e1a023b 100644
--- a/arch/ppc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
diff --git a/arch/ppc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index 8a6e545..8a6e545 100644
--- a/arch/ppc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
diff --git a/arch/ppc/cpu/ppc4xx/dcr.S b/arch/powerpc/cpu/ppc4xx/dcr.S
index 93465a3..93465a3 100644
--- a/arch/ppc/cpu/ppc4xx/dcr.S
+++ b/arch/powerpc/cpu/ppc4xx/dcr.S
diff --git a/arch/ppc/cpu/ppc4xx/denali_data_eye.c b/arch/powerpc/cpu/ppc4xx/denali_data_eye.c
index 15a9b4f..03b8d3c 100644
--- a/arch/ppc/cpu/ppc4xx/denali_data_eye.c
+++ b/arch/powerpc/cpu/ppc4xx/denali_data_eye.c
@@ -1,5 +1,5 @@
 /*
- * arch/ppc/cpu/ppc4xx/denali_data_eye.c
+ * arch/powerpc/cpu/ppc4xx/denali_data_eye.c
  * Extracted from board/amcc/sequoia/sdram.c by Larry Johnson <lrj@acm.org>.
  *
  * (C) Copyright 2006
diff --git a/arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
index 72f76cd..080ea0a 100644
--- a/arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
@@ -1,12 +1,12 @@
 /*
- * arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c
+ * arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
  * This SPD SDRAM detection code supports AMCC PPC44x CPUs with a Denali-core
  * DDR2 controller, specifically the 440EPx/GRx.
  *
  * (C) Copyright 2007-2008
  * Larry Johnson, lrj@acm.org.
  *
- * Based primarily on arch/ppc/cpu/ppc4xx/4xx_spd_ddr2.c, which is...
+ * Based primarily on arch/powerpc/cpu/ppc4xx/4xx_spd_ddr2.c, which is...
  *
  * (C) Copyright 2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
diff --git a/arch/ppc/cpu/ppc4xx/ecc.c b/arch/powerpc/cpu/ppc4xx/ecc.c
index f105605..f105605 100644
--- a/arch/ppc/cpu/ppc4xx/ecc.c
+++ b/arch/powerpc/cpu/ppc4xx/ecc.c
diff --git a/arch/ppc/cpu/ppc4xx/ecc.h b/arch/powerpc/cpu/ppc4xx/ecc.h
index b258891..b258891 100644
--- a/arch/ppc/cpu/ppc4xx/ecc.h
+++ b/arch/powerpc/cpu/ppc4xx/ecc.h
diff --git a/arch/ppc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c
index 15a184b..15a184b 100644
--- a/arch/ppc/cpu/ppc4xx/fdt.c
+++ b/arch/powerpc/cpu/ppc4xx/fdt.c
diff --git a/arch/ppc/cpu/ppc4xx/gpio.c b/arch/powerpc/cpu/ppc4xx/gpio.c
index c0d351a..c0d351a 100644
--- a/arch/ppc/cpu/ppc4xx/gpio.c
+++ b/arch/powerpc/cpu/ppc4xx/gpio.c
diff --git a/arch/ppc/cpu/ppc4xx/interrupts.c b/arch/powerpc/cpu/ppc4xx/interrupts.c
index 6db8421..6db8421 100644
--- a/arch/ppc/cpu/ppc4xx/interrupts.c
+++ b/arch/powerpc/cpu/ppc4xx/interrupts.c
diff --git a/arch/ppc/cpu/ppc4xx/iop480_uart.c b/arch/powerpc/cpu/ppc4xx/iop480_uart.c
index 0e3423f..0e3423f 100644
--- a/arch/ppc/cpu/ppc4xx/iop480_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/iop480_uart.c
diff --git a/arch/ppc/cpu/ppc4xx/kgdb.S b/arch/powerpc/cpu/ppc4xx/kgdb.S
index 4227a4c..4227a4c 100644
--- a/arch/ppc/cpu/ppc4xx/kgdb.S
+++ b/arch/powerpc/cpu/ppc4xx/kgdb.S
diff --git a/arch/ppc/cpu/ppc4xx/miiphy.c b/arch/powerpc/cpu/ppc4xx/miiphy.c
index 22ed5c2..22ed5c2 100644
--- a/arch/ppc/cpu/ppc4xx/miiphy.c
+++ b/arch/powerpc/cpu/ppc4xx/miiphy.c
diff --git a/arch/ppc/cpu/ppc4xx/reginfo.c b/arch/powerpc/cpu/ppc4xx/reginfo.c
index a975667..a975667 100644
--- a/arch/ppc/cpu/ppc4xx/reginfo.c
+++ b/arch/powerpc/cpu/ppc4xx/reginfo.c
diff --git a/arch/ppc/cpu/ppc4xx/resetvec.S b/arch/powerpc/cpu/ppc4xx/resetvec.S
index b3308bd..b3308bd 100644
--- a/arch/ppc/cpu/ppc4xx/resetvec.S
+++ b/arch/powerpc/cpu/ppc4xx/resetvec.S
diff --git a/arch/ppc/cpu/ppc4xx/sdram.c b/arch/powerpc/cpu/ppc4xx/sdram.c
index 30c6e0e..30c6e0e 100644
--- a/arch/ppc/cpu/ppc4xx/sdram.c
+++ b/arch/powerpc/cpu/ppc4xx/sdram.c
diff --git a/arch/ppc/cpu/ppc4xx/sdram.h b/arch/powerpc/cpu/ppc4xx/sdram.h
index bea3376..bea3376 100644
--- a/arch/ppc/cpu/ppc4xx/sdram.h
+++ b/arch/powerpc/cpu/ppc4xx/sdram.h
diff --git a/arch/ppc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..906face 100644
--- a/arch/ppc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
diff --git a/arch/ppc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index c739deb..c739deb 100644
--- a/arch/ppc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
diff --git a/arch/ppc/cpu/ppc4xx/tlb.c b/arch/powerpc/cpu/ppc4xx/tlb.c
index 24a9a9c..24a9a9c 100644
--- a/arch/ppc/cpu/ppc4xx/tlb.c
+++ b/arch/powerpc/cpu/ppc4xx/tlb.c
diff --git a/arch/ppc/cpu/ppc4xx/traps.c b/arch/powerpc/cpu/ppc4xx/traps.c
index 42e4221..1616772 100644
--- a/arch/ppc/cpu/ppc4xx/traps.c
+++ b/arch/powerpc/cpu/ppc4xx/traps.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/ppc/kernel/traps.c
+ * linux/arch/powerpc/kernel/traps.c
  *
  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
  *
diff --git a/arch/ppc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds
index 3704d8a..eca1f9d 100644
--- a/arch/ppc/cpu/ppc4xx/u-boot.lds
+++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds
@@ -124,7 +124,7 @@ SECTIONS
 #ifdef CONFIG_440
   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
   {
-    arch/ppc/cpu/ppc4xx/start.o	(.bootpg)
+    arch/powerpc/cpu/ppc4xx/start.o	(.bootpg)
 
     /*
      * PPC440 board need a board specific object with the
diff --git a/arch/ppc/cpu/ppc4xx/uic.c b/arch/powerpc/cpu/ppc4xx/uic.c
index 8b1b259..8b1b259 100644
--- a/arch/ppc/cpu/ppc4xx/uic.c
+++ b/arch/powerpc/cpu/ppc4xx/uic.c
diff --git a/arch/ppc/cpu/ppc4xx/usb.c b/arch/powerpc/cpu/ppc4xx/usb.c
index 592efe7..592efe7 100644
--- a/arch/ppc/cpu/ppc4xx/usb.c
+++ b/arch/powerpc/cpu/ppc4xx/usb.c
diff --git a/arch/ppc/cpu/ppc4xx/usb_ohci.c b/arch/powerpc/cpu/ppc4xx/usb_ohci.c
index a9edacd..a9edacd 100644
--- a/arch/ppc/cpu/ppc4xx/usb_ohci.c
+++ b/arch/powerpc/cpu/ppc4xx/usb_ohci.c
diff --git a/arch/ppc/cpu/ppc4xx/usb_ohci.h b/arch/powerpc/cpu/ppc4xx/usb_ohci.h
index 2c3dc4f..2c3dc4f 100644
--- a/arch/ppc/cpu/ppc4xx/usb_ohci.h
+++ b/arch/powerpc/cpu/ppc4xx/usb_ohci.h
diff --git a/arch/ppc/cpu/ppc4xx/usbdev.c b/arch/powerpc/cpu/ppc4xx/usbdev.c
index fe398af..fe398af 100644
--- a/arch/ppc/cpu/ppc4xx/usbdev.c
+++ b/arch/powerpc/cpu/ppc4xx/usbdev.c
diff --git a/arch/ppc/cpu/ppc4xx/usbdev.h b/arch/powerpc/cpu/ppc4xx/usbdev.h
index ef6a2da..ef6a2da 100644
--- a/arch/ppc/cpu/ppc4xx/usbdev.h
+++ b/arch/powerpc/cpu/ppc4xx/usbdev.h
diff --git a/arch/ppc/cpu/ppc4xx/xilinx_irq.c b/arch/powerpc/cpu/ppc4xx/xilinx_irq.c
index 7108777..7108777 100644
--- a/arch/ppc/cpu/ppc4xx/xilinx_irq.c
+++ b/arch/powerpc/cpu/ppc4xx/xilinx_irq.c
diff --git a/arch/ppc/include/asm/4xx_pci.h b/arch/powerpc/include/asm/4xx_pci.h
index f686e7c..f686e7c 100644
--- a/arch/ppc/include/asm/4xx_pci.h
+++ b/arch/powerpc/include/asm/4xx_pci.h
diff --git a/arch/ppc/include/asm/4xx_pcie.h b/arch/powerpc/include/asm/4xx_pcie.h
index a0e88de..a0e88de 100644
--- a/arch/ppc/include/asm/4xx_pcie.h
+++ b/arch/powerpc/include/asm/4xx_pcie.h
diff --git a/arch/ppc/include/asm/5xx_immap.h b/arch/powerpc/include/asm/5xx_immap.h
index 72cbab4..72cbab4 100644
--- a/arch/ppc/include/asm/5xx_immap.h
+++ b/arch/powerpc/include/asm/5xx_immap.h
diff --git a/arch/ppc/include/asm/8xx_immap.h b/arch/powerpc/include/asm/8xx_immap.h
index 40679cb..40679cb 100644
--- a/arch/ppc/include/asm/8xx_immap.h
+++ b/arch/powerpc/include/asm/8xx_immap.h
diff --git a/arch/ppc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 23f22df..23f22df 100644
--- a/arch/ppc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
diff --git a/arch/ppc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index adaf091..adaf091 100644
--- a/arch/ppc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
diff --git a/arch/ppc/include/asm/byteorder.h b/arch/powerpc/include/asm/byteorder.h
index 3f5bcf6..3f5bcf6 100644
--- a/arch/ppc/include/asm/byteorder.h
+++ b/arch/powerpc/include/asm/byteorder.h
diff --git a/arch/ppc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 53e8d05..53e8d05 100644
--- a/arch/ppc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
diff --git a/arch/ppc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index fc3facb..fc3facb 100644
--- a/arch/ppc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
diff --git a/arch/ppc/include/asm/cpm_8260.h b/arch/powerpc/include/asm/cpm_8260.h
index 8302404..8302404 100644
--- a/arch/ppc/include/asm/cpm_8260.h
+++ b/arch/powerpc/include/asm/cpm_8260.h
diff --git a/arch/ppc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h
index a74a3a1..a74a3a1 100644
--- a/arch/ppc/include/asm/cpm_85xx.h
+++ b/arch/powerpc/include/asm/cpm_85xx.h
diff --git a/arch/ppc/include/asm/e300.h b/arch/powerpc/include/asm/e300.h
index bfef4df..bfef4df 100644
--- a/arch/ppc/include/asm/e300.h
+++ b/arch/powerpc/include/asm/e300.h
diff --git a/arch/ppc/include/asm/errno.h b/arch/powerpc/include/asm/errno.h
index 4c82b50..4c82b50 100644
--- a/arch/ppc/include/asm/errno.h
+++ b/arch/powerpc/include/asm/errno.h
diff --git a/arch/ppc/include/asm/fsl_ddr_dimm_params.h b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
index 55923e0..55923e0 100644
--- a/arch/ppc/include/asm/fsl_ddr_dimm_params.h
+++ b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
diff --git a/arch/ppc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h
index 3216a50..02920db 100644
--- a/arch/ppc/include/asm/fsl_ddr_sdram.h
+++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -24,6 +24,12 @@
 #define DDR_OTF		6	/* on-the-fly BC4 and BL8 */
 #define DDR_BL8		8	/* burst length 8 */
 
+#define DDR3_RTT_60_OHM		1 /* RTT_Nom = RZQ/4 */
+#define DDR3_RTT_120_OHM	2 /* RTT_Nom = RZQ/2 */
+#define DDR3_RTT_40_OHM		3 /* RTT_Nom = RZQ/6 */
+#define DDR3_RTT_20_OHM		4 /* RTT_Nom = RZQ/12 */
+#define DDR3_RTT_30_OHM		5 /* RTT_Nom = RZQ/8 */
+
 #if defined(CONFIG_FSL_DDR1)
 #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	(1)
 typedef ddr1_spd_eeprom_t generic_spd_eeprom_t;
diff --git a/arch/ppc/include/asm/fsl_dma.h b/arch/powerpc/include/asm/fsl_dma.h
index 1164191..1164191 100644
--- a/arch/ppc/include/asm/fsl_dma.h
+++ b/arch/powerpc/include/asm/fsl_dma.h
diff --git a/arch/ppc/include/asm/fsl_i2c.h b/arch/powerpc/include/asm/fsl_i2c.h
index 4f71341..4f71341 100644
--- a/arch/ppc/include/asm/fsl_i2c.h
+++ b/arch/powerpc/include/asm/fsl_i2c.h
diff --git a/arch/ppc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index 34c56a2..34c56a2 100644
--- a/arch/ppc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
diff --git a/arch/ppc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 5723de6..dfe8f79 100644
--- a/arch/ppc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2008,2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -125,8 +125,12 @@
 #define OR_GPCM_SETA_SHIFT		3
 #define OR_GPCM_TRLX			0x00000004
 #define OR_GPCM_TRLX_SHIFT		2
+#define OR_GPCM_TRLX_CLEAR		0x00000000
+#define OR_GPCM_TRLX_SET		0x00000004
 #define OR_GPCM_EHTR			0x00000002
 #define OR_GPCM_EHTR_SHIFT		1
+#define OR_GPCM_EHTR_CLEAR		0x00000000
+#define OR_GPCM_EHTR_SET		0x00000002
 #define OR_GPCM_EAD			0x00000001
 #define OR_GPCM_EAD_SHIFT		0
 
diff --git a/arch/microblaze/lib/cache.c b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
index 4b2e8e3..2d813f4 100644
--- a/arch/microblaze/lib/cache.c
+++ b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
@@ -1,10 +1,5 @@
 /*
- * (C) Copyright 2004 Atmark Techno, Inc.
- *
- * Yasushi SHOJI <yashi@atmark-techno.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
+ * Copyright 2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -22,22 +17,20 @@
  * MA 02111-1307 USA
  */
 
-#include <common.h>
+#ifndef __FSL_MPC83XX_SERDES_H
+#define __FSL_MPC83XX_SERDES_H
+
+#include <config.h>
+
+#define FSL_SERDES_CLK_100		(0 << 28)
+#define FSL_SERDES_CLK_125		(1 << 28)
+#define FSL_SERDES_CLK_150		(3 << 28)
+#define FSL_SERDES_PROTO_SATA		0
+#define FSL_SERDES_PROTO_PEX		1
+#define FSL_SERDES_PROTO_PEX_X2		2
+#define FSL_SERDES_PROTO_SGMII		3
+#define FSL_SERDES_VDD_1V		1
+
+extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
 
-void flush_cache (ulong addr, ulong size)
-{
-	int i;
-	for (i = 0; i < size; i += 4)
-		asm volatile (
-#ifdef CONFIG_ICACHE
-				"wic	%0, r0;"
-#endif
-				"nop;"
-#ifdef CONFIG_DCACHE
-				"wdc	%0, r0;"
-#endif
-				"nop;"
-				:
-				: "r" (addr + i)
-				: "memory");
-}
+#endif /* __FSL_MPC83XX_SERDES_H */
diff --git a/arch/ppc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h
index db61e7e..db61e7e 100644
--- a/arch/ppc/include/asm/fsl_pci.h
+++ b/arch/powerpc/include/asm/fsl_pci.h
diff --git a/arch/ppc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index 6da4b6f..6da4b6f 100644
--- a/arch/ppc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
diff --git a/arch/ppc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index d3dd44e..d3dd44e 100644
--- a/arch/ppc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
diff --git a/arch/ppc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h
index 23e29b1..23e29b1 100644
--- a/arch/ppc/include/asm/gpio.h
+++ b/arch/powerpc/include/asm/gpio.h
diff --git a/arch/ppc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h
index 95350fd..7f9db8b 100644
--- a/arch/ppc/include/asm/immap_512x.h
+++ b/arch/powerpc/include/asm/immap_512x.h
@@ -356,6 +356,11 @@ typedef struct ddr512x_config {
 	u32 ddr_time_config2;	/* Timing Configuration Register */
 } ddr512x_config_t;
 
+typedef struct sdram_conf_s {
+	unsigned long size;
+	ddr512x_config_t cfg;
+} sdram_conf_t;
+
 /*
  * DMA/Messaging Unit
  */
@@ -848,10 +853,6 @@ typedef struct ioctrl512x {
 	u8	reserved[0x0cfc];		/* fill to 4096 bytes size */
 } ioctrl512x_t;
 
-/* Indexes in regs array */
-/* Set for DDR */
-#define IOCTRL_MUX_DDR		0x00000036
-
 /* IO pin fields */
 #define IO_PIN_FMUX(v)	((v) << 7)	/* pin function */
 #define IO_PIN_HOLD(v)	((v) << 5)	/* hold time, pci only */
@@ -1116,66 +1117,68 @@ typedef struct fifoc512x {
  *
  * Overall size of FIFOC memory is not documented in the MPC5121e RM, but
  * tests indicate that it is 1024 words total.
+ *
+ * *_TX_SIZE and *_RX_SIZE is the number of 4-byte words for FIFO slice.
  */
-#define FIFOC_PSC0_TX_SIZE	0x0	/* number of 4-byte words for FIFO slice */
+#define FIFOC_PSC0_TX_SIZE	0x04
 #define FIFOC_PSC0_TX_ADDR	0x0
-#define FIFOC_PSC0_RX_SIZE	0x0
-#define FIFOC_PSC0_RX_ADDR	0x0
+#define FIFOC_PSC0_RX_SIZE	0x04
+#define FIFOC_PSC0_RX_ADDR	0x10
 
-#define FIFOC_PSC1_TX_SIZE	0x0
-#define FIFOC_PSC1_TX_ADDR	0x0
-#define FIFOC_PSC1_RX_SIZE	0x0
-#define FIFOC_PSC1_RX_ADDR	0x0
+#define FIFOC_PSC1_TX_SIZE	0x04
+#define FIFOC_PSC1_TX_ADDR	0x20
+#define FIFOC_PSC1_RX_SIZE	0x04
+#define FIFOC_PSC1_RX_ADDR	0x30
 
-#define FIFOC_PSC2_TX_SIZE	0x0
-#define FIFOC_PSC2_TX_ADDR	0x0
-#define FIFOC_PSC2_RX_SIZE	0x0
-#define FIFOC_PSC2_RX_ADDR	0x0
+#define FIFOC_PSC2_TX_SIZE	0x04
+#define FIFOC_PSC2_TX_ADDR	0x40
+#define FIFOC_PSC2_RX_SIZE	0x04
+#define FIFOC_PSC2_RX_ADDR	0x50
 
 #define FIFOC_PSC3_TX_SIZE	0x04
-#define FIFOC_PSC3_TX_ADDR	0x0
+#define FIFOC_PSC3_TX_ADDR	0x60
 #define FIFOC_PSC3_RX_SIZE	0x04
-#define FIFOC_PSC3_RX_ADDR	0x10
-
-#define FIFOC_PSC4_TX_SIZE	0x0
-#define FIFOC_PSC4_TX_ADDR	0x0
-#define FIFOC_PSC4_RX_SIZE	0x0
-#define FIFOC_PSC4_RX_ADDR	0x0
-
-#define FIFOC_PSC5_TX_SIZE	0x0
-#define FIFOC_PSC5_TX_ADDR	0x0
-#define FIFOC_PSC5_RX_SIZE	0x0
-#define FIFOC_PSC5_RX_ADDR	0x0
-
-#define FIFOC_PSC6_TX_SIZE	0x0
-#define FIFOC_PSC6_TX_ADDR	0x0
-#define FIFOC_PSC6_RX_SIZE	0x0
-#define FIFOC_PSC6_RX_ADDR	0x0
-
-#define FIFOC_PSC7_TX_SIZE	0x0
-#define FIFOC_PSC7_TX_ADDR	0x0
-#define FIFOC_PSC7_RX_SIZE	0x0
-#define FIFOC_PSC7_RX_ADDR	0x0
-
-#define FIFOC_PSC8_TX_SIZE	0x0
-#define FIFOC_PSC8_TX_ADDR	0x0
-#define FIFOC_PSC8_RX_SIZE	0x0
-#define FIFOC_PSC8_RX_ADDR	0x0
-
-#define FIFOC_PSC9_TX_SIZE	0x0
-#define FIFOC_PSC9_TX_ADDR	0x0
-#define FIFOC_PSC9_RX_SIZE	0x0
-#define FIFOC_PSC9_RX_ADDR	0x0
-
-#define FIFOC_PSC10_TX_SIZE	0x0
-#define FIFOC_PSC10_TX_ADDR	0x0
-#define FIFOC_PSC10_RX_SIZE	0x0
-#define FIFOC_PSC10_RX_ADDR	0x0
-
-#define FIFOC_PSC11_TX_SIZE	0x0
-#define FIFOC_PSC11_TX_ADDR	0x0
-#define FIFOC_PSC11_RX_SIZE	0x0
-#define FIFOC_PSC11_RX_ADDR	0x0
+#define FIFOC_PSC3_RX_ADDR	0x70
+
+#define FIFOC_PSC4_TX_SIZE	0x04
+#define FIFOC_PSC4_TX_ADDR	0x80
+#define FIFOC_PSC4_RX_SIZE	0x04
+#define FIFOC_PSC4_RX_ADDR	0x90
+
+#define FIFOC_PSC5_TX_SIZE	0x04
+#define FIFOC_PSC5_TX_ADDR	0xa0
+#define FIFOC_PSC5_RX_SIZE	0x04
+#define FIFOC_PSC5_RX_ADDR	0xb0
+
+#define FIFOC_PSC6_TX_SIZE	0x04
+#define FIFOC_PSC6_TX_ADDR	0xc0
+#define FIFOC_PSC6_RX_SIZE	0x04
+#define FIFOC_PSC6_RX_ADDR	0xd0
+
+#define FIFOC_PSC7_TX_SIZE	0x04
+#define FIFOC_PSC7_TX_ADDR	0xe0
+#define FIFOC_PSC7_RX_SIZE	0x04
+#define FIFOC_PSC7_RX_ADDR	0xf0
+
+#define FIFOC_PSC8_TX_SIZE	0x04
+#define FIFOC_PSC8_TX_ADDR	0x100
+#define FIFOC_PSC8_RX_SIZE	0x04
+#define FIFOC_PSC8_RX_ADDR	0x110
+
+#define FIFOC_PSC9_TX_SIZE	0x04
+#define FIFOC_PSC9_TX_ADDR	0x120
+#define FIFOC_PSC9_RX_SIZE	0x04
+#define FIFOC_PSC9_RX_ADDR	0x130
+
+#define FIFOC_PSC10_TX_SIZE	0x04
+#define FIFOC_PSC10_TX_ADDR	0x140
+#define FIFOC_PSC10_RX_SIZE	0x04
+#define FIFOC_PSC10_RX_ADDR	0x150
+
+#define FIFOC_PSC11_TX_SIZE	0x04
+#define FIFOC_PSC11_TX_ADDR	0x160
+#define FIFOC_PSC11_RX_SIZE	0x04
+#define FIFOC_PSC11_RX_ADDR	0x170
 
 /*
  * SATA
diff --git a/arch/ppc/include/asm/immap_8220.h b/arch/powerpc/include/asm/immap_8220.h
index f9595f4..f9595f4 100644
--- a/arch/ppc/include/asm/immap_8220.h
+++ b/arch/powerpc/include/asm/immap_8220.h
diff --git a/arch/ppc/include/asm/immap_8260.h b/arch/powerpc/include/asm/immap_8260.h
index 4974ae5..4974ae5 100644
--- a/arch/ppc/include/asm/immap_8260.h
+++ b/arch/powerpc/include/asm/immap_8260.h
diff --git a/arch/ppc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
index 6b42a73..6b42a73 100644
--- a/arch/ppc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
diff --git a/arch/ppc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 957ad76..e7954e6 100644
--- a/arch/ppc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1,7 +1,7 @@
 /*
  * MPC85xx Internal Memory Map
  *
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
  *
  * Copyright(c) 2002,2003 Motorola Inc.
  * Xianghua Xiao (x.xiao@motorola.com)
@@ -1647,7 +1647,7 @@ typedef struct ccsr_gur {
 	u8	res4[12];
 	u32	gpindr;		/* General-purpose input data */
 	u8	res5[12];
-	u32	pmuxcr;		/* Alt function signal multiplex control */
+	u32	alt_pmuxcr;	/* Alt function signal multiplex control */
 	u8	res6[12];
 	u32	devdisr;	/* Device disable control */
 #define FSL_CORENET_DEVDISR_PCIE1	0x80000000
@@ -1672,7 +1672,23 @@ typedef struct ccsr_gur {
 #define FSL_CORENET_DEVDISR_I2C2	0x00000010
 #define FSL_CORENET_DEVDISR_DUART1	0x00000002
 #define FSL_CORENET_DEVDISR_DUART2	0x00000001
-	u8	res7[12];
+	u32	devdisr2;	/* Device disable control 2 */
+#define FSL_CORENET_DEVDISR2_PME	0x80000000
+#define FSL_CORENET_DEVDISR2_SEC	0x40000000
+#define FSL_CORENET_DEVDISR2_QMBM	0x08000000
+#define FSL_CORENET_DEVDISR2_FM1	0x02000000
+#define FSL_CORENET_DEVDISR2_10GEC1	0x01000000
+#define FSL_CORENET_DEVDISR2_DTSEC1_1	0x00800000
+#define FSL_CORENET_DEVDISR2_DTSEC1_2	0x00400000
+#define FSL_CORENET_DEVDISR2_DTSEC1_3	0x00200000
+#define FSL_CORENET_DEVDISR2_DTSEC1_4	0x00100000
+#define FSL_CORENET_DEVDISR2_FM2	0x00020000
+#define FSL_CORENET_DEVDISR2_10GEC2	0x00010000
+#define FSL_CORENET_DEVDISR2_DTSEC2_1	0x00008000
+#define FSL_CORENET_DEVDISR2_DTSEC2_2	0x00004000
+#define FSL_CORENET_DEVDISR2_DTSEC2_3	0x00002000
+#define FSL_CORENET_DEVDISR2_DTSEC2_4	0x00001000
+	u8	res7[8];
 	u32	powmgtcsr;	/* Power management status & control */
 	u8	res8[12];
 	u32	coredisru;	/* uppper portion for support of 64 cores */
@@ -1697,8 +1713,9 @@ typedef struct ccsr_gur {
 	u8	res17[24];
 	u32	rcwsr[16];	/* Reset control word status */
 #define FSL_CORENET_RCWSR4_SRDS_PRTCL		0xfc000000
-#define FSL_CORENET_RCWSR5_DDR_SYNC		0x00008000
-#define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT		15
+#define FSL_CORENET_RCWSR5_DDR_SYNC		0x00000080
+#define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT		 7
+#define FSL_CORENET_RCWSR5_SRDS_EN		0x00002000
 #define FSL_CORENET_RCWSR7_MCK_TO_PLAT_RAT	0x00400000
 #define FSL_CORENET_RCWSR8_HOST_AGT_B1		0x00e00000
 #define FSL_CORENET_RCWSR8_HOST_AGT_B2		0x00100000
@@ -1750,7 +1767,17 @@ typedef struct ccsr_gur {
 	u32	cgencrl;	/* Core general control */
 	u8	res31[184];
 	u32	sriopstecr;	/* SRIO prescaler timer enable control */
-	u8	res32[2300];
+	u8	res32[1788];
+	u32	pmuxcr;		/* Pin multiplexing control */
+	u8	res33[60];
+	u32	iovselsr;	/* I/O voltage selection status */
+	u8	res34[28];
+	u32	ddrclkdr;	/* DDR clock disable */
+	u8	res35;
+	u32	elbcclkdr;	/* eLBC clock disable */
+	u8	res36[20];
+	u32	sdhcpcr;	/* eSDHC polarity configuration */
+	u8	res37[380];
 } ccsr_gur_t;
 
 typedef struct ccsr_clk {
@@ -1846,8 +1873,13 @@ typedef struct ccsr_gur {
 #define MPC85xx_PORDEVSR_SGMII4_DIS	0x04000000
 #define MPC85xx_PORDEVSR_SRDS2_IO_SEL	0x38000000
 #define MPC85xx_PORDEVSR_PCI1		0x00800000
+#if defined(CONFIG_P1013) || defined(CONFIG_P1022)
+#define MPC85xx_PORDEVSR_IO_SEL		0x007c0000
+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT	18
+#else
 #define MPC85xx_PORDEVSR_IO_SEL		0x00780000
 #define MPC85xx_PORDEVSR_IO_SEL_SHIFT	19
+#endif
 #define MPC85xx_PORDEVSR_PCI2_ARB	0x00040000
 #define MPC85xx_PORDEVSR_PCI1_ARB	0x00020000
 #define MPC85xx_PORDEVSR_PCI1_PCI32	0x00010000
@@ -1942,7 +1974,15 @@ typedef struct serdes_corenet {
 #define SRDS_RSTCTL_RST		0x80000000
 #define SRDS_RSTCTL_RSTDONE	0x40000000
 #define SRDS_RSTCTL_RSTERR	0x20000000
+#define SRDS_RSTCTL_SDPD	0x00000020
 		u32	pllcr0; /* PLL Control Register 0 */
+#define SRDS_PLLCR0_RFCK_SEL_MASK	0x30000000
+#define SRDS_PLLCR0_RFCK_SEL_100	0x00000000
+#define SRDS_PLLCR0_RFCK_SEL_125	0x10000000
+#define SRDS_PLLCR0_RFCK_SEL_156_25	0x20000000
+#define SRDS_PLLCR0_FRATE_SEL_MASK	0x00030000
+#define SRDS_PLLCR0_FRATE_SEL_5		0x00000000
+#define SRDS_PLLCR0_FRATE_SEL_6_25	0x00010000
 		u32	pllcr1; /* PLL Control Register 1 */
 #define SRDS_PLLCR1_PLL_BWSEL	0x08000000
 		u32	res[5];
@@ -2018,6 +2058,7 @@ enum {
 #define CONFIG_SYS_MPC85xx_USB_OFFSET		0x210000
 #define CONFIG_SYS_FSL_CORENET_QMAN_OFFSET	0x318000
 #define CONFIG_SYS_FSL_CORENET_BMAN_OFFSET	0x31a000
+#define CONFIG_SYS_TSEC1_OFFSET			0x4e0000 /* FM1@DTSEC0 */
 #else
 #define CONFIG_SYS_MPC85xx_ECM_OFFSET		0x0000
 #define CONFIG_SYS_MPC85xx_DDR_OFFSET		0x2000
diff --git a/arch/ppc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/immap_86xx.h
index fd7acdb..fd7acdb 100644
--- a/arch/ppc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/immap_86xx.h
diff --git a/arch/ppc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h
index 531cfc8..531cfc8 100644
--- a/arch/ppc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
diff --git a/arch/ppc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h
index 792836b..792836b 100644
--- a/arch/ppc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
diff --git a/arch/ppc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 4ddad26..4ddad26 100644
--- a/arch/ppc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
diff --git a/arch/ppc/include/asm/iopin_8260.h b/arch/powerpc/include/asm/iopin_8260.h
index 619f3a8..619f3a8 100644
--- a/arch/ppc/include/asm/iopin_8260.h
+++ b/arch/powerpc/include/asm/iopin_8260.h
diff --git a/arch/ppc/include/asm/iopin_85xx.h b/arch/powerpc/include/asm/iopin_85xx.h
index 0f07ba3..0f07ba3 100644
--- a/arch/ppc/include/asm/iopin_85xx.h
+++ b/arch/powerpc/include/asm/iopin_85xx.h
diff --git a/arch/ppc/include/asm/iopin_8xx.h b/arch/powerpc/include/asm/iopin_8xx.h
index 3a2a682..3a2a682 100644
--- a/arch/ppc/include/asm/iopin_8xx.h
+++ b/arch/powerpc/include/asm/iopin_8xx.h
diff --git a/arch/ppc/include/asm/m8260_pci.h b/arch/powerpc/include/asm/m8260_pci.h
index 45f01de..45f01de 100644
--- a/arch/ppc/include/asm/m8260_pci.h
+++ b/arch/powerpc/include/asm/m8260_pci.h
diff --git a/arch/ppc/include/asm/mc146818rtc.h b/arch/powerpc/include/asm/mc146818rtc.h
index 5f806c4..5f806c4 100644
--- a/arch/ppc/include/asm/mc146818rtc.h
+++ b/arch/powerpc/include/asm/mc146818rtc.h
diff --git a/arch/ppc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index ce7f081..5166507 100644
--- a/arch/ppc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -577,11 +577,16 @@ extern int num_tlb_entries;
 #define SA_M	0x00000200	/* Memory coherence */
 #define SA_G	0x00000100	/* Guarded */
 #define SA_E	0x00000080	/* Endian */
+/* Some additional macros for combinations often used */
+#define SA_IG	(SA_I | SA_G)
 
 /* Access control */
 #define AC_X	0x00000024	/* Execute */
 #define AC_W	0x00000012	/* Write */
 #define AC_R	0x00000009	/* Read */
+/* Some additional macros for combinations often used */
+#define AC_RW	(AC_R | AC_W)
+#define AC_RWX	(AC_R | AC_W | AC_X)
 
 /* Some handy macros */
 
diff --git a/arch/ppc/include/asm/mp.h b/arch/powerpc/include/asm/mp.h
index 5388c95..5388c95 100644
--- a/arch/ppc/include/asm/mp.h
+++ b/arch/powerpc/include/asm/mp.h
diff --git a/arch/ppc/include/asm/mpc512x.h b/arch/powerpc/include/asm/mpc512x.h
index 960e229..960e229 100644
--- a/arch/ppc/include/asm/mpc512x.h
+++ b/arch/powerpc/include/asm/mpc512x.h
diff --git a/arch/ppc/include/asm/mpc8349_pci.h b/arch/powerpc/include/asm/mpc8349_pci.h
index 7a1adba..7a1adba 100644
--- a/arch/ppc/include/asm/mpc8349_pci.h
+++ b/arch/powerpc/include/asm/mpc8349_pci.h
diff --git a/arch/ppc/include/asm/mpc8xxx_spi.h b/arch/powerpc/include/asm/mpc8xxx_spi.h
index 41737d3..41737d3 100644
--- a/arch/ppc/include/asm/mpc8xxx_spi.h
+++ b/arch/powerpc/include/asm/mpc8xxx_spi.h
diff --git a/arch/ppc/include/asm/pci_io.h b/arch/powerpc/include/asm/pci_io.h
index 9b738c3..9b738c3 100644
--- a/arch/ppc/include/asm/pci_io.h
+++ b/arch/powerpc/include/asm/pci_io.h
diff --git a/arch/ppc/include/asm/pnp.h b/arch/powerpc/include/asm/pnp.h
index 22ceba2..22ceba2 100644
--- a/arch/ppc/include/asm/pnp.h
+++ b/arch/powerpc/include/asm/pnp.h
diff --git a/arch/ppc/include/asm/posix_types.h b/arch/powerpc/include/asm/posix_types.h
index 9170728..9170728 100644
--- a/arch/ppc/include/asm/posix_types.h
+++ b/arch/powerpc/include/asm/posix_types.h
diff --git a/arch/ppc/include/asm/ppc4xx-ebc.h b/arch/powerpc/include/asm/ppc4xx-ebc.h
index 9c17e46..9c17e46 100644
--- a/arch/ppc/include/asm/ppc4xx-ebc.h
+++ b/arch/powerpc/include/asm/ppc4xx-ebc.h
diff --git a/arch/ppc/include/asm/ppc4xx-isram.h b/arch/powerpc/include/asm/ppc4xx-isram.h
index d6d17ac..d6d17ac 100644
--- a/arch/ppc/include/asm/ppc4xx-isram.h
+++ b/arch/powerpc/include/asm/ppc4xx-isram.h
diff --git a/arch/ppc/include/asm/ppc4xx-sdram.h b/arch/powerpc/include/asm/ppc4xx-sdram.h
index 92be514..92be514 100644
--- a/arch/ppc/include/asm/ppc4xx-sdram.h
+++ b/arch/powerpc/include/asm/ppc4xx-sdram.h
diff --git a/arch/ppc/include/asm/ppc4xx-uic.h b/arch/powerpc/include/asm/ppc4xx-uic.h
index 782d045..782d045 100644
--- a/arch/ppc/include/asm/ppc4xx-uic.h
+++ b/arch/powerpc/include/asm/ppc4xx-uic.h
diff --git a/arch/ppc/include/asm/ppc4xx_config.h b/arch/powerpc/include/asm/ppc4xx_config.h
index 49acb60..49acb60 100644
--- a/arch/ppc/include/asm/ppc4xx_config.h
+++ b/arch/powerpc/include/asm/ppc4xx_config.h
diff --git a/arch/ppc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 9ec319a..9ec319a 100644
--- a/arch/ppc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
diff --git a/arch/ppc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index 196613b..cf09edf 100644
--- a/arch/ppc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -14,7 +14,7 @@
  * that the overall structure is a multiple of 16 bytes in length.
  *
  * Note that the offsets of the fields in this struct correspond with
- * the PT_* values below.  This simplifies arch/ppc/kernel/ptrace.c.
+ * the PT_* values below.  This simplifies arch/powerpc/kernel/ptrace.c.
  */
 
 #include <linux/config.h>
diff --git a/arch/ppc/include/asm/residual.h b/arch/powerpc/include/asm/residual.h
index dc85edb..dc85edb 100644
--- a/arch/ppc/include/asm/residual.h
+++ b/arch/powerpc/include/asm/residual.h
diff --git a/arch/ppc/include/asm/sigcontext.h b/arch/powerpc/include/asm/sigcontext.h
index 715c868..715c868 100644
--- a/arch/ppc/include/asm/sigcontext.h
+++ b/arch/powerpc/include/asm/sigcontext.h
diff --git a/arch/ppc/include/asm/signal.h b/arch/powerpc/include/asm/signal.h
index b11a28e..b11a28e 100644
--- a/arch/ppc/include/asm/signal.h
+++ b/arch/powerpc/include/asm/signal.h
diff --git a/arch/ppc/include/asm/status_led.h b/arch/powerpc/include/asm/status_led.h
index 0375709..0375709 100644
--- a/arch/ppc/include/asm/status_led.h
+++ b/arch/powerpc/include/asm/status_led.h
diff --git a/arch/ppc/include/asm/string.h b/arch/powerpc/include/asm/string.h
index d912a6b..d912a6b 100644
--- a/arch/ppc/include/asm/string.h
+++ b/arch/powerpc/include/asm/string.h
diff --git a/arch/ppc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index b27a6b7..b27a6b7 100644
--- a/arch/ppc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
diff --git a/arch/ppc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h
index ea2d22d..ea2d22d 100644
--- a/arch/ppc/include/asm/u-boot.h
+++ b/arch/powerpc/include/asm/u-boot.h
diff --git a/arch/ppc/include/asm/unaligned.h b/arch/powerpc/include/asm/unaligned.h
index 5f1b1e3..5f1b1e3 100644
--- a/arch/ppc/include/asm/unaligned.h
+++ b/arch/powerpc/include/asm/unaligned.h
diff --git a/arch/ppc/include/asm/xilinx_irq.h b/arch/powerpc/include/asm/xilinx_irq.h
index 61171c2..61171c2 100644
--- a/arch/ppc/include/asm/xilinx_irq.h
+++ b/arch/powerpc/include/asm/xilinx_irq.h
diff --git a/arch/ppc/lib/Makefile b/arch/powerpc/lib/Makefile
index 334e457..334e457 100644
--- a/arch/ppc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
diff --git a/arch/ppc/lib/bat_rw.c b/arch/powerpc/lib/bat_rw.c
index c48c240..c48c240 100644
--- a/arch/ppc/lib/bat_rw.c
+++ b/arch/powerpc/lib/bat_rw.c
diff --git a/arch/ppc/lib/board.c b/arch/powerpc/lib/board.c
index a30acee..7b09fb5 100644
--- a/arch/ppc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -686,7 +686,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
 
 	WATCHDOG_RESET();
 
-#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx)
+#if defined(CONFIG_SYS_DELAYED_ICACHE)
 	icache_enable ();	/* it's time to enable the instruction cache */
 #endif
 
diff --git a/arch/ppc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 0685a93..0685a93 100644
--- a/arch/ppc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
diff --git a/arch/ppc/lib/cache.c b/arch/powerpc/lib/cache.c
index 338b08b..338b08b 100644
--- a/arch/ppc/lib/cache.c
+++ b/arch/powerpc/lib/cache.c
diff --git a/arch/ppc/lib/extable.c b/arch/powerpc/lib/extable.c
index 7408d5c..7408d5c 100644
--- a/arch/ppc/lib/extable.c
+++ b/arch/powerpc/lib/extable.c
diff --git a/arch/ppc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index f603170..f603170 100644
--- a/arch/ppc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
diff --git a/arch/ppc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c
index d3eb1f3..d3eb1f3 100644
--- a/arch/ppc/lib/kgdb.c
+++ b/arch/powerpc/lib/kgdb.c
diff --git a/arch/ppc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S
index 278a804..278a804 100644
--- a/arch/ppc/lib/ppccache.S
+++ b/arch/powerpc/lib/ppccache.S
diff --git a/arch/ppc/lib/ppcstring.S b/arch/powerpc/lib/ppcstring.S
index 97023a0..97023a0 100644
--- a/arch/ppc/lib/ppcstring.S
+++ b/arch/powerpc/lib/ppcstring.S
diff --git a/arch/ppc/lib/reloc.S b/arch/powerpc/lib/reloc.S
index 50f9a83..50f9a83 100644
--- a/arch/ppc/lib/reloc.S
+++ b/arch/powerpc/lib/reloc.S
diff --git a/arch/ppc/lib/ticks.S b/arch/powerpc/lib/ticks.S
index b8d25b7..b8d25b7 100644
--- a/arch/ppc/lib/ticks.S
+++ b/arch/powerpc/lib/ticks.S
diff --git a/arch/ppc/lib/time.c b/arch/powerpc/lib/time.c
index 2909961..2909961 100644
--- a/arch/ppc/lib/time.c
+++ b/arch/powerpc/lib/time.c
diff --git a/arch/ppc/cpu/mpc512x/serial.c b/arch/ppc/cpu/mpc512x/serial.c
deleted file mode 100644
index ec2f41b..0000000
--- a/arch/ppc/cpu/mpc512x/serial.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/*
- * (C) Copyright 2000 - 2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Based ont the MPC5200 PSC driver.
- * Adapted for MPC512x by Jan Wrobel <wrr@semihalf.com>
- */
-
-/*
- * Minimal serial functions needed to use one of the PSC ports
- * as serial console interface.
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_PSC_CONSOLE)
-
-static void fifo_init (volatile psc512x_t *psc)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-
-	/* reset Rx & Tx fifo slice */
-	out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE);
-	out_be32(&psc->tfcmd, PSC_FIFO_RESET_SLICE);
-
-	/* disable Tx & Rx FIFO interrupts */
-	out_be32(&psc->rfintmask, 0);
-	out_be32(&psc->tfintmask, 0);
-
-	out_be32(&psc->tfsize, CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16));
-	out_be32(&psc->rfsize, CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16));
-
-	/* enable Tx & Rx FIFO slice */
-	out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE);
-	out_be32(&psc->tfcmd, PSC_FIFO_ENABLE_SLICE);
-
-	out_be32(&im->fifoc.fifoc_cmd, FIFOC_DISABLE_CLOCK_GATE);
-	__asm__ volatile ("sync");
-}
-
-void serial_setbrg(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-	unsigned long baseclk, div;
-
-	/* calculate dividor for setting PSC CTUR and CTLR registers */
-	baseclk = (gd->ips_clk + 8) / 16;
-	div = (baseclk + (gd->baudrate / 2)) / gd->baudrate;
-
-	out_8(&psc->ctur, (div >> 8) & 0xff);
-	out_8(&psc->ctlr,  div & 0xff); /* set baudrate */
-}
-
-int serial_init(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-
-	fifo_init (psc);
-
-	/* set MR register to point to MR1 */
-	out_8(&psc->command, PSC_SEL_MODE_REG_1);
-
-	/* disable Tx/Rx */
-	out_8(&psc->command, PSC_TX_DISABLE | PSC_RX_DISABLE);
-
-	/* choose the prescaler	by 16 for the Tx/Rx clock generation */
-	out_be16(&psc->psc_clock_select, 0xdd00);
-
-	/* switch to UART mode */
-	out_be32(&psc->sicr, 0);
-
-	/* mode register points to mr1 */
-	/* configure parity, bit length and so on in mode register 1*/
-	out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE);
-	/* now, mode register points to mr2 */
-	out_8(&psc->mode, PSC_MODE_1_STOPBIT);
-
-	/* set baudrate */
-	serial_setbrg();
-
-	/* disable all interrupts */
-	out_be16(&psc->psc_imr, 0);
-
-	/* reset and enable Rx/Tx */
-	out_8(&psc->command, PSC_RST_RX);
-	out_8(&psc->command, PSC_RST_TX);
-	out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE);
-
-	return 0;
-}
-
-void serial_putc (const char c)
-{
-	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-
-	if (c == '\n')
-		serial_putc ('\r');
-
-	/* Wait for last character to go. */
-	while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
-		;
-
-	out_8(&psc->tfdata_8, c);
-}
-
-void serial_putc_raw (const char c)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-
-	/* Wait for last character to go. */
-	while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
-		;
-
-	out_8(&psc->tfdata_8, c);
-}
-
-
-void serial_puts (const char *s)
-{
-	while (*s) {
-		serial_putc (*s++);
-	}
-}
-
-int serial_getc (void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-
-	/* Wait for a character to arrive. */
-	while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
-		;
-
-	return in_8(&psc->rfdata_8);
-}
-
-int serial_tstc (void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-
-	return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY);
-}
-
-void serial_setrts(int s)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-
-	if (s) {
-		/* Assert RTS (become LOW) */
-		out_8(&psc->op1, 0x1);
-	}
-	else {
-		/* Negate RTS (become HIGH) */
-		out_8(&psc->op0, 0x1);
-	}
-}
-
-int serial_getcts(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
-
-	return (in_8(&psc->ip) & 0x1) ? 0 : 1;
-}
-#endif /* CONFIG_PSC_CONSOLE */