diff options
Diffstat (limited to 'arch')
49 files changed, 514 insertions, 565 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 7e70440..ed525e5 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -148,10 +148,3 @@ inline void board_init_r(gd_t *id, ulong dest_addr) for (;;) ; } - -void hang(void) __attribute__ ((noreturn)); -void hang(void) -{ - for (;;) - ; -} diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index 48e6efb..0101c5d 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -31,13 +31,6 @@ #include <asm/arch/spr_misc.h> #include <asm/arch/spr_syscntl.h> -inline void hang(void) -{ - serial_puts("### ERROR ### Please RESET the board ###\n"); - for (;;) - ; -} - static void ddr_clock_init(void) { struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c index 788a8fd..52048c6 100644 --- a/arch/arm/cpu/armv7/zynq/slcr.c +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -28,6 +28,9 @@ #define SLCR_LOCK_MAGIC 0x767B #define SLCR_UNLOCK_MAGIC 0xDF0D +#define SLCR_IDCODE_MASK 0x1F000 +#define SLCR_IDCODE_SHIFT 12 + static int slcr_lock = 1; /* 1 means locked, 0 means unlocked */ void zynq_slcr_lock(void) @@ -61,3 +64,61 @@ void zynq_slcr_cpu_reset(void) writel(1, &slcr_base->pss_rst_ctrl); } + +/* Setup clk for network */ +void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk) +{ + zynq_slcr_unlock(); + + if (gem_id > 1) { + printf("Non existing GEM id %d\n", gem_id); + goto out; + } + + if (gem_id) { + /* Set divisors for appropriate frequency in GEM_CLK_CTRL */ + writel(clk, &slcr_base->gem1_clk_ctrl); + /* Configure GEM_RCLK_CTRL */ + writel(rclk, &slcr_base->gem1_rclk_ctrl); + } else { + /* Set divisors for appropriate frequency in GEM_CLK_CTRL */ + writel(clk, &slcr_base->gem0_clk_ctrl); + /* Configure GEM_RCLK_CTRL */ + writel(rclk, &slcr_base->gem0_rclk_ctrl); + } + +out: + zynq_slcr_lock(); +} + +void zynq_slcr_devcfg_disable(void) +{ + zynq_slcr_unlock(); + + /* Disable AXI interface */ + writel(0xFFFFFFFF, &slcr_base->fpga_rst_ctrl); + + /* Set Level Shifters DT618760 */ + writel(0xA, &slcr_base->lvl_shftr_en); + + zynq_slcr_lock(); +} + +void zynq_slcr_devcfg_enable(void) +{ + zynq_slcr_unlock(); + + /* Set Level Shifters DT618760 */ + writel(0xF, &slcr_base->lvl_shftr_en); + + /* Disable AXI interface */ + writel(0x0, &slcr_base->fpga_rst_ctrl); + + zynq_slcr_lock(); +} + +u32 zynq_slcr_get_idcode(void) +{ + return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >> + SLCR_IDCODE_SHIFT; +} diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c index 45b405a..8c4357d 100644 --- a/arch/arm/cpu/armv7/zynq/timer.c +++ b/arch/arm/cpu/armv7/zynq/timer.c @@ -44,6 +44,7 @@ #include <common.h> #include <div64.h> #include <asm/io.h> +#include <asm/arch/hardware.h> DECLARE_GLOBAL_DATA_PTR; @@ -54,7 +55,7 @@ struct scu_timer { }; static struct scu_timer *timer_base = - (struct scu_timer *) CONFIG_SCUTIMER_BASEADDR; + (struct scu_timer *)ZYNQ_SCUTIMER_BASEADDR; #define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */ #define SCUTIMER_CONTROL_PRESCALER_SHIFT 8 @@ -114,15 +115,43 @@ ulong get_timer_masked(void) void __udelay(unsigned long usec) { - unsigned long long tmp; - ulong tmo; - - tmo = usec / (1000000 / CONFIG_SYS_HZ); - tmp = get_ticks() + tmo; /* Get current timestamp */ - - while (get_ticks() < tmp) { /* Loop till event */ - /* NOP */; - } + u32 countticks; + u32 timeend; + u32 timediff; + u32 timenow; + + if (usec == 0) + return; + + countticks = (u32) (((unsigned long long) TIMER_TICK_HZ * usec) / + 1000000); + + /* decrementing timer */ + timeend = readl(&timer_base->counter) - countticks; + +#if TIMER_LOAD_VAL != 0xFFFFFFFF + /* do not manage multiple overflow */ + if (countticks >= TIMER_LOAD_VAL) + countticks = TIMER_LOAD_VAL - 1; +#endif + + do { + timenow = readl(&timer_base->counter); + + if (timenow >= timeend) { + /* normal case */ + timediff = timenow - timeend; + } else { + if ((TIMER_LOAD_VAL - timeend + timenow) <= + countticks) { + /* overflow */ + timediff = TIMER_LOAD_VAL - timeend + timenow; + } else { + /* missed the exact match */ + break; + } + } + } while (timediff > 0); } /* Timer without interrupts */ diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c index 09e8177..0c18610 100644 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ b/arch/arm/cpu/pxa/pxa2xx.c @@ -284,7 +284,7 @@ void i2c_clk_enable(void) writel(readl(CKEN) | CKEN14_I2C, CKEN); } -void reset_cpu(ulong ignored) __attribute__((noreturn)); +void __attribute__((weak)) reset_cpu(ulong ignored) __attribute__((noreturn)); void reset_cpu(ulong ignored) { diff --git a/arch/arm/include/asm/arch-pxa/hardware.h b/arch/arm/include/asm/arch-pxa/hardware.h index 44b800f..2397bce 100644 --- a/arch/arm/include/asm/arch-pxa/hardware.h +++ b/arch/arm/include/asm/arch-pxa/hardware.h @@ -77,17 +77,6 @@ #define GPIO_FALLING_EDGE 1 #define GPIO_RISING_EDGE 2 #define GPIO_BOTH_EDGES 3 -extern void set_GPIO_IRQ_edge( int gpio_nr, int edge_mask ); - -/* - * Handy routine to set GPIO alternate functions - */ -extern void set_GPIO_mode( int gpio_mode ); - -/* - * return current lclk frequency in units of 10kHz - */ -extern unsigned int get_lclk_frequency_10khz(void); #endif diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h index d0c69da..8b8a91a 100644 --- a/arch/arm/include/asm/arch-zynq/hardware.h +++ b/arch/arm/include/asm/arch-zynq/hardware.h @@ -23,16 +23,28 @@ #ifndef _ASM_ARCH_HARDWARE_H #define _ASM_ARCH_HARDWARE_H -#define XPSS_SYS_CTRL_BASEADDR 0xF8000000 -#define XPSS_DEV_CFG_APB_BASEADDR 0xF8007000 -#define XPSS_SCU_BASEADDR 0xF8F00000 +#define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000 +#define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000 +#define ZYNQ_SCU_BASEADDR 0xF8F00000 +#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 +#define ZYNQ_GEM_BASEADDR0 0xE000B000 +#define ZYNQ_GEM_BASEADDR1 0xE000C000 +#define ZYNQ_SDHCI_BASEADDR0 0xE0100000 +#define ZYNQ_SDHCI_BASEADDR1 0xE0101000 +#define ZYNQ_I2C_BASEADDR0 0xE0004000 +#define ZYNQ_I2C_BASEADDR1 0xE0005000 /* Reflect slcr offsets */ struct slcr_regs { u32 scl; /* 0x0 */ u32 slcr_lock; /* 0x4 */ u32 slcr_unlock; /* 0x8 */ - u32 reserved1[125]; + u32 reserved0[75]; + u32 gem0_rclk_ctrl; /* 0x138 */ + u32 gem1_rclk_ctrl; /* 0x13c */ + u32 gem0_clk_ctrl; /* 0x140 */ + u32 gem1_clk_ctrl; /* 0x144 */ + u32 reserved1[46]; u32 pss_rst_ctrl; /* 0x200 */ u32 reserved2[15]; u32 fpga_rst_ctrl; /* 0x240 */ @@ -41,15 +53,21 @@ struct slcr_regs { u32 boot_mode; /* 0x25c */ u32 reserved4[116]; u32 trust_zone; /* 0x430 */ /* FIXME */ - u32 reserved5[115]; + u32 reserved5_1[63]; + u32 pss_idcode; /* 0x530 */ + u32 reserved5_2[51]; u32 ddr_urgent; /* 0x600 */ u32 reserved6[6]; u32 ddr_urgent_sel; /* 0x61c */ - u32 reserved7[188]; + u32 reserved7[56]; + u32 mio_pin[54]; /* 0x700 - 0x7D4 */ + u32 reserved8[74]; + u32 lvl_shftr_en; /* 0x900 */ + u32 reserved9[3]; u32 ocm_cfg; /* 0x910 */ }; -#define slcr_base ((struct slcr_regs *) XPSS_SYS_CTRL_BASEADDR) +#define slcr_base ((struct slcr_regs *)ZYNQ_SYS_CTRL_BASEADDR) struct devcfg_regs { u32 ctrl; /* 0x0 */ @@ -72,7 +90,7 @@ struct devcfg_regs { u32 read_count; /* 0x8c */ }; -#define devcfg_base ((struct devcfg_regs *) XPSS_DEV_CFG_APB_BASEADDR) +#define devcfg_base ((struct devcfg_regs *)ZYNQ_DEV_CFG_APB_BASEADDR) struct scu_regs { u32 reserved1[16]; @@ -80,6 +98,6 @@ struct scu_regs { u32 filter_end; /* 0x44 */ }; -#define scu_base ((struct scu_regs *) XPSS_SCU_BASEADDR) +#define scu_base ((struct scu_regs *)ZYNQ_SCU_BASEADDR) #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-zynq/sys_proto.h b/arch/arm/include/asm/arch-zynq/sys_proto.h index e788900..2317121 100644 --- a/arch/arm/include/asm/arch-zynq/sys_proto.h +++ b/arch/arm/include/asm/arch-zynq/sys_proto.h @@ -26,5 +26,12 @@ extern void zynq_slcr_lock(void); extern void zynq_slcr_unlock(void); extern void zynq_slcr_cpu_reset(void); +extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk); +extern void zynq_slcr_devcfg_disable(void); +extern void zynq_slcr_devcfg_enable(void); +extern u32 zynq_slcr_get_idcode(void); + +/* Driver extern functions */ +extern int zynq_sdhci_init(u32 regbase); #endif /* _SYS_PROTO_H_ */ diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 0521178..09ab4ad 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -706,9 +706,3 @@ void board_init_r(gd_t *id, ulong dest_addr) /* NOTREACHED - no way out of command loop except booting */ } - -void hang(void) -{ - puts("### ERROR ### Please RESET the board ###\n"); - for (;;); -} diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 57e07df..ccf862a 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -120,11 +120,6 @@ static int display_banner (void) return 0; } -void hang(void) -{ - for (;;) ; -} - static int display_dram_config (void) { int i; diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index 75b6c46..ccea3b9 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -432,17 +432,3 @@ void board_init_r(gd_t * id, ulong dest_addr) for (;;) main_loop(); } - -void hang(void) -{ -#ifdef CONFIG_STATUS_LED - status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); - status_led_set(STATUS_LED_CRASH, STATUS_LED_BLINKING); -#endif - puts("### ERROR ### Please RESET the board ###\n"); - while (1) - /* If a JTAG emulator is hooked up, we'll automatically trigger - * a breakpoint in it. If one isn't, this is just a NOP. - */ - asm("emuexcpt;"); -} diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index adaccfe..b2e3068 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -663,10 +663,3 @@ void board_init_r (gd_t *id, ulong dest_addr) /* NOTREACHED - no way out of command loop except booting */ } - - -void hang(void) -{ - puts ("### ERROR ### Please RESET the board ###\n"); - for (;;); -} diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h index 2c4d5ff..d33faeb 100644 --- a/arch/microblaze/include/asm/processor.h +++ b/arch/microblaze/include/asm/processor.h @@ -31,4 +31,8 @@ extern char __text_start[]; /* Microblaze board initialization function */ void board_init(void); +/* Watchdog functions */ +extern int hw_watchdog_init(void); +extern void hw_watchdog_disable(void); + #endif /* __ASM_MICROBLAZE_PROCESSOR_H */ diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index a7c2f76..bb40243 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -61,6 +61,9 @@ init_fnc_t *init_sequence[] = { serial_init, console_init_f, interrupts_init, +#ifdef CONFIG_XILINX_TB_WATCHDOG + hw_watchdog_init, +#endif timer_init, NULL, }; @@ -71,15 +74,15 @@ void board_init_f(ulong not_used) { bd_t *bd; init_fnc_t **init_fnc_ptr; - gd = (gd_t *) (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET); - bd = (bd_t *) (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \ + gd = (gd_t *)(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET); + bd = (bd_t *)(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - GENERATED_BD_INFO_SIZE); #if defined(CONFIG_CMD_FLASH) ulong flash_size = 0; #endif asm ("nop"); /* FIXME gd is not initialize - wait */ - memset ((void *)gd, 0, GENERATED_GBL_DATA_SIZE); - memset ((void *)bd, 0, GENERATED_BD_INFO_SIZE); + memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); + memset((void *)bd, 0, GENERATED_BD_INFO_SIZE); gd->bd = bd; gd->baudrate = CONFIG_BAUDRATE; bd->bi_baudrate = CONFIG_BAUDRATE; @@ -105,57 +108,55 @@ void board_init_f(ulong not_used) * aka CONFIG_SYS_MONITOR_BASE - Note there is no need for reloc_off * as our monitory code is run from SDRAM */ - mem_malloc_init (CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); + mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); serial_initialize(); for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { - WATCHDOG_RESET (); - if ((*init_fnc_ptr) () != 0) { - hang (); - } + WATCHDOG_RESET(); + if ((*init_fnc_ptr) () != 0) + hang(); } #ifdef CONFIG_OF_CONTROL /* For now, put this check after the console is ready */ - if (fdtdec_prepare_fdt()) { - panic("** CONFIG_OF_CONTROL defined but no FDT - please see " - "doc/README.fdt-control"); - } else + if (fdtdec_prepare_fdt()) + panic("** No FDT - please see doc/README.fdt-control"); + else printf("DTB: 0x%x\n", (u32)gd->fdt_blob); #endif - puts ("SDRAM :\n"); - printf ("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF"); - printf ("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF"); - printf ("\tU-Boot Start:0x%08x\n", CONFIG_SYS_TEXT_BASE); + puts("SDRAM :\n"); + printf("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF"); + printf("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF"); + printf("\tU-Boot Start:0x%08x\n", CONFIG_SYS_TEXT_BASE); #if defined(CONFIG_CMD_FLASH) - puts ("Flash: "); + puts("Flash: "); bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; flash_size = flash_init(); if (bd->bi_flashstart && flash_size > 0) { # ifdef CONFIG_SYS_FLASH_CHECKSUM - print_size (flash_size, ""); + print_size(flash_size, ""); /* * Compute and print flash CRC if flashchecksum is set to 'y' * * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX */ if (getenv_yesno("flashchecksum") == 1) { - printf (" CRC: %08X", - crc32(0, (const u8 *)bd->bi_flashstart, - flash_size) + printf(" CRC: %08X", + crc32(0, (const u8 *)bd->bi_flashstart, + flash_size) ); } - putc ('\n'); + putc('\n'); # else /* !CONFIG_SYS_FLASH_CHECKSUM */ - print_size (flash_size, "\n"); + print_size(flash_size, "\n"); # endif /* CONFIG_SYS_FLASH_CHECKSUM */ bd->bi_flashsize = flash_size; bd->bi_flashoffset = bd->bi_flashstart + flash_size; } else { - puts ("Flash init FAILED"); + puts("Flash init FAILED"); bd->bi_flashstart = 0; bd->bi_flashsize = 0; bd->bi_flashoffset = 0; @@ -163,10 +164,10 @@ void board_init_f(ulong not_used) #endif /* relocate environment function pointers etc. */ - env_relocate (); + env_relocate(); /* Initialize stdio devices */ - stdio_init (); + stdio_init(); /* Initialize the jump table for applications */ jumptable_init(); @@ -190,13 +191,7 @@ void board_init_f(ulong not_used) /* main_loop */ for (;;) { - WATCHDOG_RESET (); - main_loop (); + WATCHDOG_RESET(); + main_loop(); } } - -void hang (void) -{ - puts ("### ERROR ### Please RESET the board ###\n"); - for (;;) ; -} diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index f19f198..fac7915 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -344,10 +344,3 @@ void board_init_r(gd_t *id, ulong dest_addr) /* NOTREACHED - no way out of command loop except booting */ } - -void hang(void) -{ - puts("### ERROR ### Please RESET the board ###\n"); - for (;;) - ; -} diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c index a7d27fc..57af1be 100644 --- a/arch/nds32/lib/board.c +++ b/arch/nds32/lib/board.c @@ -404,10 +404,3 @@ void board_init_r(gd_t *id, ulong dest_addr) /* NOTREACHED - no way out of command loop except booting */ } - -void hang(void) -{ - puts("### ERROR ### Please RESET the board ###\n"); - for (;;) - ; -} diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c index 1e495d4..f430ef0 100644 --- a/arch/nios2/lib/board.c +++ b/arch/nios2/lib/board.c @@ -64,7 +64,6 @@ typedef int (init_fnc_t) (void); ***********************************************************************/ init_fnc_t *init_sequence[] = { - #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, /* Call board-specific init code early.*/ #endif @@ -83,7 +82,7 @@ init_fnc_t *init_sequence[] = { /***********************************************************************/ -void board_init (void) +void board_init(void) { bd_t *bd; init_fnc_t **init_fnc_ptr; @@ -93,7 +92,7 @@ void board_init (void) /* Pointer is writable since we allocated a register for it. */ gd = &gd_data; /* compiler optimization barrier needed for GCC >= 3.4 */ - __asm__ __volatile__("": : :"memory"); + __asm__ __volatile__("" : : : "memory"); gd->bd = &bd_data; gd->baudrate = CONFIG_BAUDRATE; @@ -106,25 +105,24 @@ void board_init (void) bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; #endif #if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE) - bd->bi_sramstart= CONFIG_SYS_SRAM_BASE; + bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; #endif bd->bi_baudrate = CONFIG_BAUDRATE; for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { - WATCHDOG_RESET (); - if ((*init_fnc_ptr) () != 0) { - hang (); - } + WATCHDOG_RESET(); + if ((*init_fnc_ptr) () != 0) + hang(); } - WATCHDOG_RESET (); + WATCHDOG_RESET(); /* The Malloc area is immediately below the monitor copy in RAM */ mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); #ifndef CONFIG_SYS_NO_FLASH - WATCHDOG_RESET (); + WATCHDOG_RESET(); bd->bi_flashsize = flash_init(); #endif @@ -138,39 +136,29 @@ void board_init (void) mmc_initialize(bd); #endif - WATCHDOG_RESET (); + WATCHDOG_RESET(); env_relocate(); - WATCHDOG_RESET (); + WATCHDOG_RESET(); stdio_init(); jumptable_init(); console_init_r(); - WATCHDOG_RESET (); - interrupt_init (); + WATCHDOG_RESET(); + interrupt_init(); #if defined(CONFIG_BOARD_LATE_INIT) - board_late_init (); + board_late_init(); #endif #if defined(CONFIG_CMD_NET) - puts ("Net: "); - eth_initialize (bd); + puts("Net: "); + eth_initialize(bd); #endif /* main_loop */ for (;;) { - WATCHDOG_RESET (); - main_loop (); + WATCHDOG_RESET(); + main_loop(); } } - - -/***********************************************************************/ - -void hang (void) -{ - disable_interrupts (); - puts("### ERROR ### Please reset board ###\n"); - for (;;); -} diff --git a/arch/openrisc/lib/board.c b/arch/openrisc/lib/board.c index 85aa189..630e45f 100644 --- a/arch/openrisc/lib/board.c +++ b/arch/openrisc/lib/board.c @@ -154,15 +154,3 @@ void board_init(void) main_loop(); } } - - -/***********************************************************************/ - -void hang(void) -{ - disable_interrupts(); - puts("### ERROR ### Please reset board ###\n"); - - for (;;) - ; -} diff --git a/arch/powerpc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c index 9a8f315..6761877 100644 --- a/arch/powerpc/cpu/mpc512x/speed.c +++ b/arch/powerpc/cpu/mpc512x/speed.c @@ -151,9 +151,3 @@ U_BOOT_CMD(clocks, 1, 0, do_clocks, "print clock configuration", " clocks" ); - -int prt_mpc512x_clks (void) -{ - do_clocks (NULL, 0, 0, NULL); - return (0); -} diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 5d72f4c..422782c 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -255,6 +255,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003 puts("Work-around for Erratum PCIe-A003 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_USB14 + puts("Work-around for Erratum USB14 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index df2ab6d..6ce483e 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -282,14 +282,6 @@ unsigned long get_tbclk (void) #if defined(CONFIG_WATCHDOG) void -watchdog_reset(void) -{ - int re_enable = disable_interrupts(); - reset_85xx_watchdog(); - if (re_enable) enable_interrupts(); -} - -void reset_85xx_watchdog(void) { /* @@ -297,6 +289,16 @@ reset_85xx_watchdog(void) */ mtspr(SPRN_TSR, TSR_WIS); } + +void +watchdog_reset(void) +{ + int re_enable = disable_interrupts(); + + reset_85xx_watchdog(); + if (re_enable) + enable_interrupts(); +} #endif /* CONFIG_WATCHDOG */ /* diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index de9d916..53713e3 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -623,6 +623,20 @@ skip_l2: } #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_USB14 + /* On P204x/P304x/P50x0 Rev1.0, USB transmit will result internal + * multi-bit ECC errors which has impact on performance, so software + * should disable all ECC reporting from USB1 and USB2. + */ + if (IS_SVR_REV(get_svr(), 1, 0)) { + struct dcsr_dcfg_regs *dcfg = (struct dcsr_dcfg_regs *) + (CONFIG_SYS_DCSRBAR + CONFIG_SYS_DCSR_DCFG_OFFSET); + setbits_be32(&dcfg->ecccr1, + (DCSR_DCFG_ECC_DISABLE_USB1 | + DCSR_DCFG_ECC_DISABLE_USB2)); + } +#endif + #ifdef CONFIG_FMAN_ENET fman_enet_init(); #endif diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 24eb978..288f7b2 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -663,6 +663,13 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2", + "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + do_fixup_by_compat_u32(blob, "fsl,mpic", + "clock-frequency", get_bus_freq(0)/2, 1); +#else + do_fixup_by_compat_u32(blob, "fsl,mpic", + "clock-frequency", get_bus_freq(0), 1); #endif fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 825a292..b621adf 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -103,6 +103,10 @@ static const struct { { 22, 168, FSL_SRDS_BANK_3 }, { 23, 169, FSL_SRDS_BANK_3 }, #endif +#if SRDS_MAX_BANK > 3 + { 24, 175, FSL_SRDS_BANK_4 }, + { 25, 176, FSL_SRDS_BANK_4 }, +#endif }; int serdes_get_lane_idx(int lane) diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 91d9cac..ef685fe 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -27,16 +27,16 @@ #ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { /* dqrr liodn, frame data liodn, liodn off, sdest */ - SET_QP_INFO(1, 2, 1, 0), - SET_QP_INFO(3, 4, 2, 1), - SET_QP_INFO(5, 6, 3, 2), - SET_QP_INFO(7, 8, 4, 3), - SET_QP_INFO(9, 10, 5, 0), - SET_QP_INFO(11, 12, 1, 1), - SET_QP_INFO(13, 14, 2, 2), - SET_QP_INFO(15, 16, 3, 3), - SET_QP_INFO(17, 18, 4, 0), /* for now sdest to 0 */ - SET_QP_INFO(19, 20, 5, 0), /* for now sdest to 0 */ + SET_QP_INFO(1, 2, 1, 0), + SET_QP_INFO(3, 4, 2, 1), + SET_QP_INFO(5, 6, 3, 2), + SET_QP_INFO(7, 8, 4, 3), + SET_QP_INFO(9, 10, 5, 0), + SET_QP_INFO(11, 12, 6, 1), + SET_QP_INFO(13, 14, 7, 2), + SET_QP_INFO(15, 16, 8, 3), + SET_QP_INFO(17, 18, 9, 0), /* for now sdest to 0 */ + SET_QP_INFO(19, 20, 10, 0), /* for now sdest to 0 */ }; #endif diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index e46a714..cab03f8 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -27,16 +27,16 @@ #ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { /* dqrr liodn, frame data liodn, liodn off, sdest */ - SET_QP_INFO(1, 2, 1, 0), - SET_QP_INFO(3, 4, 2, 1), - SET_QP_INFO(5, 6, 3, 2), - SET_QP_INFO(7, 8, 4, 3), - SET_QP_INFO(9, 10, 5, 0), - SET_QP_INFO(11, 12, 1, 1), - SET_QP_INFO(13, 14, 2, 2), - SET_QP_INFO(15, 16, 3, 3), - SET_QP_INFO(17, 18, 4, 0), /* for now sdest to 0 */ - SET_QP_INFO(19, 20, 5, 0), /* for now sdest to 0 */ + SET_QP_INFO(1, 2, 1, 0), + SET_QP_INFO(3, 4, 2, 1), + SET_QP_INFO(5, 6, 3, 2), + SET_QP_INFO(7, 8, 4, 3), + SET_QP_INFO(9, 10, 5, 0), + SET_QP_INFO(1, 12, 6, 1), + SET_QP_INFO(13, 14, 7, 2), + SET_QP_INFO(15, 16, 8, 3), + SET_QP_INFO(17, 18, 9, 0), /* for now sdest to 0 */ + SET_QP_INFO(19, 20, 10, 0), /* for now sdest to 0 */ }; #endif diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c index e8c26bf..ca05b9c 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c @@ -27,16 +27,16 @@ #ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { /* dqrr liodn, frame data liodn, liodn off, sdest */ - SET_QP_INFO(1, 2, 1, 0), - SET_QP_INFO(3, 4, 2, 1), - SET_QP_INFO(5, 6, 3, 0), - SET_QP_INFO(7, 8, 4, 1), - SET_QP_INFO(9, 10, 5, 0), - SET_QP_INFO(11, 12, 1, 1), - SET_QP_INFO(13, 14, 2, 0), - SET_QP_INFO(15, 16, 3, 1), - SET_QP_INFO(17, 18, 4, 0), - SET_QP_INFO(19, 20, 5, 1), + SET_QP_INFO(1, 2, 1, 0), + SET_QP_INFO(3, 4, 2, 1), + SET_QP_INFO(5, 6, 3, 0), + SET_QP_INFO(7, 8, 4, 1), + SET_QP_INFO(9, 10, 5, 0), + SET_QP_INFO(11, 12, 6, 1), + SET_QP_INFO(13, 14, 7, 0), + SET_QP_INFO(15, 16, 8, 1), + SET_QP_INFO(17, 18, 9, 0), + SET_QP_INFO(19, 20, 10, 1), }; #endif diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index b59ef69..d529095 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -30,11 +30,9 @@ #include <asm/fsl_portals.h> #include <asm/fsl_liodn.h> -static ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; -static ccsr_bman_t *bman = (void *)CONFIG_SYS_FSL_BMAN_ADDR; - void setup_portals(void) { + ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; #ifdef CONFIG_FSL_CORENET int i; @@ -166,6 +164,20 @@ static int fdt_qportal(void *blob, int off, int id, char *name, num = get_dpaa_liodn(dev, &liodns[0], id); ret = fdt_setprop(blob, childoff, "fsl,liodn", &liodns[0], sizeof(u32) * num); + if (!strncmp(name, "pme", 3)) { + u32 pme_rev1, pme_rev2; + ccsr_pme_t *pme_regs = + (void *)CONFIG_SYS_FSL_CORENET_PME_ADDR; + + pme_rev1 = in_be32(&pme_regs->pm_ip_rev_1); + pme_rev2 = in_be32(&pme_regs->pm_ip_rev_2); + ret = fdt_setprop(blob, childoff, + "fsl,pme-rev1", &pme_rev1, sizeof(u32)); + if (ret < 0) + return ret; + ret = fdt_setprop(blob, childoff, + "fsl,pme-rev2", &pme_rev2, sizeof(u32)); + } #endif } else { return childoff; @@ -183,6 +195,7 @@ void fdt_fixup_qportals(void *blob) int off, err; unsigned int maj, min; unsigned int ip_cfg; + ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; u32 rev_1 = in_be32(&qman->ip_rev_1); u32 rev_2 = in_be32(&qman->ip_rev_2); char compat[64]; @@ -272,6 +285,7 @@ void fdt_fixup_bportals(void *blob) int off, err; unsigned int maj, min; unsigned int ip_cfg; + ccsr_bman_t *bman = (void *)CONFIG_SYS_FSL_BMAN_ADDR; u32 rev_1 = in_be32(&bman->ip_rev_1); u32 rev_2 = in_be32(&bman->ip_rev_2); char compat[64]; diff --git a/arch/powerpc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile index 8da2f86..e301dc6 100644 --- a/arch/powerpc/cpu/ppc4xx/Makefile +++ b/arch/powerpc/cpu/ppc4xx/Makefile @@ -68,6 +68,10 @@ COBJS += miiphy.o COBJS += uic.o endif +ifdef CONFIG_SPL_BUILD +COBJS-y += spl_boot.o +endif + SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y)) START := $(addprefix $(obj),$(START)) diff --git a/arch/powerpc/cpu/ppc4xx/spl_boot.c b/arch/powerpc/cpu/ppc4xx/spl_boot.c new file mode 100644 index 0000000..80869f6 --- /dev/null +++ b/arch/powerpc/cpu/ppc4xx/spl_boot.c @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2013 Stefan Roese <sr@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <spl.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Return selected boot device. On PPC4xx its only NOR flash right now. + */ +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_NOR; +} + +/* + * SPL version of board_init_f() + */ +void board_init_f(ulong bootflag) +{ + /* + * First we need to initialize the SDRAM, so that the real + * U-Boot or the OS (Linux) can be loaded + */ + initdram(0); + + /* Clear bss */ + memset(__bss_start, '\0', __bss_end - __bss_start); + + /* + * Init global_data pointer. Has to be done before calling + * get_clocks(), as it stores some clock values into gd needed + * later on in the serial driver. + */ + /* Pointer is writable since we allocated a register for it */ + gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + /* Clear initial global data */ + memset((void *)gd, 0, sizeof(gd_t)); + + /* + * get_clocks() needs to be called so that the serial driver + * works correctly + */ + get_clocks(); + + /* + * Do rudimental console / serial setup + */ + preloader_console_init(); + + /* + * Call board_init_r() (SPL framework version) to load and boot + * real U-Boot or OS + */ + board_init_r(NULL, 0); + /* Does not return!!! */ +} diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 52f2623..57ae1d3 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -232,7 +232,7 @@ * * Use r12 to access the GOT */ -#if !defined(CONFIG_NAND_SPL) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) START_GOT GOT_ENTRY(_GOT2_TABLE_) GOT_ENTRY(_FIXUP_TABLE_) @@ -248,7 +248,8 @@ END_GOT #endif /* CONFIG_NAND_SPL */ -#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \ + !defined(CONFIG_SPL_BUILD) /* * NAND U-Boot image is started from offset 0 */ @@ -270,6 +271,18 @@ bl _start_440 #endif +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + /* + * This is the entry of the real U-Boot from a board port + * that supports SPL booting on the PPC4xx. We only need + * to call board_init_f() here. Everything else has already + * been done in the SPL u-boot version. + */ + GET_GOT /* initialize GOT access */ + bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ +#endif + /* * 440 Startup -- on reset only the top 4k of the effective * address space is mapped in by an entry in the instruction @@ -539,7 +552,7 @@ tlbnx2: addi r4,r4,1 /* Next TLB */ * r3 - 1st arg to board_init(): IMMP pointer * r4 - 2nd arg to board_init(): boot flag */ -#ifndef CONFIG_NAND_SPL +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) .text .long 0x27051956 /* U-Boot Magic Number */ .globl version_string @@ -612,6 +625,18 @@ _end_of_vectors: .globl _start _start: +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + /* + * This is the entry of the real U-Boot from a board port + * that supports SPL booting on the PPC4xx. We only need + * to call board_init_f() here. Everything else has already + * been done in the SPL u-boot version. + */ + GET_GOT /* initialize GOT access */ + bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ +#endif + /*****************************************************************************/ #if defined(CONFIG_440) @@ -796,7 +821,9 @@ _start: #ifdef CONFIG_NAND_SPL bl nand_boot_common /* will not return */ #else +#ifndef CONFIG_SPL_BUILD GET_GOT +#endif bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f @@ -1080,7 +1107,7 @@ _start: /*----------------------------------------------------------------------- */ -#ifndef CONFIG_NAND_SPL +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) /* * This code finishes saving the registers to the exception frame * and jumps to the appropriate handler for the exception. @@ -1262,6 +1289,7 @@ in32r: lwbrx r3,r0,r3 blr +#if !defined(CONFIG_SPL_BUILD) /* * void relocate_code (addr_sp, gd, addr_moni) * @@ -1626,6 +1654,7 @@ __440_msr_continue: mtlr r4 /* restore link register */ blr +#endif /* CONFIG_SPL_BUILD */ #if defined(CONFIG_440) /*----------------------------------------------------------------------------+ diff --git a/arch/powerpc/cpu/ppc4xx/u-boot-spl.lds b/arch/powerpc/cpu/ppc4xx/u-boot-spl.lds new file mode 100644 index 0000000..ae1df17 --- /dev/null +++ b/arch/powerpc/cpu/ppc4xx/u-boot-spl.lds @@ -0,0 +1,74 @@ +/* + * Copyright 2012-2013 Stefan Roese <sr@denx.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +MEMORY +{ + sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, + LENGTH = CONFIG_SPL_BSS_MAX_SIZE + flash : ORIGIN = CONFIG_SPL_TEXT_BASE, + LENGTH = CONFIG_SYS_SPL_MAX_LEN +} + +OUTPUT_ARCH(powerpc) +ENTRY(_start) +SECTIONS +{ +#ifdef CONFIG_440 + .bootpg 0xfffff000 : + { + arch/powerpc/cpu/ppc4xx/start.o (.bootpg) + + /* + * PPC440 board need a board specific object with the + * TLB definitions. This needs to get included right after + * start.o, since the first shadow TLB only covers 4k + * of address space. + */ + CONFIG_BOARDDIR/init.o (.bootpg) + } > flash +#endif + + .resetvec 0xFFFFFFFC : + { + KEEP(*(.resetvec)) + } > flash + + .text : + { + __start = .; + arch/powerpc/cpu/ppc4xx/start.o (.text) + CONFIG_BOARDDIR/init.o (.text) + *(.text*) + } > flash + + . = ALIGN(4); + .data : { *(SORT_BY_ALIGNMENT(.data*)) } > flash + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } > flash + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.bss*) + . = ALIGN(4); + __bss_end = .; + } > sdram +} diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds index 06010d6..e994f02 100644 --- a/arch/powerpc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -96,6 +96,7 @@ SECTIONS . = ALIGN(256); __init_end = .; +#ifndef CONFIG_SPL #ifdef CONFIG_440 .bootpg RESET_VECTOR_ADDRESS - 0xffc : { @@ -132,6 +133,7 @@ SECTIONS #if (RESET_VECTOR_ADDRESS == 0xfffffffc) . |= 0x10; #endif +#endif /* CONFIG_SPL */ __bss_start = .; .bss (NOLOAD) : diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index d57c178..7267611 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -333,7 +333,9 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 +#define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 @@ -365,7 +367,9 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 +#define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 @@ -442,6 +446,8 @@ #define CONFIG_SYS_FSL_USB2_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_USB14 +#define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 @@ -473,7 +479,7 @@ #define CONFIG_SYS_FSL_USB2_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_USB138 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_ERRATUM_A004699 @@ -490,7 +496,6 @@ #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC -#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #elif defined(CONFIG_BSC9132) @@ -503,7 +508,6 @@ #define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC -#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" @@ -560,6 +564,7 @@ #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A_004934 +#define CONFIG_SYS_FSL_ERRATUM_A005871 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #elif defined(CONFIG_PPC_B4860) @@ -585,6 +590,7 @@ #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A_004934 +#define CONFIG_SYS_FSL_ERRATUM_A005871 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #else diff --git a/arch/powerpc/include/asm/fsl_memac.h b/arch/powerpc/include/asm/fsl_memac.h index d6b60e6..69f95d1 100644 --- a/arch/powerpc/include/asm/fsl_memac.h +++ b/arch/powerpc/include/asm/fsl_memac.h @@ -222,6 +222,10 @@ struct memac { /* IF_MODE - Interface Mode Register */ #define IF_MODE_EN_AUTO 0x00008000 /* 1 - Enable automatic speed selection */ +#define IF_MODE_SETSP_100M 0x00000000 /* 00 - 100Mbps RGMII */ +#define IF_MODE_SETSP_10M 0x00002000 /* 01 - 10Mbps RGMII */ +#define IF_MODE_SETSP_1000M 0x00004000 /* 10 - 1000Mbps RGMII */ +#define IF_MODE_SETSP_MASK 0x00006000 /* setsp mask bits */ #define IF_MODE_XGMII 0x00000000 /* 00- XGMII(10) interface mode */ #define IF_MODE_GMII 0x00000002 /* 10- GMII interface mode */ #define IF_MODE_MASK 0x00000003 /* mask for mode interface mode */ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 4eb3f79..baaa9fe 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2914,7 +2914,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000 -#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 +#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\ + && !defined(CONFIG_PPC_B4420) #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x240000 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x250000 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 @@ -3160,4 +3161,13 @@ struct ccsr_cluster_l2 { #define CONFIG_SYS_FSL_CLUSTER_1_L2 \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET) #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */ + +#define CONFIG_SYS_DCSR_DCFG_OFFSET 0X20000 +struct dcsr_dcfg_regs { + u8 res_0[0x520]; + u32 ecccr1; +#define DCSR_DCFG_ECC_DISABLE_USB1 0x00008000 +#define DCSR_DCFG_ECC_DISABLE_USB2 0x00004000 + u8 res_524[0x1000 - 0x524]; /* 0x524 - 0x1000 */ +}; #endif /*__IMMAP_85xx__*/ diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 422b4a3..41b2294 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -1050,15 +1050,6 @@ void board_init_r(gd_t *id, ulong dest_addr) /* NOTREACHED - no way out of command loop except booting */ } -void hang(void) -{ - puts("### ERROR ### Please RESET the board ###\n"); - bootstage_error(BOOTSTAGE_ID_NEED_RESET); - for (;;) - ; -} - - #if 0 /* We could use plain global data, but the resulting code is bigger */ /* * Pointer to initial global data area diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index 4fd0d4e..988b52c 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -18,5 +18,8 @@ # MA 02111-1307 USA PLATFORM_CPPFLAGS += -DCONFIG_SANDBOX -D__SANDBOX__ -U_FORTIFY_SOURCE -PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM +PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM -DCONFIG_SYS_GENERIC_BOARD PLATFORM_LIBS += -lrt + +# Support generic board on sandbox +__HAVE_ARCH_GENERIC_BOARD := y diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index b2788d5..dd8d495 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -57,6 +57,11 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) return (void *)(gd->arch.ram_buf + paddr); } +phys_addr_t map_to_sysmem(void *ptr) +{ + return (u8 *)ptr - gd->arch.ram_buf; +} + void flush_dcache_range(unsigned long start, unsigned long stop) { } diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 5287fd5..ae6e16c 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -90,7 +90,7 @@ int sandbox_main_loop_init(void) /* Execute command if required */ if (state->cmd) { - run_command(state->cmd, 0); + run_command_list(state->cmd, -1, 0); os_exit(state->exit_type); } @@ -104,6 +104,13 @@ static int sb_cmdline_cb_command(struct sandbox_state *state, const char *arg) } SB_CMDLINE_OPT_SHORT(command, 'c', 1, "Execute U-Boot command"); +static int sb_cmdline_cb_fdt(struct sandbox_state *state, const char *arg) +{ + state->fdt_fname = arg; + return 0; +} +SB_CMDLINE_OPT_SHORT(fdt, 'd', 1, "Specify U-Boot's control FDT"); + int main(int argc, char *argv[]) { struct sandbox_state *state; diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index d8c0236..0c022f1 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -20,6 +20,9 @@ * MA 02111-1307 USA */ +#ifndef __SANDBOX_ASM_IO_H +#define __SANDBOX_ASM_IO_H + /* * Given a physical address and a length, return a virtual address * that can be used to access the memory range with the caching @@ -49,3 +52,8 @@ static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) static inline void unmap_sysmem(const void *vaddr) { } + +/* Map from a pointer to our RAM buffer */ +phys_addr_t map_to_sysmem(void *ptr); + +#endif diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index 2b62b46..9552708 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -34,6 +34,7 @@ enum exit_type_id { /* The complete state of the test system */ struct sandbox_state { const char *cmd; /* Command to execute */ + const char *fdt_fname; /* Filename of FDT binary */ enum exit_type_id exit_type; /* How we exited U-Boot */ const char *parse_err; /* Error to report from parsing */ int argc; /* Program arguments */ diff --git a/arch/sandbox/include/asm/u-boot.h b/arch/sandbox/include/asm/u-boot.h index de8120a..5bea1f2 100644 --- a/arch/sandbox/include/asm/u-boot.h +++ b/arch/sandbox/include/asm/u-boot.h @@ -36,26 +36,8 @@ #ifndef _U_BOOT_H_ #define _U_BOOT_H_ 1 -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - phys_size_t bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ - unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ - unsigned long bi_intfreq; /* Internal Freq, in MHz */ - unsigned long bi_busfreq; /* Bus Freq, in MHz */ - unsigned int bi_baudrate; /* Console Baudrate */ - unsigned long bi_boot_params; /* where this board expects params */ - struct /* RAM configuration */ - { - ulong start; - ulong size; - } bi_dram[CONFIG_NR_DRAM_BANKS]; -} bd_t; +/* Use the generic board which requires a unified bd_info */ +#include <asm-generic/u-boot.h> /* For image.h:image_check_target_arch() */ #define IH_ARCH_DEFAULT IH_ARCH_SANDBOX diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index fbe579b..3aad574 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -27,7 +27,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).o -COBJS-y += board.o COBJS-y += interrupts.o SRCS := $(COBJS-y:.o=.c) diff --git a/arch/sandbox/lib/board.c b/arch/sandbox/lib/board.c deleted file mode 100644 index 3752fab..0000000 --- a/arch/sandbox/lib/board.c +++ /dev/null @@ -1,285 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * - * (C) Copyright 2002-2006 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * This file was taken from ARM and changed to remove things we don't - * need. This is most of it, so have tried to avoid being over-zealous! - * For example, we want to have an emulation of the 'DRAM' used by - * U-Boot. - * - * has been talk upstream of unifying the architectures w.r.t board.c, - * so the less change here the better. - */ - -#include <common.h> -#include <command.h> -#include <malloc.h> -#include <stdio_dev.h> -#include <timestamp.h> -#include <version.h> -#include <serial.h> - -#include <os.h> - -DECLARE_GLOBAL_DATA_PTR; - -static gd_t gd_mem; - -/************************************************************************ - * Init Utilities * - ************************************************************************ - * Some of this code should be moved into the core functions, - * or dropped completely, - * but let's get it working (again) first... - */ - -static int display_banner(void) -{ - display_options(); - - return 0; -} - -/** - * Configure and report on the DRAM configuration, which in our case is - * fairly simple. - */ -static int display_dram_config(void) -{ - ulong size = 0; - int i; - - debug("RAM Configuration:\n"); - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { -#ifdef DEBUG - printf("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); - print_size(gd->bd->bi_dram[i].size, "\n"); -#endif - size += gd->bd->bi_dram[i].size; - } - puts("DRAM: "); - print_size(size, "\n"); - return 0; -} - -/* - * Breathe some life into the board... - * - * Initialize a serial port as console, and carry out some hardware - * tests. - * - * The first part of initialization is running from Flash memory; - * its main purpose is to initialize the RAM so that we - * can relocate the monitor code to RAM. - */ - -/* - * All attempts to come up with a "common" initialization sequence - * that works for all boards and architectures failed: some of the - * requirements are just _too_ different. To get rid of the resulting - * mess of board dependent #ifdef'ed code we now make the whole - * initialization sequence configurable to the user. - * - * The requirements for any new initalization function is simple: it - * receives a pointer to the "global data" structure as it's only - * argument, and returns an integer return code, where 0 means - * "continue" and != 0 means "fatal error, hang the system". - */ -typedef int (init_fnc_t) (void); - -void __dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = 0; - gd->bd->bi_dram[0].size = gd->ram_size; -} - -void dram_init_banksize(void) - __attribute__((weak, alias("__dram_init_banksize"))); - -init_fnc_t *init_sequence[] = { -#if defined(CONFIG_ARCH_CPU_INIT) - arch_cpu_init, /* basic arch cpu dependent setup */ -#endif -#if defined(CONFIG_BOARD_EARLY_INIT_F) - board_early_init_f, -#endif - timer_init, /* initialize timer */ - env_init, /* initialize environment */ - serial_init, /* serial communications setup */ - console_init_f, /* stage 1 init of console */ - sandbox_early_getopt_check, /* process command line flags (err/help) */ - display_banner, /* say that we are here */ -#if defined(CONFIG_DISPLAY_CPUINFO) - print_cpuinfo, /* display cpu info (and speed) */ -#endif -#if defined(CONFIG_DISPLAY_BOARDINFO) - checkboard, /* display board info */ -#endif - dram_init, /* configure available RAM banks */ - NULL, -}; - -void board_init_f(ulong bootflag) -{ - init_fnc_t **init_fnc_ptr; - uchar *mem; - unsigned long addr_sp, addr, size; - - gd = &gd_mem; - assert(gd); - - memset((void *)gd, 0, sizeof(gd_t)); - -#if defined(CONFIG_OF_EMBED) - /* Get a pointer to the FDT */ - gd->fdt_blob = _binary_dt_dtb_start; -#elif defined(CONFIG_OF_SEPARATE) - /* FDT is at end of image */ - gd->fdt_blob = (void *)(_end_ofs + _TEXT_BASE); -#endif - - for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { - if ((*init_fnc_ptr)() != 0) - hang(); - } - - size = CONFIG_SYS_SDRAM_SIZE; - mem = os_malloc(CONFIG_SYS_SDRAM_SIZE); - - assert(mem); - gd->arch.ram_buf = mem; - addr = (ulong)(mem + size); - - /* - * reserve memory for malloc() arena - */ - addr_sp = addr - TOTAL_MALLOC_LEN; - debug("Reserving %dk for malloc() at: %08lx\n", - TOTAL_MALLOC_LEN >> 10, addr_sp); - /* - * (permanently) allocate a Board Info struct - * and a permanent copy of the "global" data - */ - addr_sp -= sizeof(bd_t); - gd->bd = (bd_t *) addr_sp; - debug("Reserving %zu Bytes for Board Info at: %08lx\n", - sizeof(bd_t), addr_sp); - - /* Ram ist board specific, so move it to board code ... */ - dram_init_banksize(); - display_dram_config(); /* and display it */ - - /* We don't relocate, so just run the post-relocation code */ - board_init_r(NULL, 0); - - /* NOTREACHED - no way out of command loop except booting */ -} - -/************************************************************************ - * - * This is the next part if the initialization sequence: we are now - * running from RAM and have a "normal" C environment, i. e. global - * data can be written, BSS has been cleared, the stack size in not - * that critical any more, etc. - * - ************************************************************************ - */ - -void board_init_r(gd_t *id, ulong dest_addr) -{ - - if (id) - gd = id; - - gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ - - serial_initialize(); - -#ifdef CONFIG_POST - post_output_backlog(); -#endif - - /* The Malloc area is at the top of simulated DRAM */ - mem_malloc_init((ulong)gd->arch.ram_buf + gd->ram_size - - TOTAL_MALLOC_LEN, TOTAL_MALLOC_LEN); - - /* initialize environment */ - env_relocate(); - - stdio_init(); /* get the devices list going. */ - - jumptable_init(); - - console_init_r(); /* fully init console as a device */ - -#if defined(CONFIG_DISPLAY_BOARDINFO_LATE) - checkboard(); -#endif - -#if defined(CONFIG_ARCH_MISC_INIT) - /* miscellaneous arch dependent initialisations */ - arch_misc_init(); -#endif -#if defined(CONFIG_MISC_INIT_R) - /* miscellaneous platform dependent initialisations */ - misc_init_r(); -#endif - - /* set up exceptions */ - interrupt_init(); - /* enable exceptions */ - enable_interrupts(); - -#ifdef CONFIG_BOARD_LATE_INIT - board_late_init(); -#endif - -#ifdef CONFIG_POST - post_run(NULL, POST_RAM | post_bootmode_get(0)); -#endif - - sandbox_main_loop_init(); - - /* - * For now, run the main loop. Later we might let this be done - * in the main program. - */ - while (1) - main_loop(); - - /* NOTREACHED - no way out of command loop except booting */ -} - -void hang(void) -{ - puts("### ERROR ### Please RESET the board ###\n"); - for (;;) - ; -} diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index 6e43acf..0789ed0 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -200,12 +200,3 @@ void sh_generic_init(void) main_loop(); } } - -/***********************************************************************/ - -void hang(void) -{ - puts("Board ERROR\n"); - for (;;) - ; -} diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c index 79fb4c8..fbc535f 100644 --- a/arch/sparc/lib/board.c +++ b/arch/sparc/lib/board.c @@ -411,13 +411,4 @@ void board_init_f(ulong bootflag) } -void hang(void) -{ - puts("### ERROR ### Please RESET the board ###\n"); -#ifdef CONFIG_SHOW_BOOT_PROGRESS - bootstage_error(BOOTSTAGE_ID_NEED_RESET); -#endif - for (;;) ; -} - /************************************************************************/ diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index 786009c..b4fe6c9 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -113,7 +113,7 @@ int dram_init_f(void) return 0; } -int dram_init(void) +int dram_init_banksize(void) { int i, j; @@ -132,3 +132,8 @@ int dram_init(void) } return 0; } + +int dram_init(void) +{ + return dram_init_banksize(); +} diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index f372898..228c2c8 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -264,10 +264,3 @@ void board_init_r(gd_t *id, ulong dest_addr) /* NOTREACHED - no way out of command loop except booting */ } - -void hang(void) -{ - puts("### ERROR ### Please RESET the board ###\n"); - for (;;) - ; -} |