diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/Kconfig | 5 | ||||
| -rw-r--r-- | arch/arm/cpu/arm1136/mx31/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/arm1136/mx31/relocate.S | 23 | ||||
| -rw-r--r-- | arch/arm/cpu/arm1136/mx35/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/arm1136/mx35/relocate.S | 23 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 29 | ||||
| -rw-r--r-- | arch/arm/imx-common/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/imx-common/cmd_dek.c | 91 | ||||
| -rw-r--r-- | arch/arm/imx-common/cpu.c | 10 | ||||
| -rw-r--r-- | arch/arm/imx-common/timer.c | 17 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-imx/cpu.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx5/sys_proto.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/crm_regs.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 10 |
15 files changed, 224 insertions, 2 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bc55e5b..8472d41 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -465,6 +465,10 @@ config TARGET_WANDBOARD bool "Support wandboard" select CPU_V7 +config TARGET_WARP + bool "Support WaRP" + select CPU_V7 + config TARGET_TITANIUM bool "Support titanium" select CPU_V7 @@ -842,6 +846,7 @@ source "board/ttcontrol/vision2/Kconfig" source "board/udoo/Kconfig" source "board/vpac270/Kconfig" source "board/wandboard/Kconfig" +source "board/warp/Kconfig" source "board/woodburn/Kconfig" source "board/xaeniax/Kconfig" source "board/xilinx/zynqmp/Kconfig" diff --git a/arch/arm/cpu/arm1136/mx31/Makefile b/arch/arm/cpu/arm1136/mx31/Makefile index 9670ed9..dcbd570 100644 --- a/arch/arm/cpu/arm1136/mx31/Makefile +++ b/arch/arm/cpu/arm1136/mx31/Makefile @@ -8,3 +8,7 @@ obj-y += generic.o obj-y += timer.o obj-y += devices.o + +ifndef CONFIG_SPL_BUILD +obj-y += relocate.o +endif diff --git a/arch/arm/cpu/arm1136/mx31/relocate.S b/arch/arm/cpu/arm1136/mx31/relocate.S new file mode 100644 index 0000000..1c556df --- /dev/null +++ b/arch/arm/cpu/arm1136/mx31/relocate.S @@ -0,0 +1,23 @@ +/* + * relocate - i.MX31-specific vector relocation + * + * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> + +/* + * The i.MX31 SoC is very specific with respect to exceptions: it + * does not provide RAM at the high vectors address (0xFFFF0000), + * thus only the low address (0x00000000) is useable; but that is + * in ROM, so let's avoid relocating the vectors. + */ + .section .text.relocate_vectors,"ax",%progbits + +ENTRY(relocate_vectors) + + bx lr + +ENDPROC(relocate_vectors) diff --git a/arch/arm/cpu/arm1136/mx35/Makefile b/arch/arm/cpu/arm1136/mx35/Makefile index c533215..796db9c 100644 --- a/arch/arm/cpu/arm1136/mx35/Makefile +++ b/arch/arm/cpu/arm1136/mx35/Makefile @@ -10,3 +10,7 @@ obj-y += generic.o obj-y += timer.o obj-y += mx35_sdram.o + +ifndef CONFIG_SPL_BUILD +obj-y += relocate.o +endif diff --git a/arch/arm/cpu/arm1136/mx35/relocate.S b/arch/arm/cpu/arm1136/mx35/relocate.S new file mode 100644 index 0000000..43003f8 --- /dev/null +++ b/arch/arm/cpu/arm1136/mx35/relocate.S @@ -0,0 +1,23 @@ +/* + * relocate - i.MX35-specific vector relocation + * + * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> + +/* + * The i.MX35 SoC is very specific with respect to exceptions: it + * does not provide RAM at the high vectors address (0xFFFF0000), + * thus only the low address (0x00000000) is useable; but that is + * in ROM, so let's avoid relocating the vectors. + */ + .section .text.relocate_vectors,"ax",%progbits + +ENTRY(relocate_vectors) + + bx lr + +ENDPROC(relocate_vectors) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index e599a12..ef02972 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -230,6 +230,11 @@ static void imx_set_wdog_powerdown(bool enable) struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; +#ifdef CONFIG_MX6SX + struct wdog_regs *wdog3 = (struct wdog_regs *)WDOG3_BASE_ADDR; + writew(enable, &wdog3->wmcr); +#endif + /* Write to the PDE (Power Down Enable) bit */ writew(enable, &wdog1->wmcr); writew(enable, &wdog2->wmcr); @@ -255,6 +260,23 @@ static void clear_mmdc_ch_mask(void) writel(0, &mxc_ccm->ccdr); } +static void init_bandgap(void) +{ + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; + /* + * Ensure the bandgap has stabilized. + */ + while (!(readl(&anatop->ana_misc0) & 0x80)) + ; + /* + * For best noise performance of the analog blocks using the + * outputs of the bandgap, the reftop_selfbiasoff bit should + * be set. + */ + writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set); +} + + #ifdef CONFIG_MX6SL static void set_preclk_from_osc(void) { @@ -275,6 +297,13 @@ int arch_cpu_init(void) clear_mmdc_ch_mask(); /* + * Disable self-bias circuit in the analog bandap. + * The self-bias circuit is used by the bandgap during startup. + * This bit should be set after the bandgap has initialized. + */ + init_bandgap(); + + /* * When low freq boot is enabled, ROM will not set AHB * freq, so we need to ensure AHB freq is 132MHz in such * scenario. diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index 25a9d4c..606482f 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o endif obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o +obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o quiet_cmd_cpp_cfg = CFGS $@ cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $< diff --git a/arch/arm/imx-common/cmd_dek.c b/arch/arm/imx-common/cmd_dek.c new file mode 100644 index 0000000..d93d5fb --- /dev/null +++ b/arch/arm/imx-common/cmd_dek.c @@ -0,0 +1,91 @@ +/* + * Copyright 2008-2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Command for encapsulating DEK blob + */ + +#include <common.h> +#include <command.h> +#include <environment.h> +#include <malloc.h> +#include <asm/byteorder.h> +#include <linux/compiler.h> +#include <fsl_sec.h> +#include <asm/arch/clock.h> + +DECLARE_GLOBAL_DATA_PTR; + +/** +* blob_dek() - Encapsulate the DEK as a blob using CAM's Key +* @src: - Address of data to be encapsulated +* @dst: - Desination address of encapsulated data +* @len: - Size of data to be encapsulated +* +* Returns zero on success,and negative on error. +*/ +static int blob_encap_dek(const u8 *src, u8 *dst, u32 len) +{ + int ret = 0; + u32 jr_size = 4; + + u32 out_jr_size = sec_in32(CONFIG_SYS_FSL_JR0_ADDR + 0x102c); + if (out_jr_size != jr_size) { + hab_caam_clock_enable(1); + sec_init(); + } + + if (!((len == 128) | (len == 192) | (len == 256))) { + debug("Invalid DEK size. Valid sizes are 128, 192 and 256b\n"); + return -1; + } + + len /= 8; + ret = blob_dek(src, dst, len); + + return ret; +} + +/** + * do_dek_blob() - Handle the "dek_blob" command-line command + * @cmdtp: Command data struct pointer + * @flag: Command flag + * @argc: Command-line argument count + * @argv: Array of command-line arguments + * + * Returns zero on success, CMD_RET_USAGE in case of misuse and negative + * on error. + */ +static int do_dek_blob(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +{ + uint32_t src_addr, dst_addr, len; + uint8_t *src_ptr, *dst_ptr; + int ret = 0; + + if (argc != 4) + return CMD_RET_USAGE; + + src_addr = simple_strtoul(argv[1], NULL, 16); + dst_addr = simple_strtoul(argv[2], NULL, 16); + len = simple_strtoul(argv[3], NULL, 10); + + src_ptr = map_sysmem(src_addr, len/8); + dst_ptr = map_sysmem(dst_addr, BLOB_SIZE(len/8)); + + ret = blob_encap_dek(src_ptr, dst_ptr, len); + + return ret; +} + +/***************************************************/ +static char dek_blob_help_text[] = + "src dst len - Encapsulate and create blob of data\n" + " $len bits long at address $src and\n" + " store the result at address $dst.\n"; + +U_BOOT_CMD( + dek_blob, 4, 1, do_dek_blob, + "Data Encryption Key blob encapsulation", + dek_blob_help_text +); diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 28ccd29..067d08f 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -24,13 +24,16 @@ #include <fsl_esdhc.h> #endif -char *get_reset_cause(void) +static u32 reset_cause = -1; + +static char *get_reset_cause(void) { u32 cause; struct src *src_regs = (struct src *)SRC_BASE_ADDR; cause = readl(&src_regs->srsr); writel(cause, &src_regs->srsr); + reset_cause = cause; switch (cause) { case 0x00001: @@ -53,6 +56,11 @@ char *get_reset_cause(void) } } +u32 get_imx_reset_cause(void) +{ + return reset_cause; +} + #if defined(CONFIG_MX53) || defined(CONFIG_MX6) #if defined(CONFIG_MX53) #define MEMCTL_BASE ESDCTL_BASE_ADDR diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index 65ef60b..e522990 100644 --- a/arch/arm/imx-common/timer.c +++ b/arch/arm/imx-common/timer.c @@ -176,3 +176,20 @@ ulong get_tbclk(void) { return gpt_get_clk(); } + +/* + * This function is intended for SHORT delays only. + * It will overflow at around 10 seconds @ 400MHz, + * or 20 seconds @ 200MHz. + */ +unsigned long usec2ticks(unsigned long usec) +{ + ulong ticks; + + if (usec < 1000) + ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000; + else + ticks = ((usec / 10) * (get_tbclk() / 100000)); + + return ticks; +} diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 254136e..4715f4e 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -17,3 +17,5 @@ #define CS0_64M_CS1_64M 1 #define CS0_64M_CS1_32M_CS2_32M 2 #define CS0_32M_CS1_32M_CS2_32M_CS3_32M 3 + +u32 get_imx_reset_cause(void); diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index ac7705b..b06c77f 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -24,6 +24,5 @@ void set_chipselect_size(int const); int fecmxc_initialize(bd_t *bis); u32 get_ahb_clk(void); u32 get_periph_clk(void); -char *get_reset_cause(void); #endif diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 39f3c07..0592ce0 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -1063,4 +1063,6 @@ struct mxc_ccm_reg { #define BF_ANADIG_PFD_528_PFD0_FRAC(v) \ (((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC) +#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008 + #endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index ae88b6e..9a4ad8b 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -215,6 +215,10 @@ #define AIPS2_OFF_BASE_ADDR (ATZ2_BASE_ADDR + 0x80000) #define CAAM_BASE_ADDR (ATZ2_BASE_ADDR) #define ARM_BASE_ADDR (ATZ2_BASE_ADDR + 0x40000) + +#define CONFIG_SYS_FSL_SEC_ADDR CAAM_BASE_ADDR +#define CONFIG_SYS_FSL_JR0_ADDR (CAAM_BASE_ADDR + 0x1000) + #define USB_PL301_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x0000) #define USB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000) diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 9ded3d8..6ba1034 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -31,7 +31,12 @@ enum { MX6_PAD_SD2_DAT1__USDHC2_DAT1 = IOMUX_PAD(0x0568, 0x0260, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT2__USDHC2_DAT2 = IOMUX_PAD(0x056C, 0x0264, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT3__USDHC2_DAT3 = IOMUX_PAD(0x0570, 0x0268, 0, 0x0000, 0, 0), + MX6_PAD_SD2_DAT4__USDHC2_DAT4 = IOMUX_PAD(0X0574, 0X026C, 0, 0X0000, 0, 0), + MX6_PAD_SD2_DAT5__USDHC2_DAT5 = IOMUX_PAD(0X0578, 0X0270, 0, 0X0000, 0, 0), + MX6_PAD_SD2_DAT6__USDHC2_DAT6 = IOMUX_PAD(0X057C, 0X0274, 0, 0X0000, 0, 0), + MX6_PAD_SD2_DAT7__USDHC2_DAT7 = IOMUX_PAD(0X0580, 0X0278, 0, 0X0000, 0, 0), MX6_PAD_SD2_DAT7__GPIO_5_0 = IOMUX_PAD(0x0580, 0x0278, 5, 0x0000, 0, 0), + MX6_PAD_SD2_RST__USDHC2_RST = IOMUX_PAD(0x0584, 0x027C, 0, 0x0000, 0, 0), MX6_PAD_SD3_CLK__USDHC3_CLK = IOMUX_PAD(0x0588, 0x0280, 0, 0x0000, 0, 0), MX6_PAD_SD3_CMD__USDHC3_CMD = IOMUX_PAD(0x058C, 0x0284, 0, 0x0000, 0, 0), MX6_PAD_SD3_DAT0__USDHC3_DAT0 = IOMUX_PAD(0x0590, 0x0288, 0, 0x0000, 0, 0), @@ -58,5 +63,10 @@ enum { MX6_PAD_KEY_COL4__USB_USBOTG1_PWR = IOMUX_PAD(0x0484, 0x017C, 6, 0x0000, 0, 0), MX6_PAD_KEY_COL5__USB_USBOTG2_PWR = IOMUX_PAD(0x0488, 0x0180, 6, 0x0000, 0, 0), + + MX6_PAD_I2C1_SDA__I2C1_SDA = IOMUX_PAD(0x0450, 0x0160, 0x10, 0x0720, 2, 0), + MX6_PAD_I2C1_SDA__GPIO_3_13 = IOMUX_PAD(0x0450, 0x0160, 5, 0x0000, 0, 0), + MX6_PAD_I2C1_SCL__I2C1_SCL = IOMUX_PAD(0x044C, 0x015C, 0x10, 0x071C, 2, 0), + MX6_PAD_I2C1_SCL__GPIO_3_12 = IOMUX_PAD(0x044C, 0x015C, 5, 0x0000, 0, 0), }; #endif /* __ASM_ARCH_MX6_MX6SL_PINS_H__ */ |