diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-exynos/cpu.h | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-exynos/ehci.h (renamed from arch/arm/include/asm/arch-exynos/ehci-s5p.h) | 10 |
2 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index b1e22f2..dee039d 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -46,6 +46,7 @@ #define EXYNOS4_USBOTG_BASE 0x12480000 #define EXYNOS4_MMC_BASE 0x12510000 #define EXYNOS4_SROMC_BASE 0x12570000 +#define EXYNOS4_USB_HOST_EHCI_BASE 0x12580000 #define EXYNOS4_USBPHY_BASE 0x125B0000 #define EXYNOS4_UART_BASE 0x13800000 #define EXYNOS4_ADC_BASE 0x13910000 @@ -69,6 +70,7 @@ #define EXYNOS5_DMC_CTRL_BASE 0x10DD0000 #define EXYNOS5_GPIO_PART1_BASE 0x11400000 #define EXYNOS5_MIPI_DSIM_BASE 0x11D00000 +#define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000 #define EXYNOS5_MMC_BASE 0x12200000 #define EXYNOS5_SROMC_BASE 0x12250000 #define EXYNOS5_USBOTG_BASE 0x12480000 @@ -159,6 +161,7 @@ SAMSUNG_BASE(swreset, SWRESET) SAMSUNG_BASE(timer, PWMTIMER_BASE) SAMSUNG_BASE(uart, UART_BASE) SAMSUNG_BASE(usb_phy, USBPHY_BASE) +SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE) SAMSUNG_BASE(usb_otg, USBOTG_BASE) SAMSUNG_BASE(watchdog, WATCHDOG_BASE) SAMSUNG_BASE(power, POWER_BASE) diff --git a/arch/arm/include/asm/arch-exynos/ehci-s5p.h b/arch/arm/include/asm/arch-exynos/ehci.h index 68feb85..8aeff8a 100644 --- a/arch/arm/include/asm/arch-exynos/ehci-s5p.h +++ b/arch/arm/include/asm/arch-exynos/ehci.h @@ -1,5 +1,5 @@ /* - * SAMSUNG S5P USB HOST EHCI Controller + * SAMSUNG EXYNOS USB HOST EHCI Controller * * Copyright (C) 2012 Samsung Electronics Co.Ltd * Vivek Gautam <gautam.vivek@samsung.com> @@ -20,8 +20,8 @@ * MA 02110-1301 USA */ -#ifndef __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__ -#define __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__ +#ifndef __ASM_ARM_ARCH_EHCI_H__ +#define __ASM_ARM_ARCH_EHCI_H__ #define CLK_24MHZ 5 @@ -43,7 +43,7 @@ #define EHCICTRL_ENAINCR16 (1 << 26) /* Register map for PHY control */ -struct s5p_usb_phy { +struct exynos_usb_phy { unsigned int usbphyctrl0; unsigned int usbphytune0; unsigned int reserved1[2]; @@ -63,4 +63,4 @@ struct s5p_usb_phy { /* Switch on the VBUS power. */ int board_usb_vbus_init(void); -#endif /* __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__ */ +#endif /* __ASM_ARM_ARCH_EHCI_H__ */ |