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-rw-r--r--arch/arm/cpu/arm926ejs/mx25/generic.c1
-rw-r--r--arch/arm/cpu/armv7/mx6/Kconfig2
-rw-r--r--arch/arm/cpu/armv7/mx6/Makefile1
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c8
-rw-r--r--arch/arm/cpu/armv7/mx7/Kconfig2
-rw-r--r--arch/arm/cpu/armv7/mx7/soc.c8
-rw-r--r--arch/arm/imx-common/Kconfig3
-rw-r--r--arch/arm/imx-common/Makefile1
-rw-r--r--arch/arm/imx-common/hab.c (renamed from arch/arm/cpu/armv7/mx6/hab.c)25
-rw-r--r--arch/arm/imx-common/timer.c75
-rw-r--r--arch/arm/include/asm/arch-imx/cpu.h12
-rw-r--r--arch/arm/include/asm/arch-mx25/imx-regs.h4
-rw-r--r--arch/arm/include/asm/arch-mx5/imx-regs.h11
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h39
-rw-r--r--arch/arm/include/asm/imx-common/hab.h (renamed from arch/arm/include/asm/arch-mx6/hab.h)11
15 files changed, 101 insertions, 102 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 8912098..0b1a8f4 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -13,6 +13,7 @@
#include <div64.h>
#include <netdev.h>
#include <asm/io.h>
+#include <asm/arch-imx/cpu.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 0b02e9e..273e209 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -23,10 +23,12 @@ config MX6SL
bool
config MX6SX
+ select ROM_UNIFIED_SECTIONS
bool
config MX6UL
select SYS_L2CACHE_OFF
+ select ROM_UNIFIED_SECTIONS
bool
choice
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile
index bf6effc..8af191d 100644
--- a/arch/arm/cpu/armv7/mx6/Makefile
+++ b/arch/arm/cpu/armv7/mx6/Makefile
@@ -9,5 +9,4 @@
obj-y := soc.o clock.o
obj-$(CONFIG_SPL_BUILD) += ddr.o
-obj-$(CONFIG_SECURE_BOOT) += hab.o
obj-$(CONFIG_MP) += mp.o
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 282302b..d545021 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -15,6 +15,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
#include <asm/imx-common/dma.h>
+#include <asm/imx-common/hab.h>
#include <stdbool.h>
#include <asm/arch/mxc_hdmi.h>
#include <asm/arch/crm_regs.h>
@@ -48,6 +49,13 @@ U_BOOT_DEVICE(imx6_thermal) = {
};
#endif
+#if defined(CONFIG_SECURE_BOOT)
+struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
+ .bank = 0,
+ .word = 6,
+};
+#endif
+
u32 get_nr_cpus(void)
{
struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig
index ea19e5c..97d6238 100644
--- a/arch/arm/cpu/armv7/mx7/Kconfig
+++ b/arch/arm/cpu/armv7/mx7/Kconfig
@@ -2,9 +2,11 @@ if ARCH_MX7
config MX7
bool
+ select ROM_UNIFIED_SECTIONS
default y
config MX7D
+ select ROM_UNIFIED_SECTIONS
bool
choice
diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c
index 2ed05ea..a6224af 100644
--- a/arch/arm/cpu/armv7/mx7/soc.c
+++ b/arch/arm/cpu/armv7/mx7/soc.c
@@ -11,6 +11,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
#include <asm/imx-common/dma.h>
+#include <asm/imx-common/hab.h>
#include <asm/arch/crm_regs.h>
#include <dm.h>
#include <imx_thermal.h>
@@ -28,6 +29,13 @@ U_BOOT_DEVICE(imx7_thermal) = {
};
#endif
+#if defined(CONFIG_SECURE_BOOT)
+struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
+ .bank = 1,
+ .word = 3,
+};
+#endif
+
/*
* OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
* defines a 2-bit SPEED_GRADING
diff --git a/arch/arm/imx-common/Kconfig b/arch/arm/imx-common/Kconfig
index 37b3752..229623922 100644
--- a/arch/arm/imx-common/Kconfig
+++ b/arch/arm/imx-common/Kconfig
@@ -1,2 +1,5 @@
config IMX_CONFIG
string
+
+config ROM_UNIFIED_SECTIONS
+ bool
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 1698d06..4abffee 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -27,6 +27,7 @@ ifeq ($(SOC),$(filter $(SOC),mx6 mx7))
obj-y += cache.o init.o
obj-$(CONFIG_CMD_SATA) += sata.o
obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o
+obj-$(CONFIG_SECURE_BOOT) += hab.o
endif
ifeq ($(SOC),$(filter $(SOC),vf610))
obj-y += ddrmc-vf610.o
diff --git a/arch/arm/cpu/armv7/mx6/hab.c b/arch/arm/imx-common/hab.c
index 27cabe4..8bbcc22 100644
--- a/arch/arm/cpu/armv7/mx6/hab.c
+++ b/arch/arm/imx-common/hab.c
@@ -5,11 +5,13 @@
*/
#include <common.h>
+#include <config.h>
+#include <fuse.h>
#include <asm/io.h>
#include <asm/system.h>
-#include <asm/arch/hab.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
+#include <asm/imx-common/hab.h>
/* -------- start of HAB API updates ------------*/
@@ -79,6 +81,8 @@
#define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
#define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
+#define IS_HAB_ENABLED_BIT \
+ (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2)
/*
* +------------+ 0x0 (DDR_UIMAGE_START) -
@@ -260,13 +264,18 @@ uint8_t hab_engines[16] = {
bool is_hab_enabled(void)
{
- struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
- struct fuse_bank *bank = &ocotp->bank[0];
- struct fuse_bank0_regs *fuse =
- (struct fuse_bank0_regs *)bank->fuse_regs;
- uint32_t reg = readl(&fuse->cfg5);
+ struct imx_sec_config_fuse_t *fuse =
+ (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
+ uint32_t reg;
+ int ret;
+
+ ret = fuse_read(fuse->bank, fuse->word, &reg);
+ if (ret) {
+ puts("\nSecure boot fuse read error\n");
+ return ret;
+ }
- return (reg & 0x2) == 0x2;
+ return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
}
static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
@@ -414,7 +423,7 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
* crash.
*/
/* Check MMU enabled */
- if (get_cr() & CR_M) {
+ if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
if (is_cpu_type(MXC_CPU_MX6Q) ||
is_cpu_type(MXC_CPU_MX6D)) {
/*
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index 1a88ce6..92c7218 100644
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -66,25 +66,6 @@ static inline ulong gpt_get_clk(void)
return MXC_CLK32;
#endif
}
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
- ulong gpt_clk = gpt_get_clk();
-
- tick *= CONFIG_SYS_HZ;
- do_div(tick, gpt_clk);
-
- return tick;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long usec)
-{
- ulong gpt_clk = gpt_get_clk();
-
- usec = usec * gpt_clk + 999999;
- do_div(usec, 1000000);
-
- return usec;
-}
int timer_init(void)
{
@@ -130,44 +111,9 @@ int timer_init(void)
return 0;
}
-unsigned long long get_ticks(void)
+unsigned long timer_read_counter(void)
{
- ulong now = __raw_readl(&cur_gpt->counter); /* current tick value */
-
- /* increment tbu if tbl has rolled over */
- if (now < gd->arch.tbl)
- gd->arch.tbu++;
- gd->arch.tbl = now;
- return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
-}
-
-ulong get_timer_masked(void)
-{
- /*
- * get_ticks() returns a long long (64 bit), it wraps in
- * 2^64 / GPT_CLK = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
- * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
- * 5 * 10^6 days - long enough.
- */
- return tick_to_time(get_ticks());
-}
-
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-/* delay x useconds AND preserve advance timstamp value */
-void __udelay(unsigned long usec)
-{
- unsigned long long tmp;
- ulong tmo;
-
- tmo = us_to_tick(usec);
- tmp = get_ticks() + tmo; /* get current timestamp */
-
- while (get_ticks() < tmp) /* loop till event */
- /*NOP*/;
+ return __raw_readl(&cur_gpt->counter); /* current tick value */
}
/*
@@ -178,20 +124,3 @@ ulong get_tbclk(void)
{
return gpt_get_clk();
}
-
-/*
- * This function is intended for SHORT delays only.
- * It will overflow at around 10 seconds @ 400MHz,
- * or 20 seconds @ 200MHz.
- */
-unsigned long usec2ticks(unsigned long usec)
-{
- ulong ticks;
-
- if (usec < 1000)
- ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
- else
- ticks = ((usec / 10) * (get_tbclk() / 100000));
-
- return ticks;
-}
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 7e681e9..8a75902 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -27,6 +27,18 @@
#define MXC_SOC_MX6 0x60
#define MXC_SOC_MX7 0x70
+#define CHIP_REV_1_0 0x10
+#define CHIP_REV_1_1 0x11
+#define CHIP_REV_1_2 0x12
+#define CHIP_REV_1_5 0x15
+#define CHIP_REV_2_0 0x20
+#define CHIP_REV_2_5 0x25
+#define CHIP_REV_3_0 0x30
+
+#define BOARD_REV_1_0 0x0
+#define BOARD_REV_2_0 0x1
+#define BOARD_VER_OFFSET 0x8
+
#define CS0_128 0
#define CS0_64M_CS1_64M 1
#define CS0_64M_CS1_32M_CS2_32M 2
diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h
index 78c4e9b..1b00ed7 100644
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -526,8 +526,4 @@ struct cspi_regs {
IMX_CSPI2_BASE, \
IMX_CSPI3_BASE
-#define CHIP_REV_1_0 0x10
-#define CHIP_REV_1_1 0x11
-#define CHIP_REV_1_2 0x12
-
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 5f0e1e6..e73cc07 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -291,17 +291,6 @@
#define DP_MFD_216 (4 - 1)
#define DP_MFN_216 3
-#define CHIP_REV_1_0 0x10
-#define CHIP_REV_1_1 0x11
-#define CHIP_REV_2_0 0x20
-#define CHIP_REV_2_5 0x25
-#define CHIP_REV_3_0 0x30
-
-#define BOARD_REV_1_0 0x0
-#define BOARD_REV_2_0 0x1
-
-#define BOARD_VER_OFFSET 0x8
-
#define IMX_IIM_BASE (IIM_BASE_ADDR)
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 74512ac..0de1ff9 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -325,10 +325,6 @@
#define WDOG3_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL) ? \
MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)
-#define CHIP_REV_1_0 0x10
-#define CHIP_REV_1_2 0x12
-#define CHIP_REV_1_5 0x15
-#define CHIP_REV_2_0 0x20
#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
#define IRAM_SIZE 0x00040000
#else
@@ -413,10 +409,37 @@ struct src {
};
/* GPR1 bitfields */
+#define IOMUXC_GPR1_APP_CLK_REQ_N BIT(30)
+#define IOMUXC_GPR1_PCIE_EXIT_L1 BIT(28)
+#define IOMUXC_GPR1_PCIE_RDY_L23 BIT(27)
+#define IOMUXC_GPR1_PCIE_ENTER_L1 BIT(26)
+#define IOMUXC_GPR1_MIPI_COLOR_SW BIT(25)
+#define IOMUXC_GPR1_DPI_OFF BIT(24)
+#define IOMUXC_GPR1_EXC_MON_SLVE BIT(22)
#define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET 21
#define IOMUXC_GPR1_ENET_CLK_SEL_MASK (1 << IOMUXC_GPR1_ENET_CLK_SEL_OFFSET)
+#define IOMUXC_GPR1_MIPI_IPU2_MUX_IOMUX BIT(20)
+#define IOMUXC_GPR1_MIPI_IPU1_MUX_IOMUX BIT(19)
+#define IOMUXC_GPR1_PCIE_TEST_PD BIT(18)
+#define IOMUXC_GPR1_IPU_VPU_MUX_IPU2 BIT(17)
+#define IOMUXC_GPR1_PCIE_REF_CLK_EN BIT(16)
+#define IOMUXC_GPR1_USB_EXP_MODE BIT(15)
+#define IOMUXC_GPR1_PCIE_INT BIT(14)
#define IOMUXC_GPR1_USB_OTG_ID_OFFSET 13
#define IOMUXC_GPR1_USB_OTG_ID_SEL_MASK (1 << IOMUXC_GPR1_USB_OTG_ID_OFFSET)
+#define IOMUXC_GPR1_GINT BIT(12)
+#define IOMUXC_GPR1_ADDRS3_MASK (0x3 << 10)
+#define IOMUXC_GPR1_ADDRS3_32MB (0x0 << 10)
+#define IOMUXC_GPR1_ADDRS3_64MB (0x1 << 10)
+#define IOMUXC_GPR1_ADDRS3_128MB (0x2 << 10)
+#define IOMUXC_GPR1_ACT_CS3 BIT(9)
+#define IOMUXC_GPR1_ADDRS2_MASK (0x3 << 7)
+#define IOMUXC_GPR1_ACT_CS2 BIT(6)
+#define IOMUXC_GPR1_ADDRS1_MASK (0x3 << 4)
+#define IOMUXC_GPR1_ACT_CS1 BIT(3)
+#define IOMUXC_GPR1_ADDRS0_OFFSET (1)
+#define IOMUXC_GPR1_ADDRS0_MASK (0x3 << 1)
+#define IOMUXC_GPR1_ACT_CS0 BIT(0)
/* GPR3 bitfields */
#define IOMUXC_GPR3_GPU_DBG_OFFSET 29
@@ -465,6 +488,14 @@ struct src {
#define IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET 2
#define IOMUXC_GPR3_HDMI_MUX_CTL_MASK (3<<IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET)
+/* gpr12 bitfields */
+#define IOMUXC_GPR12_ARMP_IPG_CLK_EN BIT(27)
+#define IOMUXC_GPR12_ARMP_AHB_CLK_EN BIT(26)
+#define IOMUXC_GPR12_ARMP_ATB_CLK_EN BIT(25)
+#define IOMUXC_GPR12_ARMP_APB_CLK_EN BIT(24)
+#define IOMUXC_GPR12_DEVICE_TYPE (0xf << 12)
+#define IOMUXC_GPR12_PCIE_CTL_2 BIT(10)
+#define IOMUXC_GPR12_LOS_LEVEL (0x1f << 4)
struct iomuxc {
#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
diff --git a/arch/arm/include/asm/arch-mx6/hab.h b/arch/arm/include/asm/imx-common/hab.h
index d0eaa67..dab6789 100644
--- a/arch/arm/include/asm/arch-mx6/hab.h
+++ b/arch/arm/include/asm/imx-common/hab.h
@@ -85,6 +85,15 @@ enum hab_context {
HAB_CTX_MAX
};
+struct imx_sec_config_fuse_t {
+ int bank;
+ int word;
+};
+
+#if defined(CONFIG_SECURE_BOOT)
+extern struct imx_sec_config_fuse_t const imx_sec_config_fuse;
+#endif
+
/*Function prototype description*/
typedef enum hab_status hab_rvt_report_event_t(enum hab_status, uint32_t,
uint8_t* , size_t*);
@@ -113,7 +122,7 @@ typedef void hapi_clock_init_t(void);
#define HAB_ENG_RTL 0x77 /* RTL simulation engine */
#define HAB_ENG_SW 0xff /* Software engine */
-#ifdef CONFIG_MX6SX
+#ifdef CONFIG_ROM_UNIFIED_SECTIONS
#define HAB_RVT_BASE 0x00000100
#else
#define HAB_RVT_BASE 0x00000094
generated by cgit v1.1 at 2024-08-23 02:33:47 +0000