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-rw-r--r--arch/arm/include/asm/arch-am33xx/ddr_defs.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 8e69fb6..f95b332 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -65,6 +65,24 @@
#define MT41J128MJT125_PHY_FIFO_WE 0x100
#define MT41J128MJT125_IOCTRL_VALUE 0x18B
+/* Micron MT41J256M8HX-15E */
+#define MT41J256M8HX15E_EMIF_READ_LATENCY 0x06
+#define MT41J256M8HX15E_EMIF_TIM1 0x0888A39B
+#define MT41J256M8HX15E_EMIF_TIM2 0x26337FDA
+#define MT41J256M8HX15E_EMIF_TIM3 0x501F830F
+#define MT41J256M8HX15E_EMIF_SDCFG 0x61C04B32
+#define MT41J256M8HX15E_EMIF_SDREF 0x0000093B
+#define MT41J256M8HX15E_ZQ_CFG 0x50074BE4
+#define MT41J256M8HX15E_DLL_LOCK_DIFF 0x1
+#define MT41J256M8HX15E_RATIO 0x40
+#define MT41J256M8HX15E_INVERT_CLKOUT 0x1
+#define MT41J256M8HX15E_RD_DQS 0x3B
+#define MT41J256M8HX15E_WR_DQS 0x85
+#define MT41J256M8HX15E_PHY_WR_DATA 0xC1
+#define MT41J256M8HX15E_PHY_FIFO_WE 0x100
+#define MT41J256M8HX15E_IOCTRL_VALUE 0x18B
+
+
/**
* Configure SDRAM
*/