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-rw-r--r--arch/arm/cpu/armv7/am33xx/clock.c35
-rw-r--r--arch/arm/cpu/armv7/omap3/board.c28
-rw-r--r--arch/arm/include/asm/setup.h5
-rw-r--r--arch/arm/lib/bootm.c4
4 files changed, 59 insertions, 13 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c
index f870859..bc2abb6 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -115,6 +115,41 @@ static void enable_per_clocks(void)
while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN)
;
+ /* UART1 */
+#ifdef CONFIG_SERIAL2
+ writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
+ while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
+ ;
+#endif /* CONFIG_SERIAL2 */
+
+ /* UART2 */
+#ifdef CONFIG_SERIAL3
+ writel(PRCM_MOD_EN, &cmper->uart2clkctrl);
+ while (readl(&cmper->uart2clkctrl) != PRCM_MOD_EN)
+ ;
+#endif /* CONFIG_SERIAL3 */
+
+ /* UART3 */
+#ifdef CONFIG_SERIAL4
+ writel(PRCM_MOD_EN, &cmper->uart3clkctrl);
+ while (readl(&cmper->uart3clkctrl) != PRCM_MOD_EN)
+ ;
+#endif /* CONFIG_SERIAL4 */
+
+ /* UART4 */
+#ifdef CONFIG_SERIAL5
+ writel(PRCM_MOD_EN, &cmper->uart4clkctrl);
+ while (readl(&cmper->uart4clkctrl) != PRCM_MOD_EN)
+ ;
+#endif /* CONFIG_SERIAL5 */
+
+ /* UART5 */
+#ifdef CONFIG_SERIAL6
+ writel(PRCM_MOD_EN, &cmper->uart5clkctrl);
+ while (readl(&cmper->uart5clkctrl) != PRCM_MOD_EN)
+ ;
+#endif /* CONFIG_SERIAL6 */
+
/* MMC0*/
writel(PRCM_MOD_EN, &cmper->mmc0clkctrl);
while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 9cee1d9..f3cd81a 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -50,7 +50,9 @@ DECLARE_GLOBAL_DATA_PTR;
/* Declarations */
extern omap3_sysinfo sysinfo;
static void omap3_setup_aux_cr(void);
+#ifndef CONFIG_SYS_L2CACHE_OFF
static void omap3_invalidate_l2_cache_secure(void);
+#endif
static const struct gpio_bank gpio_bank_34xx[6] = {
{ (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX },
@@ -410,19 +412,6 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
}
}
-static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
-{
- u32 acr;
-
- /* Read ACR */
- asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
- acr &= ~clear_bits;
- acr |= set_bits;
-
- /* Write ACR - affects non-secure banked bits */
- asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
-}
-
static void omap3_setup_aux_cr(void)
{
/* Workaround for Cortex-A8 errata: #454179 #430973
@@ -436,6 +425,19 @@ static void omap3_setup_aux_cr(void)
}
#ifndef CONFIG_SYS_L2CACHE_OFF
+static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
+{
+ u32 acr;
+
+ /* Read ACR */
+ asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
+ acr &= ~clear_bits;
+ acr |= set_bits;
+
+ /* Write ACR - affects non-secure banked bits */
+ asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
+}
+
/* Invalidate the entire L2 cache from secure mode */
static void omap3_invalidate_l2_cache_secure(void)
{
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 89df4dc..78a7fac 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -267,3 +267,8 @@ struct meminfo {
extern struct meminfo meminfo;
#endif
+
+/*
+ * Board specified tags
+ */
+void setup_board_tags(struct tag **in_params);
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 37476cc..1bd2730 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -34,6 +34,7 @@
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/bootm.h>
+#include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -269,6 +270,8 @@ static int create_fdt(bootm_headers_t *images)
}
#endif
+__weak void setup_board_tags(struct tag **in_params) {}
+
/* Subcommand: PREP */
static void boot_prep_linux(bootm_headers_t *images)
{
@@ -310,6 +313,7 @@ static void boot_prep_linux(bootm_headers_t *images)
setup_initrd_tag(gd->bd, images->rd_start,
images->rd_end);
#endif
+ setup_board_tags(&params);
setup_end_tag(gd->bd);
#else /* all tags */
printf("FDT and ATAGS support not compiled in - hanging\n");