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-rw-r--r--arch/arm/cpu/armv7/am33xx/board.c11
-rw-r--r--arch/arm/cpu/armv7/omap-common/boot-common.c10
-rw-r--r--arch/arm/cpu/armv7/omap-common/hwinit-common.c11
-rw-r--r--arch/arm/cpu/armv7/omap3/board.c9
-rw-r--r--arch/arm/cpu/armv7/sunxi/board.c66
-rw-r--r--arch/arm/cpu/armv7/zynq/spl.c3
-rw-r--r--arch/arm/lib/spl.c7
7 files changed, 50 insertions, 67 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index eaf09d1..81477aa 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -285,14 +285,6 @@ void s_init(void)
#ifdef CONFIG_NOR_BOOT
enable_norboot_pin_mux();
#endif
- /*
- * Save the boot parameters passed from romcode.
- * We cannot delay the saving further than this,
- * to prevent overwrites.
- */
-#ifdef CONFIG_SPL_BUILD
- save_omap_boot_params();
-#endif
watchdog_disable();
set_uart_mux_conf();
setup_clocks_for_console();
@@ -301,9 +293,6 @@ void s_init(void)
gd->baudrate = CONFIG_BAUDRATE;
serial_init();
gd->have_console = 1;
-#elif defined(CONFIG_SPL_BUILD)
- gd = &gdata;
- preloader_console_init();
#endif
#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
/* Enable RTC32K clock */
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c
index 00a1082..17500f2 100644
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -106,6 +106,16 @@ u32 spl_boot_mode(void)
void spl_board_init(void)
{
+ /*
+ * Save the boot parameters passed from romcode.
+ * We cannot delay the saving further than this,
+ * to prevent overwrites.
+ */
+ save_omap_boot_params();
+
+ /* Prepare console output */
+ preloader_console_init();
+
#ifdef CONFIG_SPL_NAND_SUPPORT
gpmc_init();
#endif
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index dd52e93..cb35c19 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -111,14 +111,6 @@ int arch_cpu_init(void)
*/
void s_init(void)
{
- /*
- * Save the boot parameters passed from romcode.
- * We cannot delay the saving further than this,
- * to prevent overwrites.
- */
-#ifdef CONFIG_SPL_BUILD
- save_omap_boot_params();
-#endif
init_omap_revision();
hw_data_init();
@@ -133,9 +125,6 @@ void s_init(void)
srcomp_enable();
setup_clocks_for_console();
- gd = &gdata;
-
- preloader_console_init();
do_io_settings();
#endif
prcm_init();
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 53a9e5d..90d6ae7 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -119,6 +119,7 @@ int board_mmc_init(bd_t *bis)
void spl_board_init(void)
{
+ preloader_console_init();
#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
#endif
@@ -264,14 +265,6 @@ void s_init(void)
ehci_clocks_enable();
#endif
-#ifdef CONFIG_SPL_BUILD
- gd = &gdata;
-
- preloader_console_init();
-
- timer_init();
-#endif
-
if (!in_sdram)
mem_init();
}
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index bc98c56..f4a580a 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -46,9 +46,8 @@ u32 spl_boot_mode(void)
{
return MMCSD_MODE_RAW;
}
-#endif
-int gpio_init(void)
+static int gpio_init(void)
{
#if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
@@ -86,36 +85,9 @@ int gpio_init(void)
return 0;
}
-void reset_cpu(ulong addr)
+void board_init_f(ulong dummy)
{
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I)
- static const struct sunxi_wdog *wdog =
- &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
-
- /* Set the watchdog for its shortest interval (.5s) and wait */
- writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
- writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
-
- while (1) {
- /* sun5i sometimes gets stuck without this */
- writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
- }
-#else /* CONFIG_MACH_SUN6I || CONFIG_MACH_SUN8I || .. */
- static const struct sunxi_wdog *wdog =
- ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
-
- /* Set the watchdog for its shortest interval (.5s) and wait */
- writel(WDT_CFG_RESET, &wdog->cfg);
- writel(WDT_MODE_EN, &wdog->mode);
- writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
-#endif
-}
-
-/* do some early init */
-void s_init(void)
-{
-#if defined CONFIG_SPL_BUILD && \
- (defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I)
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I
/* Magic (undocmented) value taken from boot0, without this DRAM
* access gets messed up (seems cache related) */
setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
@@ -134,8 +106,6 @@ void s_init(void)
gpio_init();
i2c_init_board();
-#ifdef CONFIG_SPL_BUILD
- gd = &gdata;
preloader_console_init();
#ifdef CONFIG_SPL_I2C_SUPPORT
@@ -143,6 +113,36 @@ void s_init(void)
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
sunxi_board_init();
+
+ /* Clear the BSS. */
+ memset(__bss_start, 0, __bss_end - __bss_start);
+
+ board_init_r(NULL, 0);
+}
+#endif
+
+void reset_cpu(ulong addr)
+{
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I)
+ static const struct sunxi_wdog *wdog =
+ &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
+
+ /* Set the watchdog for its shortest interval (.5s) and wait */
+ writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
+ writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
+
+ while (1) {
+ /* sun5i sometimes gets stuck without this */
+ writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
+ }
+#else /* CONFIG_MACH_SUN6I || CONFIG_MACH_SUN8I || .. */
+ static const struct sunxi_wdog *wdog =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
+
+ /* Set the watchdog for its shortest interval (.5s) and wait */
+ writel(WDT_CFG_RESET, &wdog->cfg);
+ writel(WDT_MODE_EN, &wdog->mode);
+ writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
#endif
}
diff --git a/arch/arm/cpu/armv7/zynq/spl.c b/arch/arm/cpu/armv7/zynq/spl.c
index 31627f9..0936bdd 100644
--- a/arch/arm/cpu/armv7/zynq/spl.c
+++ b/arch/arm/cpu/armv7/zynq/spl.c
@@ -20,9 +20,6 @@ void board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
- /* Set global data pointer. */
- gd = &gdata;
-
preloader_console_init();
arch_cpu_init();
board_init_r(NULL, 0);
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index dfcc596..c41850a 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -15,6 +15,11 @@
/* Pointer to as well as the global data structure for SPL */
DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * WARNING: This is going away very soon. Don't use it and don't submit
+ * pafches that rely on it. The global_data area is set up in crt0.S.
+ */
gd_t gdata __attribute__ ((section(".data")));
/*
@@ -28,7 +33,7 @@ void __weak board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
- /* Set global data pointer. */
+ /* TODO: Remove settings of the global data pointer here */
gd = &gdata;
board_init_r(NULL, 0);
generated by cgit v1.1 at 2024-12-20 10:47:46 +0000