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-rw-r--r--arch/powerpc/include/asm/cache.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 53e8d05..e6b8f69 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -21,6 +21,12 @@
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
/*
+ * Use the L1 data cache line size value for the minimum DMA buffer alignment
+ * on PowerPC.
+ */
+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
+
+/*
* For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too
*/
#ifndef CONFIG_SYS_CACHELINE_SIZE