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-rw-r--r--arch/arm/cpu/armv7/mx7/soc.c26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c
index 058396e..8eff842 100644
--- a/arch/arm/cpu/armv7/mx7/soc.c
+++ b/arch/arm/cpu/armv7/mx7/soc.c
@@ -20,10 +20,6 @@
#include <recovery.h>
#endif
#endif
-#ifdef CONFIG_IMX_UDC
-#include <asm/arch/mx7_usbphy.h>
-#include <usb/imx_udc.h>
-#endif
#define TEMPERATURE_MIN -40
#define TEMPERATURE_HOT 80
@@ -509,30 +505,12 @@ void set_usb_phy1_clk(void)
}
void enable_usb_phy1_clk(unsigned char enable)
{
- if (enable)
- writel(BM_USBPHY_CTRL_CLKGATE,
- USB_PHY0_BASE_ADDR + HW_USBPHY_CTRL_CLR);
- else
- writel(BM_USBPHY_CTRL_CLKGATE,
- USB_PHY0_BASE_ADDR + HW_USBPHY_CTRL_SET);
}
void reset_usb_phy1(void)
{
/* Reset USBPHY module */
- u32 temp;
- temp = readl(USB_PHY0_BASE_ADDR + HW_USBPHY_CTRL);
- temp |= BM_USBPHY_CTRL_SFTRST;
- writel(temp, USB_PHY0_BASE_ADDR + HW_USBPHY_CTRL);
- udelay(10);
-
- /* Remove CLKGATE and SFTRST */
- temp = readl(USB_PHY0_BASE_ADDR + HW_USBPHY_CTRL);
- temp &= ~(BM_USBPHY_CTRL_CLKGATE | BM_USBPHY_CTRL_SFTRST);
- writel(temp, USB_PHY0_BASE_ADDR + HW_USBPHY_CTRL);
- udelay(10);
-
- /* Power up the PHY */
- writel(0, USB_PHY0_BASE_ADDR + HW_USBPHY_PWD);
+ setbits_le32(&src_reg->usbophy1_rcr, 0x00000001);
}
+
#endif