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-rw-r--r--arch/avr32/lib/board.c1
-rw-r--r--arch/mips/include/asm/u-boot-mips.h11
-rw-r--r--arch/mips/lib/board.c7
-rw-r--r--arch/mips/lib/bootm.c102
-rw-r--r--arch/mips/lib/bootm_qemu_mips.c26
-rw-r--r--arch/powerpc/cpu/mpc512x/Makefile3
-rw-r--r--arch/powerpc/cpu/mpc512x/cache.c33
-rw-r--r--arch/powerpc/cpu/mpc83xx/Makefile3
-rw-r--r--arch/powerpc/cpu/mpc83xx/cache.c33
-rw-r--r--arch/powerpc/cpu/mpc85xx/Makefile3
-rw-r--r--arch/powerpc/cpu/mpc85xx/cache.c33
-rw-r--r--arch/sh/include/asm/cpu_sh2.h2
-rw-r--r--arch/sh/include/asm/cpu_sh4.h2
-rw-r--r--arch/sh/include/asm/cpu_sh7269.h26
-rw-r--r--arch/sh/include/asm/cpu_sh7734.h70
-rw-r--r--arch/sh/include/asm/io.h43
16 files changed, 324 insertions, 74 deletions
diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c
index b390a6c..d7a64b4 100644
--- a/arch/avr32/lib/board.c
+++ b/arch/avr32/lib/board.c
@@ -254,7 +254,6 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
#ifndef CONFIG_ENV_IS_NOWHERE
extern char * env_name_spec;
#endif
- char *s;
bd_t *bd;
gd = new_gd;
diff --git a/arch/mips/include/asm/u-boot-mips.h b/arch/mips/include/asm/u-boot-mips.h
new file mode 100644
index 0000000..6f26dfa
--- /dev/null
+++ b/arch/mips/include/asm/u-boot-mips.h
@@ -0,0 +1,11 @@
+/*
+ * This file is released under the terms of GPL v2 and any later version.
+ * See the file COPYING in the root directory of the source tree for details.
+ *
+ * Copyright (C) 2003 Wolfgang Denk, DENX Software Engineering, wd@denx.de
+ */
+
+extern ulong uboot_end_data;
+extern ulong uboot_end;
+
+extern int incaip_set_cpuclk(void);
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index 59a8001..62d47a8 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -38,13 +38,6 @@
DECLARE_GLOBAL_DATA_PTR;
-extern int timer_init(void);
-
-extern int incaip_set_cpuclk(void);
-
-extern ulong uboot_end_data;
-extern ulong uboot_end;
-
ulong monitor_flash_len;
static char *failed = "*** failed ***\n";
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 9930abf..608c1a7 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -33,22 +33,23 @@ DECLARE_GLOBAL_DATA_PTR;
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
-static int linux_argc;
-static char ** linux_argv;
+static int linux_argc;
+static char **linux_argv;
-static char ** linux_env;
-static char * linux_env_p;
-static int linux_env_idx;
+static char **linux_env;
+static char *linux_env_p;
+static int linux_env_idx;
-static void linux_params_init (ulong start, char * commandline);
-static void linux_env_set (char * env_name, char * env_val);
+static void linux_params_init(ulong start, char *commandline);
+static void linux_env_set(char *env_name, char *env_val);
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[],
+ bootm_headers_t *images)
{
- void (*theKernel) (int, char **, char **, int *);
- char *commandline = getenv ("bootargs");
- char env_buf[12];
- char *cp;
+ void (*theKernel) (int, char **, char **, int *);
+ char *commandline = getenv("bootargs");
+ char env_buf[12];
+ char *cp;
if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
@@ -59,53 +60,53 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
#ifdef DEBUG
- printf ("## Transferring control to Linux (at address %08lx) ...\n",
+ printf("## Transferring control to Linux (at address %08lx) ...\n",
(ulong) theKernel);
#endif
- linux_params_init (UNCACHED_SDRAM (gd->bd->bi_boot_params), commandline);
+ linux_params_init(UNCACHED_SDRAM(gd->bd->bi_boot_params), commandline);
#ifdef CONFIG_MEMSIZE_IN_BYTES
- sprintf (env_buf, "%lu", (ulong)gd->ram_size);
- debug ("## Giving linux memsize in bytes, %lu\n", (ulong)gd->ram_size);
+ sprintf(env_buf, "%lu", (ulong)gd->ram_size);
+ debug("## Giving linux memsize in bytes, %lu\n", (ulong)gd->ram_size);
#else
- sprintf (env_buf, "%lu", (ulong)(gd->ram_size >> 20));
- debug ("## Giving linux memsize in MB, %lu\n", (ulong)(gd->ram_size >> 20));
+ sprintf(env_buf, "%lu", (ulong)(gd->ram_size >> 20));
+ debug("## Giving linux memsize in MB, %lu\n",
+ (ulong)(gd->ram_size >> 20));
#endif /* CONFIG_MEMSIZE_IN_BYTES */
- linux_env_set ("memsize", env_buf);
+ linux_env_set("memsize", env_buf);
- sprintf (env_buf, "0x%08X", (uint) UNCACHED_SDRAM (images->rd_start));
- linux_env_set ("initrd_start", env_buf);
+ sprintf(env_buf, "0x%08X", (uint) UNCACHED_SDRAM(images->rd_start));
+ linux_env_set("initrd_start", env_buf);
- sprintf (env_buf, "0x%X", (uint) (images->rd_end - images->rd_start));
- linux_env_set ("initrd_size", env_buf);
+ sprintf(env_buf, "0x%X", (uint) (images->rd_end - images->rd_start));
+ linux_env_set("initrd_size", env_buf);
- sprintf (env_buf, "0x%08X", (uint) (gd->bd->bi_flashstart));
- linux_env_set ("flash_start", env_buf);
+ sprintf(env_buf, "0x%08X", (uint) (gd->bd->bi_flashstart));
+ linux_env_set("flash_start", env_buf);
- sprintf (env_buf, "0x%X", (uint) (gd->bd->bi_flashsize));
- linux_env_set ("flash_size", env_buf);
+ sprintf(env_buf, "0x%X", (uint) (gd->bd->bi_flashsize));
+ linux_env_set("flash_size", env_buf);
cp = getenv("ethaddr");
- if (cp != NULL) {
+ if (cp)
linux_env_set("ethaddr", cp);
- }
cp = getenv("eth1addr");
- if (cp != NULL) {
+ if (cp)
linux_env_set("eth1addr", cp);
- }
/* we assume that the kernel is in place */
- printf ("\nStarting kernel ...\n\n");
+ printf("\nStarting kernel ...\n\n");
+
+ theKernel(linux_argc, linux_argv, linux_env, 0);
- theKernel (linux_argc, linux_argv, linux_env, 0);
/* does not return */
return 1;
}
-static void linux_params_init (ulong start, char *line)
+static void linux_params_init(ulong start, char *line)
{
char *next, *quote, *argp;
@@ -117,26 +118,25 @@ static void linux_params_init (ulong start, char *line)
next = line;
while (line && *line && linux_argc < LINUX_MAX_ARGS) {
- quote = strchr (line, '"');
- next = strchr (line, ' ');
+ quote = strchr(line, '"');
+ next = strchr(line, ' ');
- while (next != NULL && quote != NULL && quote < next) {
+ while (next && quote && quote < next) {
/* we found a left quote before the next blank
* now we have to find the matching right quote
*/
- next = strchr (quote + 1, '"');
- if (next != NULL) {
- quote = strchr (next + 1, '"');
- next = strchr (next + 1, ' ');
+ next = strchr(quote + 1, '"');
+ if (next) {
+ quote = strchr(next + 1, '"');
+ next = strchr(next + 1, ' ');
}
}
- if (next == NULL) {
- next = line + strlen (line);
- }
+ if (!next)
+ next = line + strlen(line);
linux_argv[linux_argc] = argp;
- memcpy (argp, line, next - line);
+ memcpy(argp, line, next - line);
argp[next - line] = 0;
argp += next - line + 1;
@@ -154,19 +154,19 @@ static void linux_params_init (ulong start, char *line)
linux_env_idx = 0;
}
-static void linux_env_set (char *env_name, char *env_val)
+static void linux_env_set(char *env_name, char *env_val)
{
if (linux_env_idx < LINUX_MAX_ENVS - 1) {
linux_env[linux_env_idx] = linux_env_p;
- strcpy (linux_env_p, env_name);
- linux_env_p += strlen (env_name);
+ strcpy(linux_env_p, env_name);
+ linux_env_p += strlen(env_name);
- strcpy (linux_env_p, "=");
+ strcpy(linux_env_p, "=");
linux_env_p += 1;
- strcpy (linux_env_p, env_val);
- linux_env_p += strlen (env_val);
+ strcpy(linux_env_p, env_val);
+ linux_env_p += strlen(env_val);
linux_env_p++;
linux_env[++linux_env_idx] = 0;
diff --git a/arch/mips/lib/bootm_qemu_mips.c b/arch/mips/lib/bootm_qemu_mips.c
index bb6442a..0815c9c 100644
--- a/arch/mips/lib/bootm_qemu_mips.c
+++ b/arch/mips/lib/bootm_qemu_mips.c
@@ -29,30 +29,31 @@
DECLARE_GLOBAL_DATA_PTR;
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[],
+ bootm_headers_t *images)
{
- void (*theKernel) (int, char **, char **, int *);
- char *bootargs = getenv ("bootargs");
- char *start;
- uint len;
+ void (*theKernel) (int, char **, char **, int *);
+ char *bootargs = getenv("bootargs");
+ char *start;
+ uint len;
/* find kernel entry point */
theKernel = (void (*)(int, char **, char **, int *))images->ep;
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
- debug ("## Transferring control to Linux (at address %08lx) ...\n",
+ debug("## Transferring control to Linux (at address %08lx) ...\n",
(ulong) theKernel);
gd->bd->bi_boot_params = gd->bd->bi_memstart + (16 << 20) - 256;
- debug ("%-12s= 0x%08lX\n", "boot_params", (ulong)gd->bd->bi_boot_params);
+ debug("%-12s= 0x%08lX\n", "boot_params", (ulong)gd->bd->bi_boot_params);
/* set Magic */
*(int32_t *)(gd->bd->bi_boot_params - 4) = 0x12345678;
/* set ram_size */
*(int32_t *)(gd->bd->bi_boot_params - 8) = gd->ram_size;
- start = (char*)gd->bd->bi_boot_params;
+ start = (char *)gd->bd->bi_boot_params;
len = strlen(bootargs);
@@ -62,15 +63,16 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
len = images->rd_end - images->rd_start;
if (len > 0) {
- start += sprintf(start," rd_start=0x%08X rd_size=0x%0X",
- (uint) UNCACHED_SDRAM (images->rd_start),
+ start += sprintf(start, " rd_start=0x%08X rd_size=0x%0X",
+ (uint) UNCACHED_SDRAM(images->rd_start),
(uint) len);
}
/* we assume that the kernel is in place */
- printf ("\nStarting kernel ...\n\n");
+ printf("\nStarting kernel ...\n\n");
+
+ theKernel(0, NULL, NULL, 0);
- theKernel (0, NULL, NULL, 0);
/* does not return */
return 1;
}
diff --git a/arch/powerpc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile
index 4a4bc0d..b53232f 100644
--- a/arch/powerpc/cpu/mpc512x/Makefile
+++ b/arch/powerpc/cpu/mpc512x/Makefile
@@ -41,6 +41,9 @@ COBJS-$(CONFIG_CMD_IDE) += ide.o
COBJS-$(CONFIG_IIM) += iim.o
COBJS-$(CONFIG_PCI) += pci.o
+# Stub implementations of cache management functions for USB
+COBJS-$(CONFIG_USB_EHCI) += cache.o
+
COBJS := $(COBJS-y)
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/powerpc/cpu/mpc512x/cache.c b/arch/powerpc/cpu/mpc512x/cache.c
new file mode 100644
index 0000000..2a08b65
--- /dev/null
+++ b/arch/powerpc/cpu/mpc512x/cache.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+ *
+ * This file contains stub implementation of
+ * invalidate_dcache_range()
+ * flush_dcache_range()
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+}
diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index b5c499d..012ab6b0 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -41,6 +41,9 @@ COBJS-$(CONFIG_PCI) += pci.o
COBJS-$(CONFIG_PCIE) += pcie.o
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+# Stub implementations of cache management functions for USB
+COBJS-$(CONFIG_USB_EHCI) += cache.o
+
ifdef CONFIG_FSL_DDR2
COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
else
diff --git a/arch/powerpc/cpu/mpc83xx/cache.c b/arch/powerpc/cpu/mpc83xx/cache.c
new file mode 100644
index 0000000..2a08b65
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/cache.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+ *
+ * This file contains stub implementation of
+ * invalidate_dcache_range()
+ * flush_dcache_range()
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+}
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 058d609..c512b33 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -129,6 +129,9 @@ COBJS += speed.o
COBJS += tlb.o
COBJS += traps.o
+# Stub implementations of cache management functions for USB
+COBJS-$(CONFIG_USB_EHCI) += cache.o
+
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
START := $(addprefix $(obj),$(START))
diff --git a/arch/powerpc/cpu/mpc85xx/cache.c b/arch/powerpc/cpu/mpc85xx/cache.c
new file mode 100644
index 0000000..2a08b65
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/cache.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+ *
+ * This file contains stub implementation of
+ * invalidate_dcache_range()
+ * flush_dcache_range()
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+}
diff --git a/arch/sh/include/asm/cpu_sh2.h b/arch/sh/include/asm/cpu_sh2.h
index 767e189..28be591 100644
--- a/arch/sh/include/asm/cpu_sh2.h
+++ b/arch/sh/include/asm/cpu_sh2.h
@@ -35,6 +35,8 @@
# include <asm/cpu_sh7203.h>
#elif defined(CONFIG_CPU_SH7264)
# include <asm/cpu_sh7264.h>
+#elif defined(CONFIG_CPU_SH7269)
+# include <asm/cpu_sh7269.h>
#else
# error "Unknown SH2 variant"
#endif
diff --git a/arch/sh/include/asm/cpu_sh4.h b/arch/sh/include/asm/cpu_sh4.h
index 4351e8e..f1f49fe 100644
--- a/arch/sh/include/asm/cpu_sh4.h
+++ b/arch/sh/include/asm/cpu_sh4.h
@@ -46,6 +46,8 @@
# include <asm/cpu_sh7723.h>
#elif defined (CONFIG_CPU_SH7724)
# include <asm/cpu_sh7724.h>
+#elif defined (CONFIG_CPU_SH7734)
+# include <asm/cpu_sh7734.h>
#elif defined (CONFIG_CPU_SH7757)
# include <asm/cpu_sh7757.h>
#elif defined (CONFIG_CPU_SH7763)
diff --git a/arch/sh/include/asm/cpu_sh7269.h b/arch/sh/include/asm/cpu_sh7269.h
new file mode 100644
index 0000000..4dea708
--- /dev/null
+++ b/arch/sh/include/asm/cpu_sh7269.h
@@ -0,0 +1,26 @@
+#ifndef _ASM_CPU_SH7269_H_
+#define _ASM_CPU_SH7269_H_
+
+/* Cache */
+#define CCR1 0xFFFC1000
+#define CCR CCR1
+
+/* SCIF */
+#define SCSMR_0 0xE8007000
+#define SCIF0_BASE SCSMR_0
+#define SCSMR_1 0xE8007800
+#define SCIF1_BASE SCSMR_1
+#define SCSMR_2 0xE8008000
+#define SCIF2_BASE SCSMR_2
+#define SCSMR_3 0xE8008800
+#define SCIF3_BASE SCSMR_3
+#define SCSMR_7 0xE800A800
+#define SCIF7_BASE SCSMR_7
+
+/* Timer(CMT) */
+#define CMSTR 0xFFFEC000
+#define CMCSR_0 0xFFFEC002
+#define CMCNT_0 0xFFFEC004
+#define CMCOR_0 0xFFFEC006
+
+#endif /* _ASM_CPU_SH7269_H_ */
diff --git a/arch/sh/include/asm/cpu_sh7734.h b/arch/sh/include/asm/cpu_sh7734.h
new file mode 100644
index 0000000..0f84b4f
--- /dev/null
+++ b/arch/sh/include/asm/cpu_sh7734.h
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2008, 2011 Renesas Solutions Corp.
+ *
+ * SH7734 Internal I/O register
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_CPU_SH7734_H_
+#define _ASM_CPU_SH7734_H_
+
+#define CCR 0xFF00001C
+
+#define CACHE_OC_NUM_WAYS 4
+#define CCR_CACHE_INIT 0x0000090d
+
+/* SCIF */
+#define SCIF0_BASE 0xFFE40000
+#define SCIF1_BASE 0xFFE41000
+#define SCIF2_BASE 0xFFE42000
+#define SCIF3_BASE 0xFFE43000
+#define SCIF4_BASE 0xFFE44000
+#define SCIF5_BASE 0xFFE45000
+
+/* Timer */
+#define TSTR 0xFFD80004
+#define TCNT0 0xFFD8000C
+#define TCR0 0xFFD80010
+
+/* PFC */
+#define PMMR (0xFFFC0000)
+#define MODESEL0 (0xFFFC004C)
+#define MODESEL2 (MODESEL0 + 0x4)
+#define MODESEL2_INIT (0x00003000)
+
+#define IPSR0 (0xFFFC001C)
+#define IPSR1 (IPSR0 + 0x4)
+#define IPSR2 (IPSR0 + 0x8)
+#define IPSR3 (IPSR0 + 0xC)
+#define IPSR4 (IPSR0 + 0x10)
+#define IPSR5 (IPSR0 + 0x14)
+#define IPSR6 (IPSR0 + 0x18)
+#define IPSR7 (IPSR0 + 0x1C)
+#define IPSR8 (IPSR0 + 0x20)
+#define IPSR9 (IPSR0 + 0x24)
+#define IPSR10 (IPSR0 + 0x28)
+#define IPSR11 (IPSR0 + 0x2C)
+
+#define GPSR0 (0xFFFC0004)
+#define GPSR1 (GPSR0 + 0x4)
+#define GPSR2 (GPSR0 + 0x8)
+#define GPSR3 (GPSR0 + 0xC)
+#define GPSR4 (GPSR0 + 0x10)
+#define GPSR5 (GPSR0 + 0x14)
+
+
+#endif /* _ASM_CPU_SH7734_H_ */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index ca598a6..0a00db3 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -147,13 +147,13 @@ extern void __iounmap(void *addr);
*/
#ifdef iomem_valid_addr
#define __arch_ioremap(off, sz, nocache) \
- ({ \
+({ \
unsigned long _off = (off), _size = (sz); \
void *_ret = (void *)0; \
if (iomem_valid_addr(_off, _size)) \
_ret = __ioremap(iomem_to_phys(_off), _size, 0); \
_ret; \
- })
+})
#define __arch_iounmap __iounmap
#endif
@@ -238,6 +238,43 @@ static inline void sync(void)
}
/*
+ * Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrbits(type, addr, clear) \
+ out_##type((addr), in_##type(addr) & ~(clear))
+
+#define setbits(type, addr, set) \
+ out_##type((addr), in_##type(addr) | (set))
+
+#define clrsetbits(type, addr, clear, set) \
+ out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_be32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
+#define setbits_le32(addr, set) setbits(le32, addr, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_be16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
+#define setbits_le16(addr, set) setbits(le16, addr, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+
+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
+#define setbits_8(addr, set) setbits(8, addr, set)
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
+/*
* Given a physical address and a length, return a virtual address
* that can be used to access the memory range with the caching
* properties specified by "flags".
@@ -261,7 +298,7 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags)
}
-static inline phys_addr_t virt_to_phys(void * vaddr)
+static inline phys_addr_t virt_to_phys(void *vaddr)
{
return (phys_addr_t)(vaddr);
}
generated by cgit v1.1 at 2024-11-17 12:36:48 +0000