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Diffstat (limited to 'arch')
-rw-r--r--arch/Kconfig4
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/cpu/arm1176/tnetv107x/clock.c2
-rw-r--r--arch/arm/cpu/armv7/exynos/Kconfig5
-rw-r--r--arch/arm/cpu/armv7/mx6/ddr.c40
-rw-r--r--arch/arm/include/asm/arch-kirkwood/spi.h8
-rw-r--r--arch/powerpc/cpu/mpc8xx/u-boot.lds82
-rw-r--r--arch/x86/lib/physmem.c4
8 files changed, 119 insertions, 27 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index c9ccb7d..bf26764 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -7,6 +7,7 @@ config ARC
config ARM
bool "ARM architecture"
+ select SUPPORT_OF_CONTROL
config AVR32
bool "AVR32 architecture"
@@ -19,6 +20,7 @@ config M68K
config MICROBLAZE
bool "MicroBlaze architecture"
+ select SUPPORT_OF_CONTROL
config MIPS
bool "MIPS architecture"
@@ -37,6 +39,7 @@ config PPC
config SANDBOX
bool "Sandbox"
+ select SUPPORT_OF_CONTROL
config SH
bool "SuperH architecture"
@@ -46,6 +49,7 @@ config SPARC
config X86
bool "x86 architecture"
+ select SUPPORT_OF_CONTROL
endchoice
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 106aed9..3efede2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -462,6 +462,7 @@ config ZYNQ
config TEGRA
bool "NVIDIA Tegra"
select SPL
+ select OF_CONTROL if !SPL_BUILD
config TARGET_VEXPRESS_AEMV8A
bool "Support vexpress_aemv8a"
diff --git a/arch/arm/cpu/arm1176/tnetv107x/clock.c b/arch/arm/cpu/arm1176/tnetv107x/clock.c
index 3708b6f..47c23bb 100644
--- a/arch/arm/cpu/arm1176/tnetv107x/clock.c
+++ b/arch/arm/cpu/arm1176/tnetv107x/clock.c
@@ -362,7 +362,7 @@ static void init_pll(const struct pll_init_data *data)
pllctl_reg_write(data->pll, ctl, tmp);
mult = data->pll_freq / fpll;
- for (mult = MAX(mult, 1); mult <= MAX_MULT; mult++) {
+ for (mult = max(mult, 1); mult <= MAX_MULT; mult++) {
div = (fpll * mult) / data->pll_freq;
if (div < 1 || div > MAX_DIV)
continue;
diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig
index d132f03..e7c93d8 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -23,18 +23,23 @@ config TARGET_ODROID
config TARGET_ARNDALE
bool "Exynos5250 Arndale board"
+ select OF_CONTROL if !SPL_BUILD
config TARGET_SMDK5250
bool "SMDK5250 board"
+ select OF_CONTROL if !SPL_BUILD
config TARGET_SNOW
bool "Snow board"
+ select OF_CONTROL if !SPL_BUILD
config TARGET_SMDK5420
bool "SMDK5420 board"
+ select OF_CONTROL if !SPL_BUILD
config TARGET_PEACH_PIT
bool "Peach Pi board"
+ select OF_CONTROL if !SPL_BUILD
endchoice
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index 7b5c1e4..7a9b03a 100644
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -247,47 +247,47 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
switch (ddr3_cfg->mem_speed) {
case 800:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 7500), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 7500), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(40000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 10000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(50000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 10000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1;
}
break;
case 1066:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 7500), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 5625), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 5625), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(37500, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 7500), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(50000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 10000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1;
}
break;
case 1333:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 6000), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 5625), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 6000), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 5625), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(30000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 6000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 6000), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(45000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 7500), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1;
}
break;
case 1600:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 6000), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 5000), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 6000), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 5000), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(30000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 6000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 6000), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(40000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 7500), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1;
}
break;
default:
@@ -295,18 +295,18 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
hang();
break;
}
- txpdll = DIV_ROUND_UP(MAX(10 * clkper, 24000), clkper) - 1;
- tcksre = DIV_ROUND_UP(MAX(5 * clkper, 10000), clkper);
+ txpdll = DIV_ROUND_UP(max(10 * clkper, 24000), clkper) - 1;
+ tcksre = DIV_ROUND_UP(max(5 * clkper, 10000), clkper);
taonpd = DIV_ROUND_UP(2000, clkper) - 1;
tcksrx = tcksre;
taofpd = taonpd;
twr = DIV_ROUND_UP(15000, clkper) - 1;
- tmrd = DIV_ROUND_UP(MAX(12 * clkper, 15000), clkper) - 1;
+ tmrd = DIV_ROUND_UP(max(12 * clkper, 15000), clkper) - 1;
trc = DIV_ROUND_UP(ddr3_cfg->trcmin, clkper / 10) - 1;
tras = DIV_ROUND_UP(ddr3_cfg->trasmin, clkper / 10) - 1;
tcl = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 3;
trp = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 1;
- twtr = ROUND(MAX(4 * clkper, 7500) / clkper, 1) - 1;
+ twtr = ROUND(max(4 * clkper, 7500) / clkper, 1) - 1;
trcd = trp;
trtp = twtr;
cs0_end = 4 * sysinfo->cs_density - 1;
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h b/arch/arm/include/asm/arch-kirkwood/spi.h
index b1cf614..e512dce 100644
--- a/arch/arm/include/asm/arch-kirkwood/spi.h
+++ b/arch/arm/include/asm/arch-kirkwood/spi.h
@@ -43,10 +43,10 @@ struct kwspi_registers {
#define KWSPI_XFERLEN_2BYTE (1 << 5)
#define KWSPI_XFERLEN_MASK (1 << 5)
#define KWSPI_ADRLEN_1BYTE 0
-#define KWSPI_ADRLEN_2BYTE 1 << 8
-#define KWSPI_ADRLEN_3BYTE 2 << 8
-#define KWSPI_ADRLEN_4BYTE 3 << 8
-#define KWSPI_ADRLEN_MASK 3 << 8
+#define KWSPI_ADRLEN_2BYTE (1 << 8)
+#define KWSPI_ADRLEN_3BYTE (2 << 8)
+#define KWSPI_ADRLEN_4BYTE (3 << 8)
+#define KWSPI_ADRLEN_MASK (3 << 8)
#define KWSPI_TIMEOUT 10000
#endif /* __KW_SPI_H__ */
diff --git a/arch/powerpc/cpu/mpc8xx/u-boot.lds b/arch/powerpc/cpu/mpc8xx/u-boot.lds
new file mode 100644
index 0000000..0eb2fba
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xx/u-boot.lds
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+OUTPUT_ARCH(powerpc)
+
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .text :
+ {
+ arch/powerpc/cpu/mpc8xx/start.o (.text*)
+ arch/powerpc/cpu/mpc8xx/traps.o (.text*)
+
+ *(.text*)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ _GOT2_TABLE_ = .;
+ KEEP(*(.got2))
+ KEEP(*(.got))
+ PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
+ _FIXUP_TABLE_ = .;
+ KEEP(*(.fixup))
+ }
+ __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data*)
+ *(.sdata*)
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ }
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss (NOLOAD) :
+ {
+ *(.bss*)
+ *(.sbss*)
+ *(COMMON)
+ . = ALIGN(4);
+ }
+ __bss_end = . ;
+ PROVIDE (end = .);
+}
diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c
index 59b3fe9..b57b2c3 100644
--- a/arch/x86/lib/physmem.c
+++ b/arch/x86/lib/physmem.c
@@ -189,7 +189,7 @@ phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size)
/* Handle memory below 4GB. */
if (start <= max_addr) {
- phys_size_t low_size = MIN(max_addr + 1 - start, size);
+ phys_size_t low_size = min(max_addr + 1 - start, size);
void *start_ptr = (void *)(uintptr_t)start;
assert(((phys_addr_t)(uintptr_t)start) == start);
@@ -208,7 +208,7 @@ phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size)
/* Handle the first partial page. */
if (offset) {
phys_addr_t end =
- MIN(map_addr + LARGE_PAGE_SIZE, start + size);
+ min(map_addr + LARGE_PAGE_SIZE, start + size);
phys_size_t cur_size = end - start;
x86_phys_memset_page(map_addr, offset, c, cur_size);
size -= cur_size;
generated by cgit v1.1 at 2024-11-10 17:28:34 +0000