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-rw-r--r--arch/arm/cpu/armv7/omap-common/mem-common.c4
-rw-r--r--arch/arm/include/asm/arch-am33xx/mem.h7
-rw-r--r--arch/arm/include/asm/arch-omap3/cpu.h1
-rw-r--r--arch/arm/include/asm/arch-omap3/mem.h13
4 files changed, 2 insertions, 23 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/mem-common.c b/arch/arm/cpu/armv7/omap-common/mem-common.c
index e9da70f..fc4290c 100644
--- a/arch/arm/cpu/armv7/omap-common/mem-common.c
+++ b/arch/arm/cpu/armv7/omap-common/mem-common.c
@@ -115,8 +115,8 @@ void gpmc_init(void)
ONENAND_GPMC_CONFIG6,
0
};
- u32 base = PISMO1_ONEN_BASE;
- u32 size = PISMO1_ONEN_SIZE;
+ u32 size = GPMC_SIZE_128M;
+ u32 base = CONFIG_SYS_ONENAND_BASE;
#else
const u32 gpmc_regs[GPMC_MAX_REG] = { 0, 0, 0, 0, 0, 0, 0 };
u32 size = 0;
diff --git a/arch/arm/include/asm/arch-am33xx/mem.h b/arch/arm/include/asm/arch-am33xx/mem.h
index e7e8c58..b2412b5 100644
--- a/arch/arm/include/asm/arch-am33xx/mem.h
+++ b/arch/arm/include/asm/arch-am33xx/mem.h
@@ -59,13 +59,6 @@
/* max number of GPMC regs */
#define GPMC_MAX_REG 7
-#define PISMO1_NOR 1
-#define PISMO1_NAND 2
-#define PISMO2_CS0 3
-#define PISMO2_CS1 4
-#define PISMO1_ONENAND 5
#define DBG_MPDB 6
-#define PISMO2_NAND_CS0 7
-#define PISMO2_NAND_CS1 8
#endif /* endif _MEM_H_ */
diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h
index 4d06ef8..53cc2b0 100644
--- a/arch/arm/include/asm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
@@ -98,7 +98,6 @@ struct ctrl_id {
#define DEBUG_BASE 0x08000000 /* debug board */
#define NAND_BASE 0x30000000 /* NAND addr */
/* (actual size small port) */
-#define PISMO2_BASE 0x18000000 /* PISMO2 CS1/2 */
#define ONENAND_MAP 0x20000000 /* OneNand addr */
/* (actual size small port) */
/* SMS */
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index d2dfb1e..0b78c1c 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -427,20 +427,7 @@ enum {
/* max number of GPMC regs */
#define GPMC_MAX_REG 7
-#define PISMO1_NOR 1
-#define PISMO1_NAND 2
-#define PISMO2_CS0 3
-#define PISMO2_CS1 4
-#define PISMO1_ONENAND 5
#define DBG_MPDB 6
-#define PISMO2_NAND_CS0 7
-#define PISMO2_NAND_CS1 8
-
-/* make it readable for the gpmc_init */
-#define PISMO1_NOR_BASE FLASH_BASE
-#define PISMO1_NAND_BASE NAND_BASE
-#define PISMO2_CS0_BASE PISMO2_MAP1
-#define PISMO1_ONEN_BASE ONENAND_MAP
#define DBG_MPDB_BASE DEBUG_BASE
#ifndef __ASSEMBLY__