diff options
Diffstat (limited to 'arch/x86')
35 files changed, 2684 insertions, 1670 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index fdfb618..ebf72b3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -32,6 +32,15 @@ config TARGET_CHROMEBOOK_LINK and it provides a 2560x1700 high resolution touch-enabled LCD display. +config TARGET_CROWNBAY + bool "Support Intel Crown Bay CRB" + help + This is the Intel Crown Bay Customer Reference Board. It contains + the Intel Atom Processor E6xx populated on the COM Express module + with 1GB DDR2 soldered down memory and a carrier board with the + Intel Platform Controller Hub EG20T, other system components and + peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS. + endchoice config RAMBASE @@ -310,8 +319,12 @@ endmenu source "arch/x86/cpu/ivybridge/Kconfig" +source "arch/x86/cpu/queensbay/Kconfig" + source "board/coreboot/coreboot/Kconfig" source "board/google/chromebook_link/Kconfig" +source "board/intel/crownbay/Kconfig" + endmenu diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 7f09db5..5033d2b 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -15,6 +15,7 @@ obj-y += interrupts.o cpu.o call64.o obj-$(CONFIG_SYS_COREBOOT) += coreboot/ obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/ +obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/ obj-y += lapic.o obj-$(CONFIG_PCI) += pci.o obj-y += turbo.o diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c index 8c11a63..0817751 100644 --- a/arch/x86/cpu/ivybridge/microcode_intel.c +++ b/arch/x86/cpu/ivybridge/microcode_intel.c @@ -40,6 +40,8 @@ static int microcode_decode_node(const void *blob, int node, update->data = fdt_getprop(blob, node, "data", &update->size); if (!update->data) return -EINVAL; + update->data += 48; + update->size -= 48; update->header_version = fdtdec_get_int(blob, node, "intel,header-version", 0); @@ -48,17 +50,17 @@ static int microcode_decode_node(const void *blob, int node, update->date_code = fdtdec_get_int(blob, node, "intel,date-code", 0); update->processor_signature = fdtdec_get_int(blob, node, - "intel.processor-signature", 0); + "intel,processor-signature", 0); update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0); update->loader_revision = fdtdec_get_int(blob, node, - "loader-revision", 0); + "intel,loader-revision", 0); update->processor_flags = fdtdec_get_int(blob, node, - "processor-flags", 0); + "intel,processor-flags", 0); return 0; } -static uint32_t microcode_read_rev(void) +static inline uint32_t microcode_read_rev(void) { /* * Some Intel CPUs can be very finicky about the CPUID sequence used. @@ -114,6 +116,7 @@ int microcode_update_intel(void) { struct microcode_update cpu, update; const void *blob = gd->fdt_blob; + int skipped; int count; int node; int ret; @@ -121,12 +124,13 @@ int microcode_update_intel(void) microcode_read_cpu(&cpu); node = 0; count = 0; + skipped = 0; do { node = fdtdec_next_compatible(blob, node, COMPAT_INTEL_MICROCODE); if (node < 0) { debug("%s: Found %d updates\n", __func__, count); - return count ? 0 : -ENOENT; + return count ? 0 : skipped ? -EEXIST : -ENOENT; } ret = microcode_decode_node(blob, node, &update); @@ -135,12 +139,15 @@ int microcode_update_intel(void) ret); return ret; } - if (update.processor_signature == cpu.processor_signature && - (update.processor_flags & cpu.processor_flags)) { - debug("%s: Update already exists\n", __func__); - return -EEXIST; + if (!(update.processor_signature == cpu.processor_signature && + (update.processor_flags & cpu.processor_flags))) { + debug("%s: Skipping non-matching update, sig=%x, pf=%x\n", + __func__, update.processor_signature, + update.processor_flags); + skipped++; + continue; } - + ret = microcode_read_rev(); wrmsr(0x79, (ulong)update.data, 0); debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n", microcode_read_rev(), update.date_code & 0xffff, diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index df2b990..b95e781 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -177,7 +177,7 @@ int sdram_initialise(struct pei_data *pei_data) debug("PEI data at %p, size %x:\n", pei_data, sizeof(*pei_data)); - data = (char *)CONFIG_X86_MRC_START; + data = (char *)CONFIG_X86_MRC_ADDR; if (data) { int rv; int (*func)(struct pei_data *); diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig new file mode 100644 index 0000000..f6b5201 --- /dev/null +++ b/arch/x86/cpu/queensbay/Kconfig @@ -0,0 +1,79 @@ +# +# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +config INTEL_QUEENSBAY + bool + select HAVE_FSP + select HAVE_CMC + +if INTEL_QUEENSBAY + +config HAVE_FSP + bool "Add an Firmware Support Package binary" + help + Select this option to add an Firmware Support Package binary to + the resulting U-Boot image. It is a binary blob which U-Boot uses + to set up SDRAM and other chipset specific initialization. + + Note: Without this binary U-Boot will not be able to set up its + SDRAM so will not boot. + +config FSP_FILE + string "Firmware Support Package binary filename" + depends on HAVE_FSP + default "fsp.bin" + help + The filename of the file to use as Firmware Support Package binary + in the board directory. + +config FSP_ADDR + hex "Firmware Support Package binary location" + depends on HAVE_FSP + default 0xfffc0000 + help + FSP is not Position Independent Code (PIC) and the whole FSP has to + be rebased if it is placed at a location which is different from the + perferred base address specified during the FSP build. Use Intel's + Binary Configuration Tool (BCT) to do the rebase. + + The default base address of 0xfffc0000 indicates that the binary must + be located at offset 0xc0000 from the beginning of a 1MB flash device. + +config FSP_TEMP_RAM_ADDR + hex + default 0x2000000 + help + Stack top address which is used in FspInit after DRAM is ready and + CAR is disabled. + +config HAVE_CMC + bool "Add a Chipset Micro Code state machine binary" + help + Select this option to add a Chipset Micro Code state machine binary + to the resulting U-Boot image. It is a 64K data block of machine + specific code which must be put in the flash for the processor to + access when powered up before system BIOS is executed. + +config CMC_FILE + string "Chipset Micro Code state machine filename" + depends on HAVE_CMC + default "cmc.bin" + help + The filename of the file to use as Chipset Micro Code state machine + binary in the board directory. + +config CMC_ADDR + hex "Chipset Micro Code state machine binary location" + depends on HAVE_CMC + default 0xfffb0000 + help + The location of the CMC binary is determined by a strap. It must be + put in flash at a location matching the strap-determined base address. + + The default base address of 0xfffb0000 indicates that the binary must + be located at offset 0xb0000 from the beginning of a 1MB flash device. + +endif diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile new file mode 100644 index 0000000..2c2ec01 --- /dev/null +++ b/arch/x86/cpu/queensbay/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += tnc_car.o tnc_dram.o tnc.o topcliff.o +obj-y += fsp_configs.o fsp_support.o +obj-$(CONFIG_PCI) += tnc_pci.o diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index aef18fc..af28e45 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -8,7 +8,7 @@ #include <common.h> #include <asm/arch/fsp/fsp_support.h> -void update_fsp_upd(struct upd_region_t *fsp_upd) +void update_fsp_upd(struct upd_region *fsp_upd) { /* Override any UPD setting if required */ diff --git a/arch/x86/cpu/queensbay/fsp_support.c b/arch/x86/cpu/queensbay/fsp_support.c index df3bbd0..ef1916b 100644 --- a/arch/x86/cpu/queensbay/fsp_support.c +++ b/arch/x86/cpu/queensbay/fsp_support.c @@ -10,67 +10,48 @@ #include <asm/post.h> /** - * Reads a 64-bit value from memory that may be unaligned. - * - * This function returns the 64-bit value pointed to by buf. The function - * guarantees that the read operation does not produce an alignment fault. - * - * If the buf is NULL, then ASSERT(). - * - * @buf: Pointer to a 64-bit value that may be unaligned. - * - * @return: The 64-bit value read from buf. - */ -static u64 read_unaligned64(const u64 *buf) -{ - ASSERT(buf != NULL); - - return *buf; -} - -/** * Compares two GUIDs * - * If the GUIDs are identical then TRUE is returned. - * If there are any bit differences in the two GUIDs, then FALSE is returned. - * - * If guid1 is NULL, then ASSERT(). - * If guid2 is NULL, then ASSERT(). + * If the GUIDs are identical then true is returned. + * If there are any bit differences in the two GUIDs, then false is returned. * * @guid1: A pointer to a 128 bit GUID. * @guid2: A pointer to a 128 bit GUID. * - * @retval TRUE: guid1 and guid2 are identical. - * @retval FALSE: guid1 and guid2 are not identical. + * @retval true: guid1 and guid2 are identical. + * @retval false: guid1 and guid2 are not identical. */ -static unsigned char compare_guid(const struct efi_guid_t *guid1, - const struct efi_guid_t *guid2) +static bool compare_guid(const struct efi_guid *guid1, + const struct efi_guid *guid2) { - u64 guid1_low; - u64 guid2_low; - u64 guid1_high; - u64 guid2_high; - - guid1_low = read_unaligned64((const u64 *)guid1); - guid2_low = read_unaligned64((const u64 *)guid2); - guid1_high = read_unaligned64((const u64 *)guid1 + 1); - guid2_high = read_unaligned64((const u64 *)guid2 + 1); - - return (unsigned char)(guid1_low == guid2_low && guid1_high == guid2_high); + if (memcmp(guid1, guid2, sizeof(struct efi_guid)) == 0) + return true; + else + return false; } u32 __attribute__((optimize("O0"))) find_fsp_header(void) { + /* + * This function may be called before the a stack is established, + * so special care must be taken. First, it cannot declare any local + * variable using stack. Only register variable can be used here. + * Secondly, some compiler version will add prolog or epilog code + * for the C function. If so the function call may not work before + * stack is ready. + * + * GCC 4.8.1 has been verified to be working for the following codes. + */ volatile register u8 *fsp asm("eax"); /* Initalize the FSP base */ - fsp = (u8 *)CONFIG_FSP_LOCATION; + fsp = (u8 *)CONFIG_FSP_ADDR; /* Check the FV signature, _FVH */ - if (((struct fv_header_t *)fsp)->sign == 0x4856465F) { + if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) { /* Go to the end of the FV header and align the address */ - fsp += ((struct fv_header_t *)fsp)->ext_hdr_off; - fsp += ((struct fv_ext_header_t *)fsp)->ext_hdr_size; + fsp += ((struct fv_header *)fsp)->ext_hdr_off; + fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size; fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8); } else { fsp = 0; @@ -78,20 +59,27 @@ u32 __attribute__((optimize("O0"))) find_fsp_header(void) /* Check the FFS GUID */ if (fsp && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[0] == 0x912740BE) && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[1] == 0x47342284) && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[2] == 0xB08471B9) && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[3] == 0x0C3F3527)) { + ((struct ffs_file_header *)fsp)->name.data1 == FSP_GUID_DATA1 && + ((struct ffs_file_header *)fsp)->name.data2 == FSP_GUID_DATA2 && + ((struct ffs_file_header *)fsp)->name.data3 == FSP_GUID_DATA3 && + ((struct ffs_file_header *)fsp)->name.data4[0] == FSP_GUID_DATA4_0 && + ((struct ffs_file_header *)fsp)->name.data4[1] == FSP_GUID_DATA4_1 && + ((struct ffs_file_header *)fsp)->name.data4[2] == FSP_GUID_DATA4_2 && + ((struct ffs_file_header *)fsp)->name.data4[3] == FSP_GUID_DATA4_3 && + ((struct ffs_file_header *)fsp)->name.data4[4] == FSP_GUID_DATA4_4 && + ((struct ffs_file_header *)fsp)->name.data4[5] == FSP_GUID_DATA4_5 && + ((struct ffs_file_header *)fsp)->name.data4[6] == FSP_GUID_DATA4_6 && + ((struct ffs_file_header *)fsp)->name.data4[7] == FSP_GUID_DATA4_7) { /* Add the FFS header size to find the raw section header */ - fsp += sizeof(struct ffs_file_header_t); + fsp += sizeof(struct ffs_file_header); } else { fsp = 0; } if (fsp && - ((struct raw_section_t *)fsp)->type == EFI_SECTION_RAW) { + ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) { /* Add the raw section header size to find the FSP header */ - fsp += sizeof(struct raw_section_t); + fsp += sizeof(struct raw_section); } else { fsp = 0; } @@ -99,7 +87,7 @@ u32 __attribute__((optimize("O0"))) find_fsp_header(void) return (u32)fsp; } -void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list) +void fsp_continue(struct shared_data *shared_data, u32 status, void *hob_list) { u32 stack_len; u32 stack_base; @@ -107,18 +95,18 @@ void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list) post_code(POST_MRC); - ASSERT(status == 0); + assert(status == 0); /* Get the migrated stack in normal memory */ - stack_base = (u32)get_bootloader_tmp_mem(hob_list, &stack_len); - ASSERT(stack_base != 0); + stack_base = (u32)fsp_get_bootloader_tmp_mem(hob_list, &stack_len); + assert(stack_base != 0); stack_top = stack_base + stack_len - sizeof(u32); /* * Old stack base is stored at the very end of the stack top, * use it to calculate the migrated shared data base */ - shared_data = (struct shared_data_t *)(stack_base + + shared_data = (struct shared_data *)(stack_base + ((u32)shared_data - *(u32 *)stack_top)); /* The boot loader main function entry */ @@ -127,50 +115,50 @@ void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list) void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) { - struct shared_data_t shared_data; + struct shared_data shared_data; fsp_init_f init; - struct fsp_init_params_t params; - struct fspinit_rtbuf_t rt_buf; - struct vpd_region_t *fsp_vpd; - struct fsp_header_t *fsp_hdr; - struct fsp_init_params_t *params_ptr; - struct upd_region_t *fsp_upd; - - fsp_hdr = (struct fsp_header_t *)find_fsp_header(); + struct fsp_init_params params; + struct fspinit_rtbuf rt_buf; + struct vpd_region *fsp_vpd; + struct fsp_header *fsp_hdr; + struct fsp_init_params *params_ptr; + struct upd_region *fsp_upd; + + fsp_hdr = (struct fsp_header *)find_fsp_header(); if (fsp_hdr == NULL) { /* No valid FSP info header was found */ - ASSERT(FALSE); + panic("Invalid FSP header"); } - fsp_upd = (struct upd_region_t *)&shared_data.fsp_upd; - memset((void *)&rt_buf, 0, sizeof(struct fspinit_rtbuf_t)); + fsp_upd = (struct upd_region *)&shared_data.fsp_upd; + memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf)); /* Reserve a gap in stack top */ rt_buf.common.stack_top = (u32 *)stack_top - 32; rt_buf.common.boot_mode = boot_mode; - rt_buf.common.upd_data = (struct upd_region_t *)fsp_upd; + rt_buf.common.upd_data = (struct upd_region *)fsp_upd; /* Get VPD region start */ - fsp_vpd = (struct vpd_region_t *)(fsp_hdr->img_base + + fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base + fsp_hdr->cfg_region_off); /* Verifify the VPD data region is valid */ - ASSERT((fsp_vpd->img_rev == VPD_IMAGE_REV) && + assert((fsp_vpd->img_rev == VPD_IMAGE_REV) && (fsp_vpd->sign == VPD_IMAGE_ID)); /* Copy default data from Flash */ memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset), - sizeof(struct upd_region_t)); + sizeof(struct upd_region)); /* Verifify the UPD data region is valid */ - ASSERT(fsp_upd->terminator == 0x55AA); + assert(fsp_upd->terminator == UPD_TERMINATOR); /* Override any UPD setting if required */ update_fsp_upd(fsp_upd); - memset((void *)¶ms, 0, sizeof(struct fsp_init_params_t)); + memset(¶ms, 0, sizeof(struct fsp_init_params)); params.nvs_buf = nvs_buf; - params.rt_buf = (struct fspinit_rtbuf_t *)&rt_buf; + params.rt_buf = (struct fspinit_rtbuf *)&rt_buf; params.continuation = (fsp_continuation_f)asm_continuation; init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init); @@ -199,32 +187,28 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) /* * Should never get here. - * Control will continue from romstage_main_continue_asm. + * Control will continue from fsp_continue. * This line below is to prevent the compiler from optimizing * structure intialization. + * + * DO NOT REMOVE! */ init(¶ms); - - /* - * Should never return. - * Control will continue from ContinuationFunc - */ - ASSERT(FALSE); } -u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase) +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) { fsp_notify_f notify; - struct fsp_notify_params_t params; - struct fsp_notify_params_t *params_ptr; + struct fsp_notify_params params; + struct fsp_notify_params *params_ptr; u32 status; if (!fsp_hdr) - fsp_hdr = (struct fsp_header_t *)find_fsp_header(); + fsp_hdr = (struct fsp_header *)find_fsp_header(); if (fsp_hdr == NULL) { /* No valid FSP info header */ - ASSERT(FALSE); + panic("Invalid FSP header"); } notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify); @@ -245,9 +229,9 @@ u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase) return status; } -u32 get_usable_lowmem_top(const void *hob_list) +u32 fsp_get_usable_lowmem_top(const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; phys_addr_t phys_start; u32 top; @@ -255,26 +239,26 @@ u32 get_usable_lowmem_top(const void *hob_list) hob.raw = (void *)hob_list; /* * Collect memory ranges */ - top = 0x100000; - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + top = FSP_LOWMEM_BASE; + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { if (hob.res_desc->type == RES_SYS_MEM) { phys_start = hob.res_desc->phys_start; /* Need memory above 1MB to be collected here */ - if (phys_start >= 0x100000 && - phys_start < (phys_addr_t)0x100000000) + if (phys_start >= FSP_LOWMEM_BASE && + phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) top += (u32)(hob.res_desc->len); } } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return top; } -u64 get_usable_highmem_top(const void *hob_list) +u64 fsp_get_usable_highmem_top(const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; phys_addr_t phys_start; u64 top; @@ -282,33 +266,33 @@ u64 get_usable_highmem_top(const void *hob_list) hob.raw = (void *)hob_list; /* Collect memory ranges */ - top = 0x100000000; - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + top = FSP_HIGHMEM_BASE; + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { if (hob.res_desc->type == RES_SYS_MEM) { phys_start = hob.res_desc->phys_start; /* Need memory above 1MB to be collected here */ - if (phys_start >= (phys_addr_t)0x100000000) + if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) top += (u32)(hob.res_desc->len); } } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return top; } -u64 get_fsp_reserved_mem_from_guid(const void *hob_list, u64 *len, - struct efi_guid_t *guid) +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, + struct efi_guid *guid) { - union hob_pointers_t hob; + union hob_pointers hob; /* Get the HOB list for processing */ hob.raw = (void *)hob_list; /* Collect memory ranges */ - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { if (hob.res_desc->type == RES_MEM_RESERVED) { if (compare_guid(&hob.res_desc->owner, guid)) { if (len) @@ -318,99 +302,100 @@ u64 get_fsp_reserved_mem_from_guid(const void *hob_list, u64 *len, } } } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return 0; } -u32 get_fsp_reserved_mem(const void *hob_list, u32 *len) +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; + const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; u64 length; u32 base; - base = (u32)get_fsp_reserved_mem_from_guid(hob_list, - &length, (struct efi_guid_t *)&guid); + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, (struct efi_guid *)&guid); if ((len != 0) && (base != 0)) *len = (u32)length; return base; } -u32 get_tseg_reserved_mem(const void *hob_list, u32 *len) +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; + const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; u64 length; u32 base; - base = (u32)get_fsp_reserved_mem_from_guid(hob_list, - &length, (struct efi_guid_t *)&guid); + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, (struct efi_guid *)&guid); if ((len != 0) && (base != 0)) *len = (u32)length; return base; } -void *get_next_hob(u16 type, const void *hob_list) +void *fsp_get_next_hob(u16 type, const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; - ASSERT(hob_list != NULL); + assert(hob_list != NULL); hob.raw = (u8 *)hob_list; /* Parse the HOB list until end of list or matching type is found */ - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == type) + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == type) return hob.raw; - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return NULL; } -void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list) +void *fsp_get_next_guid_hob(const struct efi_guid *guid, const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; hob.raw = (u8 *)hob_list; - while ((hob.raw = get_next_hob(HOB_TYPE_GUID_EXT, + while ((hob.raw = fsp_get_next_hob(HOB_TYPE_GUID_EXT, hob.raw)) != NULL) { if (compare_guid(guid, &hob.guid->name)) break; - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return hob.raw; } -void *get_guid_hob_data(const void *hob_list, u32 *len, struct efi_guid_t *guid) +void *fsp_get_guid_hob_data(const void *hob_list, u32 *len, + struct efi_guid *guid) { u8 *guid_hob; - guid_hob = get_next_guid_hob(guid, hob_list); + guid_hob = fsp_get_next_guid_hob(guid, hob_list); if (guid_hob == NULL) { return NULL; } else { if (len) - *len = GET_GUID_HOB_DATA_SIZE(guid_hob); + *len = get_guid_hob_data_size(guid_hob); - return GET_GUID_HOB_DATA(guid_hob); + return get_guid_hob_data(guid_hob); } } -void *get_fsp_nvs_data(const void *hob_list, u32 *len) +void *fsp_get_nvs_data(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; + const struct efi_guid guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; - return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid); + return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid); } -void *get_bootloader_tmp_mem(const void *hob_list, u32 *len) +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; + const struct efi_guid guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; - return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid); + return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid); } diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c new file mode 100644 index 0000000..8637cdc --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc.c @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/pci.h> +#include <asm/post.h> +#include <asm/arch/tnc.h> +#include <asm/arch/fsp/fsp_support.h> +#include <asm/processor.h> + +static void unprotect_spi_flash(void) +{ + u32 bc; + + bc = pci_read_config32(PCH_LPC_DEV, 0xd8); + bc |= 0x1; /* unprotect the flash */ + pci_write_config32(PCH_LPC_DEV, 0xd8, bc); +} + +int arch_cpu_init(void) +{ + struct pci_controller *hose; + int ret; + + post_code(POST_CPU_INIT); +#ifdef CONFIG_SYS_X86_TSC_TIMER + timer_set_base(rdtsc()); +#endif + + ret = x86_cpu_init_f(); + if (ret) + return ret; + + ret = pci_early_init_hose(&hose); + if (ret) + return ret; + + unprotect_spi_flash(); + + return 0; +} + +int print_cpuinfo(void) +{ + post_code(POST_CPU_INFO); + return default_print_cpuinfo(); +} + +void reset_cpu(ulong addr) +{ + /* cold reset */ + outb(0x06, PORT_RESET); +} + +void board_final_cleanup(void) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); + status = fsp_notify(NULL, INIT_PHASE_BOOT); + if (status != FSP_SUCCESS) + debug("fail, error code %x\n", status); + else + debug("OK\n"); + + return; +} diff --git a/arch/x86/cpu/queensbay/tnc_car.S b/arch/x86/cpu/queensbay/tnc_car.S new file mode 100644 index 0000000..5e09568 --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc_car.S @@ -0,0 +1,124 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <asm/post.h> + +.globl car_init +car_init: + /* + * Note: ebp holds the BIST value (built-in self test) so far, but ebp + * will be destroyed through the FSP call, thus we have to test the + * BIST value here before we call into FSP. + */ + test %ebp, %ebp + jz car_init_start + post_code(POST_BIST_FAILURE) + jmp die + +car_init_start: + post_code(POST_CAR_START) + lea find_fsp_header_romstack, %esp + jmp find_fsp_header + +find_fsp_header_ret: + /* EAX points to FSP_INFO_HEADER */ + mov %eax, %ebp + + /* sanity test */ + cmp $CONFIG_FSP_ADDR, %eax + jb die + + /* calculate TempRamInitEntry address */ + mov 0x30(%ebp), %eax + add 0x1c(%ebp), %eax + + /* call FSP TempRamInitEntry to setup temporary stack */ + lea temp_ram_init_romstack, %esp + jmp *%eax + +temp_ram_init_ret: + addl $4, %esp + cmp $0, %eax + jnz car_init_fail + + post_code(POST_CAR_CPU_CACHE) + + /* + * The FSP TempRamInit initializes the ecx and edx registers to + * point to a temporary but writable memory range (Cache-As-RAM). + * ecx: the start of this temporary memory range, + * edx: the end of this range. + */ + + /* stack grows down from top of CAR */ + movl %edx, %esp + + /* + * TODO: + * + * According to FSP architecture spec, the fsp_init() will not return + * to its caller, instead it requires the bootloader to provide a + * so-called continuation function to pass into the FSP as a parameter + * of fsp_init, and fsp_init() will call that continuation function + * directly. + * + * The call to fsp_init() may need to be moved out of the car_init() + * to cpu_init_f() with the help of some inline assembly codes. + * Note there is another issue that fsp_init() will setup another stack + * using the fsp_init parameter stack_top after DRAM is initialized, + * which means any data on the previous stack (on the CAR) gets lost + * (ie: U-Boot global_data). FSP is supposed to support such scenario, + * however it does not work. This should be revisited in the future. + */ + movl $CONFIG_FSP_TEMP_RAM_ADDR, %eax + xorl %edx, %edx + xorl %ecx, %ecx + call fsp_init + +.global fsp_init_done +fsp_init_done: + /* + * We come here from FspInit with eax pointing to the HOB list. + * Save eax to esi temporarily. + */ + movl %eax, %esi + /* + * Re-initialize the ebp (BIST) to zero, as we already reach here + * which means we passed BIST testing before. + */ + xorl %ebp, %ebp + jmp car_init_ret + +car_init_fail: + post_code(POST_CAR_FAILURE) + +die: + hlt + jmp die + hlt + + /* + * The function call before CAR initialization is tricky. It cannot + * be called using the 'call' instruction but only the 'jmp' with + * the help of a handcrafted stack in the ROM. The stack needs to + * contain the function return address as well as the parameters. + */ + .balign 4 +find_fsp_header_romstack: + .long find_fsp_header_ret + + .balign 4 +temp_ram_init_romstack: + .long temp_ram_init_ret + .long temp_ram_init_params +temp_ram_init_params: +_dt_ucode_base_size: + /* These next two fields are filled in by ifdtool */ + .long 0 /* microcode base */ + .long 0 /* microcode size */ + .long CONFIG_SYS_MONITOR_BASE /* code region base */ + .long CONFIG_SYS_MONITOR_LEN /* code region size */ diff --git a/arch/x86/cpu/queensbay/tnc_dram.c b/arch/x86/cpu/queensbay/tnc_dram.c new file mode 100644 index 0000000..8e97c9b --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc_dram.c @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/fsp/fsp_support.h> +#include <asm/e820.h> +#include <asm/post.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + phys_size_t ram_size = 0; + union hob_pointers hob; + + hob.raw = gd->arch.hob_list; + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { + if (hob.res_desc->type == RES_SYS_MEM || + hob.res_desc->type == RES_MEM_RESERVED) { + ram_size += hob.res_desc->len; + } + } + hob.raw = get_next_hob(hob); + } + + gd->ram_size = ram_size; + post_code(POST_DRAM); + + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = 0; + gd->bd->bi_dram[0].size = gd->ram_size; +} + +/* + * This function looks for the highest region of memory lower than 4GB which + * has enough space for U-Boot where U-Boot is aligned on a page boundary. + * It overrides the default implementation found elsewhere which simply + * picks the end of ram, wherever that may be. The location of the stack, + * the relocation address, and how far U-Boot is moved by relocation are + * set in the global data structure. + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + return fsp_get_usable_lowmem_top(gd->arch.hob_list); +} + +unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) +{ + unsigned num_entries = 0; + + union hob_pointers hob; + + hob.raw = gd->arch.hob_list; + + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { + entries[num_entries].addr = hob.res_desc->phys_start; + entries[num_entries].size = hob.res_desc->len; + + if (hob.res_desc->type == RES_SYS_MEM) + entries[num_entries].type = E820_RAM; + else if (hob.res_desc->type == RES_MEM_RESERVED) + entries[num_entries].type = E820_RESERVED; + } + hob.raw = get_next_hob(hob); + num_entries++; + } + + return num_entries; +} diff --git a/arch/x86/cpu/queensbay/tnc_pci.c b/arch/x86/cpu/queensbay/tnc_pci.c new file mode 100644 index 0000000..39bff49 --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc_pci.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <pci.h> +#include <asm/pci.h> +#include <asm/arch/fsp/fsp_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +void board_pci_setup_hose(struct pci_controller *hose) +{ + hose->first_busno = 0; + hose->last_busno = 0; + + /* PCI memory space */ + pci_set_region(hose->regions + 0, + CONFIG_PCI_MEM_BUS, + CONFIG_PCI_MEM_PHYS, + CONFIG_PCI_MEM_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 1, + CONFIG_PCI_IO_BUS, + CONFIG_PCI_IO_PHYS, + CONFIG_PCI_IO_SIZE, + PCI_REGION_IO); + + pci_set_region(hose->regions + 2, + CONFIG_PCI_PREF_BUS, + CONFIG_PCI_PREF_PHYS, + CONFIG_PCI_PREF_SIZE, + PCI_REGION_PREFETCH); + + pci_set_region(hose->regions + 3, + 0, + 0, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); + + hose->region_count = 4; +} + +int board_pci_post_scan(struct pci_controller *hose) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); + status = fsp_notify(NULL, INIT_PHASE_PCI); + if (status != FSP_SUCCESS) + debug("fail, error code %x\n", status); + else + debug("OK\n"); + + return 0; +} diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c new file mode 100644 index 0000000..b01422a --- /dev/null +++ b/arch/x86/cpu/queensbay/topcliff.c @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <malloc.h> +#include <pci.h> +#include <pci_ids.h> +#include <sdhci.h> + +static struct pci_device_id mmc_supported[] = { + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 }, + { } +}; + +int cpu_mmc_init(bd_t *bis) +{ + struct sdhci_host *mmc_host; + pci_dev_t devbusfn; + u32 iobase; + int ret; + int i; + + for (i = 0; i < ARRAY_SIZE(mmc_supported); i++) { + devbusfn = pci_find_devices(mmc_supported, i); + if (devbusfn == -1) + return -ENODEV; + + mmc_host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); + if (!mmc_host) + return -ENOMEM; + + mmc_host->name = "Topcliff SDHCI"; + pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase); + mmc_host->ioaddr = (void *)iobase; + mmc_host->quirks = 0; + ret = add_sdhci(mmc_host, 0, 0); + if (ret) + return ret; + } + + return 0; +} diff --git a/arch/x86/dts/coreboot.dtsi b/arch/x86/dts/coreboot.dtsi index c8dc4ce..65a93ac 100644 --- a/arch/x86/dts/coreboot.dtsi +++ b/arch/x86/dts/coreboot.dtsi @@ -6,7 +6,7 @@ }; serial { - compatible = "coreboot-uart"; + compatible = "x86-uart"; reg = <0x3f8 0x10>; reg-shift = <0>; io-mapped = <1>; diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 399dafb..3f43f3c 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -50,4 +50,11 @@ memory-map = <0xffe00000 0x00200000>; }; }; + + microcode { + update@0 { +#include "microcode/m0220661105_cv.dtsi" + }; + }; + }; diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 592af16..a739080 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -214,10 +214,10 @@ microcode { update@0 { -#include "m12206a7_00000028.dtsi" +#include "microcode/m12206a7_00000029.dtsi" }; update@1 { -#include "m12306a9_00000017.dtsi" +#include "microcode/m12306a9_0000001b.dtsi" }; }; diff --git a/arch/x86/dts/m12206a7_00000028.dtsi b/arch/x86/dts/m12206a7_00000028.dtsi deleted file mode 100644 index bcd5248..0000000 --- a/arch/x86/dts/m12206a7_00000028.dtsi +++ /dev/null @@ -1,622 +0,0 @@ -/* - * Copyright (c) <1995-2013>, Intel Corporation. - * All rights reserved. - * - * Redistribution. Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x28>; -intel,date-code = <0x04242012>; -intel,processor-signature = <0x000206a7>; -intel,checksum = <0xf3e9935d>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000028 - 0x00000000 0x00000000 0x20120423 0x000008f1 - 0x00000001 0x000206a7 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x000008f1 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x52b813ac 0xdb8994c7 0x70e9f6bb 0x9d6db2ff - 0xf4d70f5d 0x5b1eccf6 0xac59106f 0x0ae2e2c1 - 0x1a7bbeb1 0x355a1d62 0x2e7eb594 0x09f8dea9 - 0x432a49e4 0xbf520253 0xdafa4010 0x893a858a - 0x766e0efb 0xd91e196d 0x838bd2ef 0xe5146494 - 0xd515f413 0x29704828 0xe85598b6 0xdcbe6c51 - 0x88eabbfa 0xa1e8909f 0xd8931721 0x35386554 - 0x089a78a7 0xd9914775 0xd4644748 0x1556a4dc - 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Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x17>; -intel,date-code = <0x01092013>; -intel,processor-signature = <0x000306a9>; -intel,checksum = <0x3546450b>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000017 - 0x00000000 0x00000000 0x20130107 0x00000a61 - 0x00000001 0x000306a9 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x86c5b0d4 0xf6978804 0x7f4f5870 0x6319dc3c - 0xbb3b7d61 0x33cf9075 0xe8424658 0xf611a357 - 0x5a3401db 0x42caecce 0xb4d8e75e 0xe6dbaf24 - 0x7861b35f 0x6bd717bc 0x23b9b731 0x82ec1ac8 - 0x20337b64 0x5396dbf1 0x59973bff 0x724bc7e9 - 0x5237193b 0x0b8647c1 0x6a0d0e16 0xbf9ddb5b - 0xace2cc1c 0xad707638 0x056f102f 0xa37e60f8 - 0x76255642 0xfb86e030 0xb8069a40 0x367795f1 - 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0x96076ba4 0x250dc2f7 0xc4093548 0x030e777d - 0x7ea40933 0x8da7b1dd 0x59c0b79f 0x807d437c - 0xf5233ddf 0x54c1983f 0xfc18771b 0xe74b85f0 - 0xdbd725b5 0x70cdd153 0x4ffe300c 0xfda4bdae - 0xf4ac75d2 0x91c4e15a 0x34d92b97 0x16356a79 - >; diff --git a/arch/x86/dts/microcode/m0220661105_cv.dtsi b/arch/x86/dts/microcode/m0220661105_cv.dtsi new file mode 100644 index 0000000..ada8bfc --- /dev/null +++ b/arch/x86/dts/microcode/m0220661105_cv.dtsi @@ -0,0 +1,368 @@ +/* + * Copyright (c) <1995-2014>, Intel Corporation. + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + * + * Date: Sat Sep 13 22:51:38 CST 2014 + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x105>; +intel,date-code = <0x7182011>; +intel,processor-signature = <0x20661>; +intel,checksum = <0x52558795>; +intel,loader-revision = <1>; +intel,processor-flags = <0x2>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x05010000 0x11201807 0x61060200 + 0x95875552 0x01000000 0x02000000 0xd0130000 + 0x00140000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x05010000 + 0x19000000 0x00010500 0x15071120 0x01040000 + 0x01000000 0x61060200 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x9557a557 0x7d7a0fe3 0x8e2fbe53 0x0db9e346 + 0xd35c00d6 0x21bb34b7 0x662b6406 0xa0425035 + 0x3d028208 0xcb843695 0xee06be0a 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0x3ba56bb3 0x1c343938 0xabc0df54 + 0x8ba4f1e8 0xfbd4c592 0xb678c884 0xff3be2f1 + 0xca013570 0xfb0598df 0x3cb9cc1d 0xe3ba8ca3 + 0xc3d7ecee 0x0ae84a0b 0x0d70f0c3 0x963110ff + >; diff --git a/arch/x86/dts/microcode/m12206a7_00000029.dtsi b/arch/x86/dts/microcode/m12206a7_00000029.dtsi new file mode 100644 index 0000000..fe888bf --- /dev/null +++ b/arch/x86/dts/microcode/m12206a7_00000029.dtsi @@ -0,0 +1,686 @@ +/* + * Copyright (c) <1995-2014>, Intel Corporation. + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x29>; +intel,date-code = <0x6122013>; +intel,processor-signature = <0x206a7>; +intel,checksum = <0xc9c91df0>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x29000000 0x13201206 0xa7060200 + 0xf01dc9c9 0x01000000 0x12000000 0xd0270000 + 0x00280000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x29000000 + 0x00000000 0x00000000 0x11061320 0xd1090000 + 0x01000000 0xa7060200 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xd1090000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0xfd2a2f68 0x82ac7ebb 0xa4916328 0x7480b81b + 0xd329a777 0x25750339 0x9a8f7a9b 0xf1da9cb8 + 0xb1be7b1a 0x621d5a35 0x94b57e2e 0xa9def809 + 0xe4492a43 0x530252bf 0x1040fada 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/dev/null +++ b/arch/x86/dts/microcode/m12306a9_0000001b.dtsi @@ -0,0 +1,814 @@ +/* + * Copyright (c) <1995-2014>, Intel Corporation. + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x1b>; +intel,date-code = <0x5292014>; +intel,processor-signature = <0x306a9>; +intel,checksum = <0x579ae07a>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x1b000000 0x14202905 0xa9060300 + 0x7ae09a57 0x01000000 0x12000000 0xd02f0000 + 0x00300000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x1b000000 + 0x00000000 0x00000000 0x16051420 0x610b0000 + 0x01000000 0xa9060300 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0xc2b13ad8 0x6ce74fea 0xd364ad12 0xf6404a69 + 0xc89041e4 0x217fa2f6 0x6ff6e43f 0x79cde4eb + 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6 + 0x5fb36178 0xbc17d76b 0x31b7b923 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0xc5b1ec3f + 0x4f03be5f 0xa35fde17 0x537a59bb 0x793d1eb5 + 0xc11a0588 0x067e5593 0x102532c3 0x4024b312 + 0x32504cf4 0x4ddc0e9a 0xad5b1d24 0x41081874 + 0xf94fced4 0x16f39da6 0x9bdfbe58 0xc5615db4 + 0x1fdd769d 0x4278b52e 0x4525b8b6 0x7feed258 + 0xe0b4348b 0xb4925ccc 0x5547cc88 0x3f7f5443 + 0x5b8cc6d3 0xbe6a15cf 0x7308c088 0xde4219df + 0x4685593c 0xc4ae83a3 0xaea72ff0 0x403b0c08 + 0xe533a9aa 0xed46be76 0x4390bcd0 0x683a9f3f + 0x338b5cd3 0x7cd59689 0x2eb11aec 0x74e91cfd + 0x7ae588aa 0x0eadf94e 0x30a6b42f 0x1965f165 + 0xd96de54b 0x06c85abf 0x1bbc0ab8 0x79f3ddd0 + 0x871fd58d 0x498dd69d 0x9197dd0e 0x6cbb3a4f + 0x8a1f2a01 0x0d9cf747 0x80e66655 0x770d2b25 + 0x567bd3eb 0x59583c5a 0x58afeddd 0x9296d0e3 + 0xcf5af62c 0xf48b4c78 0x746f657e 0xe543b903 + 0x24603809 0xd1bceeea 0x16d04950 0x2a7c754b + 0x4ea8bb99 0x9daecb97 0x3045b9a9 0x4a3e84d9 + 0x5487e79f 0xd6145e57 0xc3b17f6f 0x14448bb6 + 0x8e8529f5 0xf895acb9 0x6605c0f0 0x52d00ca9 + 0xabf6e3e9 0x8f36e307 0xa7a15442 0x55144801 + 0x69b028b2 0x8ab3b912 0xb493f80e 0x2dc9fdfa + 0x1b091fbf 0x1bce6b31 0x79eb414e 0xe5f86ea0 + 0x39ef7dbd 0x2f86faf0 0xec366923 0xe770c7be + 0x74e4aa61 0xef3b9da0 0xd77bd8be 0xfd13d3cb + 0x4e8023c6 0x3d993904 0xfcb2f700 0xa14b753b + 0xde16c1c3 0x983c5a86 0x52ba5e61 0x1d67b044 + 0x0f9a302d 0x2f13b653 0x769cbb97 0xea3e1cbd + 0x5791778c 0x540fcff1 0x5e6c53f2 0xc9cbac0f + 0x40ceadf0 0x648713d3 0xb5347ada 0xfe280079 + 0xb8389f3f 0x5a6be26a 0x8e683d28 0x6a3e8e3a + 0x97ecac7a 0x70b648f1 0xe4eca20e 0x088cd0b4 + 0xbad30405 0x0f77e382 0x673cdf65 0x438af1f0 + 0x0b4f4eea 0xf0cc34e9 0x374a3c04 0x4370d27d + 0xc3e1e84d 0x141205c2 0xfa831e8d 0x32f2f10a + 0x77899366 0xc9d07590 0x9b6f2286 0xcac96a03 + 0xf822808b 0x265606cd 0xbeef275d 0x73415b15 + 0x4c87250e 0xf95a8c8a 0xdc8d6166 0x68522e63 + 0xb9becc14 0x7b5f20be 0x3d158dab 0xa73b1716 + 0x3b2cac15 0xf0498939 0xb60653bf 0x33fafc0e + 0x3b416955 0x3addca50 0x16ab21cf 0xd18cbdb6 + 0x3b29b87b 0xa6fb7e4b 0x6634147f 0x44283b1e + 0x430ae726 0xa907ab82 0x2baa6706 0x621d2390 + 0x15944559 0x2516c807 0x7d1eeb61 0xe2714121 + 0x288d3998 0x47713cbb 0xa1ce3c1e 0x0c29b6dd + 0x9923131c 0x2dd19cfa 0x83d0ece5 0x78474c7b + 0x92dee4f0 0xba5cb0f7 0x780c1d41 0x50da5a89 + 0xe303cebb 0xe8d5a2bd 0x7d6269a9 0xb75484f1 + 0x33ee8186 0x085b7657 0x7b1c7863 0xdb1a43ce + 0x3d0c4bf0 0x302c1292 0x81e42216 0xee1f2c9d + 0x822451ab 0xcefd8067 0x8330dc41 0x14492542 + 0xf038f54d 0x90a1abf9 0xc3067a77 0x40d9a42c + 0x127285c1 0x80ad15ff 0xaf4854e2 0xa47874f4 + 0x2ed59760 0x67252c6a 0xe2830f38 0x8150c00c + 0x16f61cca 0x1331f815 0x2d832d17 0x163c6010 + 0x69464e2f 0x99940411 0xbce5e85f 0x43d39ef2 + 0x9b7224dc 0x28652b6d 0x331a7632 0x127f669e + 0x44a034ad 0xe95d2cec 0x3d83fefb 0xfa6d40a2 + 0x9b535bf4 0xc83411ce 0xd661655b 0x64bcd8d2 + 0xd99e1570 0x7dc4d877 0x9756b210 0x7623dc0d + 0x484dd33f 0xe7bca204 0xa06efbc5 0xa358c03f + 0x362cb282 0xe40e6d04 0x17ab9f5e 0x79a71a09 + 0x804bf1a9 0x6bca7d73 0x5504a4ff 0xd3946f75 + 0x18b0b9d4 0xd85993cc 0x94d000a5 0x8dda1609 + 0x30afb8f6 0xb3c99c3c 0x7686d59d 0x68b719db + 0xdc7b3edb 0xedb76012 0xbfa0ba3b 0x280b829d + 0x72fcf1aa 0xe3d8f83c 0x088a57cf 0x95156217 + 0x3306eb47 0x1d09cf54 0x1391876f 0x5b15ecde + 0xb46104e1 0x8d8f2593 0x90ee50cc 0x78dad4b2 + 0xfd96daee 0xdbf15e95 0xfc859faa 0xdb4422a5 + 0xa00eeab6 0x525232c6 0x9b665668 0x8a70518b + 0xbb27f7ac 0xb066b096 0x25754db6 0xe8c7d748 + 0xd4e8d361 0x380dd246 0x9bdf15e6 0x6823c660 + 0x5d408fe7 0xe59a5a89 0x1eb7523b 0x4997158e + 0xfa6214d2 0x03b35025 0x9aeff33c 0x20a38aad + 0x522f79cd 0x4141f19c 0xc58cd2bd 0xc816da37 + 0x62c6f8d9 0xc15ea9f4 0x138d1f45 0xd36cef03 + 0x88183bd6 0xe0de9036 0xefcbe8fc 0x5ebdce26 + 0x9e83b01b 0xd35f6747 0x552951f1 0x4e20dd66 + 0x419702b1 0x45446e7c 0x7ce5616b 0x6152e3a8 + 0xffd572e1 0x4fab25b0 0x07563b80 0x98720ee7 + 0x176d29bf 0x21cbd730 0xbde74431 0x09a8cce2 + 0xc15e548e 0xe6a92b4b 0x14f17e74 0x75f7817b + 0x592143e8 0x113dbd25 0x5f7d7160 0xbdd8b1e0 + 0x6ce045e5 0x53b27b2d 0x371c8aa8 0xa4da8be0 + 0xf1f6df4e 0x9519bac4 0x6d6169cf 0x7846253f + 0xccb95d95 0x6ad11a98 0x4a3bd21d 0x5389f44c + 0x7c07ef3a 0xb983ca57 0xcf7f290d 0x4ec516f1 + 0xa7711e70 0x818d45a9 0x49db6441 0xd032fc2a + 0x657df4d3 0xe37e6809 0x459a22da 0x41df8aa5 + 0x462108a6 0x65177d27 0x1ddffa9f 0x7fa6631b + 0xdd7a414c 0x6351f0d1 0x1b38a419 0x6b529c8e + 0x167745e4 0xcac35897 0x3d7bf419 0xd59ed67a + 0x6486b2c9 0x9ae4fc90 0x8f608920 0xd35335c0 + 0x8f113cba 0x0fcc11a1 0xdc180fbf 0x57a99319 + 0x2c54185f 0x764c18d0 0x4f84b111 0x30a11040 + 0xd15620af 0x496af145 0x263b2de2 0x3ff103dd + 0x38484dac 0xf143a3bc 0xb62c0de6 0xb122c545 + 0x72f10466 0x63728442 0xee0117c9 0x2309f14b + 0x4ccdd5de 0x37ae022d 0x2ee7f050 0xf2aa9af6 + 0xcd314a20 0x86954941 0x97215303 0xcd7e1687 + 0x1dab6672 0x1c920209 0x41102dae 0x8b21c8ab + 0x6f70b04b 0x2988b209 0x86e6f033 0x5eb91718 + 0x925b3c40 0xdcad0288 0x0ee98331 0xc3096ceb + 0x9fa04740 0x3ce3fb23 0x90d75cbd 0xeab21768 + 0xaca5db0a 0x1c440578 0x762cb728 0x315a699f + 0xcd2b6490 0x11e3e267 0xa10d1bbc 0x23ac26d3 + 0xc0c7c268 0x37ecf7ac 0x28de6fe5 0x6fb8e3e8 + 0x583d1131 0x8370812a 0x3afd5d58 0x4569a06e + 0xf27ad86f 0x0db6a631 0x9add5128 0x1748c9fd + 0xc46e3c57 0x4c0df93e 0xc595c544 0x397f7e7e + 0x241f4086 0x7d7ed51b 0x56027473 0x656a6110 + 0x970a8011 0xf9c7beb5 0xc6cb9957 0xb7426461 + 0x62d3d89d 0xf99d48ca 0x3e4d4a88 0x9f751b71 + 0xfa020205 0xa3124337 0x59935869 0x98c58314 + 0xff7c4385 0x69191265 0xaf85ebb9 0xe434cda2 + 0xb1ad3e0e 0x221d32e1 0x022d73a0 0xd676ce06 + 0xab7f0c21 0x915c2444 0xf5bdaba2 0x74e4e789 + 0x11ff0d95 0x58c53feb 0xa54eb847 0x9af982ae + 0x8d721596 0x73510fe4 0x95e3bd19 0xd82f8359 + 0xc09cdd5b 0xc07f57a4 0xbece605b 0xa8a43c5b + 0x0acbeb6d 0x3c5cd8ce 0xb631050d 0xd558c921 + 0xcb5054c2 0xefb06252 0x40d2e2cc 0x14ffe6ff + 0x761001a9 0xad64e7a5 0xb55618b4 0x2a40a1fc + 0x2cbe6d40 0x2bc18fc1 0x196e7092 0x3c137791 + 0xa799eb23 0x1156feb9 0xd55d7ed1 0x0149c315 + 0xae77081f 0xfe724690 0x55ed2fd7 0x04b18cd7 + 0x691583f4 0xb1be4fde 0x19ae1cf7 0x3250140b + 0x35daeeb2 0xc9459a84 0xea2c19e1 0x57f8c9cb + 0xe05e07a4 0xcc77a363 0x43afd702 0x48305862 + 0x6c4b459f 0x66ed6178 0x26be9f81 0xeac41ee5 + 0xbe5e2e6b 0x177f9068 0xede56c48 0x438b3811 + 0xd5bd7ee4 0xc027d1a8 0xc1c0f725 0x48d4d4eb + 0x6ffa28d5 0xbd6ac9eb 0xd497781d 0x24d3a154 + 0x409bb5c0 0x8079bf76 0x90a522dc 0x19bf7033 + 0x1a529b6e 0xe5207e4d 0x3d49b7bc 0x3eca6d54 + 0xa37681a6 0xaa9a62e4 0xe54aa1e1 0xb91e7157 + 0x8cce8f65 0xbcbbd62c 0x7fa477b5 0x44f46b50 + 0x54263fcf 0x529cbb5d 0x8923e390 0x0778d6d7 + 0x0cc0503f 0x02c374ce 0xb89c3e5c 0x25b1b353 + 0xb227cb2d 0x44108698 0x5e5968c2 0x82c48632 + 0x0b8f4209 0x1a241879 0x9edca6f1 0xa1fa51ab + 0x206db0c6 0xbfbbbe98 0xa71c91f6 0xa1b28056 + 0xb8bfaaa9 0xa5914f75 0x77d26574 0xacfd459d + 0x77f7cab2 0x249ebf26 0xef902bdd 0x77f6e48d + 0x82497035 0x93333a9d 0x34ea9953 0x8f08d41c + >; diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h index 25b938f..a9d7156 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h @@ -14,9 +14,7 @@ */ typedef void (*fsp_continuation_f)(u32 status, void *hob_list); -#pragma pack(1) - -struct fsp_init_params_t { +struct fsp_init_params { /* Non-volatile storage buffer pointer */ void *nvs_buf; /* Runtime buffer pointer */ @@ -25,7 +23,7 @@ struct fsp_init_params_t { fsp_continuation_f continuation; }; -struct common_buf_t { +struct common_buf { /* * Stack top pointer used by the bootloader. The new stack frame will be * set up at this location after FspInit API call. @@ -36,24 +34,22 @@ struct common_buf_t { u32 reserved[7]; /* Reserved */ }; -enum fsp_phase_t { +enum fsp_phase { /* Notification code for post PCI enuermation */ INIT_PHASE_PCI = 0x20, /* Notification code before transfering control to the payload */ INIT_PHASE_BOOT = 0x40 }; -struct fsp_notify_params_t { +struct fsp_notify_params { /* Notification phase used for NotifyPhase API */ - enum fsp_phase_t phase; + enum fsp_phase phase; }; -#pragma pack() - /* FspInit API function prototype */ -typedef u32 (*fsp_init_f)(struct fsp_init_params_t *param); +typedef u32 (*fsp_init_f)(struct fsp_init_params *params); /* FspNotify API function prototype */ -typedef u32 (*fsp_notify_f)(struct fsp_notify_params_t *param); +typedef u32 (*fsp_notify_f)(struct fsp_notify_params *params); #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h index 1f73680..eaec2b4 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h @@ -8,10 +8,8 @@ #ifndef __FSP_FFS_H__ #define __FSP_FFS_H__ -#pragma pack(1) - /* Used to verify the integrity of the file */ -union ffs_integrity_t { +union __packed ffs_integrity { struct { /* * The IntegrityCheck.checksum.header field is an 8-bit @@ -43,14 +41,14 @@ union ffs_integrity_t { * Each file begins with the header that describe the * contents and state of the files. */ -struct ffs_file_header_t { +struct __packed ffs_file_header { /* * This GUID is the file name. * It is used to uniquely identify the file. */ - struct efi_guid_t name; + struct efi_guid name; /* Used to verify the integrity of the file */ - union ffs_integrity_t integrity; + union ffs_integrity integrity; /* Identifies the type of file */ u8 type; /* Declares various file attribute bits */ @@ -64,16 +62,16 @@ struct ffs_file_header_t { u8 state; }; -struct ffs_file_header2_t { +struct __packed ffs_file_header2 { /* * This GUID is the file name. It is used to uniquely identify the file. * There may be only one instance of a file with the file name GUID of * Name in any given firmware volume, except if the file type is * EFI_FV_FILE_TYPE_FFS_PAD. */ - struct efi_guid_t name; + struct efi_guid name; /* Used to verify the integrity of the file */ - union ffs_integrity_t integrity; + union ffs_integrity integrity; /* Identifies the type of file */ u8 type; /* Declares various file attribute bits */ @@ -81,9 +79,9 @@ struct ffs_file_header2_t { /* * The length of the file in bytes, including the FFS header. * The length of the file data is either - * (size - sizeof(struct ffs_file_header_t)). This calculation means a + * (size - sizeof(struct ffs_file_header)). This calculation means a * zero-length file has a size of 24 bytes, which is - * sizeof(struct ffs_file_header_t). Size is not required to be a + * sizeof(struct ffs_file_header). Size is not required to be a * multiple of 8 bytes. Given a file F, the next file header is located * at the next 8-byte aligned firmware volume offset following the last * byte of the file F. @@ -98,7 +96,7 @@ struct ffs_file_header2_t { * If FFS_ATTRIB_LARGE_FILE is set in attr, then ext_size exists * and size must be set to zero. * If FFS_ATTRIB_LARGE_FILE is not set then - * struct ffs_file_header_t is used. + * struct ffs_file_header is used. */ u32 ext_size; }; @@ -129,7 +127,7 @@ struct ffs_file_header2_t { #define EFI_SECTION_SMM_DEPEX 0x1C /* Common section header */ -struct raw_section_t { +struct __packed raw_section { /* * A 24-bit unsigned integer that contains the total size of * the section in bytes, including the EFI_COMMON_SECTION_HEADER. @@ -138,7 +136,7 @@ struct raw_section_t { u8 type; }; -struct raw_section2_t { +struct __packed raw_section2 { /* * A 24-bit unsigned integer that contains the total size of * the section in bytes, including the EFI_COMMON_SECTION_HEADER. @@ -153,6 +151,4 @@ struct raw_section2_t { u32 ext_size; }; -#pragma pack() - #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h index 01300db..a024451 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h @@ -63,7 +63,7 @@ #define EFI_FVB2_ALIGNMENT_1G 0x001E0000 #define EFI_FVB2_ALIGNMENT_2G 0x001F0000 -struct fv_blkmap_entry_t { +struct fv_blkmap_entry { /* The number of sequential blocks which are of the same size */ u32 num_blocks; /* The size of the blocks */ @@ -71,7 +71,7 @@ struct fv_blkmap_entry_t { }; /* Describes the features and layout of the firmware volume */ -struct fv_header_t { +struct fv_header { /* * The first 16 bytes are reserved to allow for the reset vector of * processors whose reset vector is at address 0. @@ -81,7 +81,7 @@ struct fv_header_t { * Declares the file system with which the firmware volume * is formatted. */ - struct efi_guid_t fs_guid; + struct efi_guid fs_guid; /* * Length in bytes of the complete firmware volume, including * the header. @@ -118,18 +118,18 @@ struct fv_header_t { * An array of run-length encoded FvBlockMapEntry structures. * The array is terminated with an entry of {0,0}. */ - struct fv_blkmap_entry_t block_map[1]; + struct fv_blkmap_entry block_map[1]; }; -#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') +#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') /* Firmware Volume Header Revision definition */ #define EFI_FVH_REVISION 0x02 /* Extension header pointed by ExtHeaderOffset of volume header */ -struct fv_ext_header_t { +struct fv_ext_header { /* firmware volume name */ - struct efi_guid_t fv_name; + struct efi_guid fv_name; /* Size of the rest of the extension header including this structure */ u32 ext_hdr_size; }; diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h index 44c0f90..380b64e 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h @@ -19,14 +19,14 @@ * Describes the format and size of the data inside the HOB. * All HOBs must contain this generic HOB header. */ -struct hob_header_t { +struct hob_header { u16 type; /* HOB type */ u16 len; /* HOB length */ u32 reserved; /* always zero */ }; /* Enumeration of memory types introduced in UEFI */ -enum efi_mem_type_t { +enum efi_mem_type { EFI_RESERVED_MEMORY_TYPE, /* * The code portions of a loaded application. @@ -87,16 +87,16 @@ enum efi_mem_type_t { * exist outside the HOB list. This HOB type describes how memory is used, * not the physical attributes of memory. */ -struct hob_mem_alloc_t { - struct hob_header_t hdr; +struct hob_mem_alloc { + struct hob_header hdr; /* * A GUID that defines the memory allocation region's type and purpose, * as well as other fields within the memory allocation HOB. This GUID * is used to define the additional data within the HOB that may be - * present for the memory allocation HOB. Type efi_guid_t is defined in + * present for the memory allocation HOB. Type efi_guid is defined in * InstallProtocolInterface() in the UEFI 2.0 specification. */ - struct efi_guid_t name; + struct efi_guid name; /* * The base address of memory allocated by this HOB. * Type phys_addr_t is defined in AllocatePages() in the UEFI 2.0 @@ -111,7 +111,7 @@ struct hob_mem_alloc_t { * Type EFI_MEMORY_TYPE is defined in AllocatePages() in the UEFI 2.0 * specification. */ - enum efi_mem_type_t mem_type; + enum efi_mem_type mem_type; /* padding */ u8 reserved[4]; }; @@ -155,14 +155,14 @@ struct hob_mem_alloc_t { * Describes the resource properties of all fixed, nonrelocatable resource * ranges found on the processor host bus during the HOB producer phase. */ -struct hob_res_desc_t { - struct hob_header_t hdr; +struct hob_res_desc { + struct hob_header hdr; /* * A GUID representing the owner of the resource. This GUID is * used by HOB consumer phase components to correlate device * ownership of a resource. */ - struct efi_guid_t owner; + struct efi_guid owner; u32 type; u32 attr; /* The physical start address of the resource region */ @@ -175,24 +175,24 @@ struct hob_res_desc_t { * Allows writers of executable content in the HOB producer phase to * maintain and manage HOBs with specific GUID. */ -struct hob_guid_t { - struct hob_header_t hdr; +struct hob_guid { + struct hob_header hdr; /* A GUID that defines the contents of this HOB */ - struct efi_guid_t name; + struct efi_guid name; /* GUID specific data goes here */ }; /* Union of all the possible HOB Types */ -union hob_pointers_t { - struct hob_header_t *hdr; - struct hob_mem_alloc_t *mem_alloc; - struct hob_res_desc_t *res_desc; - struct hob_guid_t *guid; +union hob_pointers { + struct hob_header *hdr; + struct hob_mem_alloc *mem_alloc; + struct hob_res_desc *res_desc; + struct hob_guid *guid; u8 *raw; }; /** - * Returns the type of a HOB. + * get_hob_type() - return the type of a HOB * * This macro returns the type field from the HOB header for the * HOB specified by hob. @@ -201,11 +201,13 @@ union hob_pointers_t { * * @return: HOB type. */ -#define GET_HOB_TYPE(hob) \ - ((*(struct hob_header_t **)&(hob))->type) +static inline u16 get_hob_type(union hob_pointers hob) +{ + return hob.hdr->type; +} /** - * Returns the length, in bytes, of a HOB. + * get_hob_length() - return the length, in bytes, of a HOB * * This macro returns the len field from the HOB header for the * HOB specified by hob. @@ -214,11 +216,13 @@ union hob_pointers_t { * * @return: HOB length. */ -#define GET_HOB_LENGTH(hob) \ - ((*(struct hob_header_t **)&(hob))->len) +static inline u16 get_hob_length(union hob_pointers hob) +{ + return hob.hdr->len; +} /** - * Returns a pointer to the next HOB in the HOB list. + * get_next_hob() - return a pointer to the next HOB in the HOB list * * This macro returns a pointer to HOB that follows the HOB specified by hob * in the HOB List. @@ -227,25 +231,31 @@ union hob_pointers_t { * * @return: A pointer to the next HOB in the HOB list. */ -#define GET_NEXT_HOB(hob) \ - (void *)(*(u8 **)&(hob) + GET_HOB_LENGTH(hob)) +static inline void *get_next_hob(union hob_pointers hob) +{ + return (void *)(*(u8 **)&(hob) + get_hob_length(hob)); +} /** - * Determines if a HOB is the last HOB in the HOB list. + * end_of_hob() - determine if a HOB is the last HOB in the HOB list * * This macro determine if the HOB specified by hob is the last HOB in the - * HOB list. If hob is last HOB in the HOB list, then TRUE is returned. - * Otherwise, FALSE is returned. + * HOB list. If hob is last HOB in the HOB list, then true is returned. + * Otherwise, false is returned. * * @hob: A pointer to a HOB. * - * @retval TRUE: The HOB specified by hob is the last HOB in the HOB list. - * @retval FALSE: The HOB specified by hob is not the last HOB in the HOB list. + * @retval true: The HOB specified by hob is the last HOB in the HOB list. + * @retval false: The HOB specified by hob is not the last HOB in the HOB list. */ -#define END_OF_HOB(hob) (GET_HOB_TYPE(hob) == (u16)HOB_TYPE_EOH) +static inline bool end_of_hob(union hob_pointers hob) +{ + return get_hob_type(hob) == HOB_TYPE_EOH; +} /** - * Returns a pointer to data buffer from a HOB of type HOB_TYPE_GUID_EXT. + * get_guid_hob_data() - return a pointer to data buffer from a HOB of + * type HOB_TYPE_GUID_EXT * * This macro returns a pointer to the data buffer in a HOB specified by hob. * hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT. @@ -254,11 +264,14 @@ union hob_pointers_t { * * @return: A pointer to the data buffer in a HOB. */ -#define GET_GUID_HOB_DATA(hob) \ - (void *)(*(u8 **)&(hob) + sizeof(struct hob_guid_t)) +static inline void *get_guid_hob_data(u8 *hob) +{ + return (void *)(hob + sizeof(struct hob_guid)); +} /** - * Returns the size of the data buffer from a HOB of type HOB_TYPE_GUID_EXT. + * get_guid_hob_data_size() - return the size of the data buffer from a HOB + * of type HOB_TYPE_GUID_EXT * * This macro returns the size, in bytes, of the data buffer in a HOB * specified by hob. hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT. @@ -267,14 +280,31 @@ union hob_pointers_t { * * @return: The size of the data buffer. */ -#define GET_GUID_HOB_DATA_SIZE(hob) \ - (u16)(GET_HOB_LENGTH(hob) - sizeof(struct hob_guid_t)) +static inline u16 get_guid_hob_data_size(u8 *hob) +{ + union hob_pointers hob_p = *(union hob_pointers *)hob; + return get_hob_length(hob_p) - sizeof(struct hob_guid); +} /* FSP specific GUID HOB definitions */ +#define FSP_GUID_DATA1 0x912740be +#define FSP_GUID_DATA2 0x2284 +#define FSP_GUID_DATA3 0x4734 +#define FSP_GUID_DATA4_0 0xb9 +#define FSP_GUID_DATA4_1 0x71 +#define FSP_GUID_DATA4_2 0x84 +#define FSP_GUID_DATA4_3 0xb0 +#define FSP_GUID_DATA4_4 0x27 +#define FSP_GUID_DATA4_5 0x35 +#define FSP_GUID_DATA4_6 0x3f +#define FSP_GUID_DATA4_7 0x0c + #define FSP_HEADER_GUID \ { \ - 0x912740be, 0x2284, 0x4734, \ - {0xb9, 0x71, 0x84, 0xb0, 0x27, 0x35, 0x3f, 0x0c} \ + FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ + { FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ + FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ + FSP_GUID_DATA4_6, FSP_GUID_DATA4_7 } \ } #define FSP_NON_VOLATILE_STORAGE_HOB_GUID \ diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h index ad78bcd..4a4d627 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h @@ -10,9 +10,7 @@ #define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */ -#pragma pack(1) - -struct fsp_header_t { +struct __packed fsp_header { u32 sign; /* 'FSPH' */ u32 hdr_len; /* header length */ u8 reserved1[3]; @@ -31,6 +29,4 @@ struct fsp_header_t { u32 reserved2; }; -#pragma pack() - #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h index a7b6e6b..61286ce 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h @@ -8,12 +8,8 @@ #ifndef __FSP_PLATFORM_H__ #define __FSP_PLATFORM_H__ -#pragma pack(1) - -struct fspinit_rtbuf_t { - struct common_buf_t common; /* FSP common runtime data structure */ +struct fspinit_rtbuf { + struct common_buf common; /* FSP common runtime data structure */ }; -#pragma pack() - #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h index 3296a2b..3ae1b66 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h @@ -18,14 +18,30 @@ #include "fsp_bootmode.h" #include "fsp_vpd.h" -struct shared_data_t { - struct fsp_header_t *fsp_hdr; +struct shared_data { + struct fsp_header *fsp_hdr; u32 *stack_top; - struct upd_region_t fsp_upd; + struct upd_region fsp_upd; }; +#define FSP_LOWMEM_BASE 0x100000UL +#define FSP_HIGHMEM_BASE 0x100000000ULL + +/** + * FSP Continuation assembly helper routine + * + * This routine jumps to the C version of FSP continuation function + */ void asm_continuation(void); +/** + * FSP initialization complete + * + * This is the function that indicates FSP initialization is complete and jumps + * back to the bootloader with HOB list pointer as the parameter. + * + * @hob_list: HOB list pointer + */ void fsp_init_done(void *hob_list); /** @@ -37,19 +53,12 @@ void fsp_init_done(void *hob_list); * * @retval: Never returns */ -void fsp_continue(struct shared_data_t *shared_data, u32 status, +void fsp_continue(struct shared_data *shared_data, u32 status, void *hob_list); /** * Find FSP header offset in FSP image * - * If this function is called before the a stack is established, special care - * must be taken. First, it cannot declare any local variable using stack. - * Only register variable can be used here. Secondly, some compiler version - * will add prolog or epilog code for the C function. If so the function call - * may not work before stack is ready. GCC 4.8.1 has been verified to be - * working for the following code. - * * @retval: the offset of FSP header. If signature is invalid, returns 0. */ u32 find_fsp_header(void); @@ -67,11 +76,11 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); * FSP notification wrapper function * * @fsp_hdr: Pointer to FSP information header - * @phase: FSP initialization phase defined in enum fsp_phase_t + * @phase: FSP initialization phase defined in enum fsp_phase * * @retval: compatible status code with EFI_STATUS defined in PI spec */ -u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase); +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); /** * This function retrieves the top of usable low memory. @@ -80,7 +89,7 @@ u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase); * * @retval: Usable low memory top. */ -u32 get_usable_lowmem_top(const void *hob_list); +u32 fsp_get_usable_lowmem_top(const void *hob_list); /** * This function retrieves the top of usable high memory. @@ -89,7 +98,7 @@ u32 get_usable_lowmem_top(const void *hob_list); * * @retval: Usable high memory top. */ -u64 get_usable_highmem_top(const void *hob_list); +u64 fsp_get_usable_highmem_top(const void *hob_list); /** * This function retrieves a special reserved memory region. @@ -102,8 +111,8 @@ u64 get_usable_highmem_top(const void *hob_list); * @retval: Reserved region start address. * 0 if this region does not exist. */ -u64 get_fsp_reserved_mem_from_guid(const void *hob_list, - u64 *len, struct efi_guid_t *guid); +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, + u64 *len, struct efi_guid *guid); /** * This function retrieves the FSP reserved normal memory. @@ -114,7 +123,7 @@ u64 get_fsp_reserved_mem_from_guid(const void *hob_list, * @retval: FSP reserved memory base * 0 if this region does not exist. */ -u32 get_fsp_reserved_mem(const void *hob_list, u32 *len); +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); /** * This function retrieves the TSEG reserved normal memory. @@ -126,7 +135,7 @@ u32 get_fsp_reserved_mem(const void *hob_list, u32 *len); * @retval NULL: Failed to find the TSEG reserved memory. * @retval others: TSEG reserved memory base. */ -u32 get_tseg_reserved_mem(const void *hob_list, u32 *len); +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); /** * Returns the next instance of a HOB type from the starting HOB. @@ -136,7 +145,7 @@ u32 get_tseg_reserved_mem(const void *hob_list, u32 *len); * * @retval: A HOB object with matching type; Otherwise NULL. */ -void *get_next_hob(u16 type, const void *hob_list); +void *fsp_get_next_hob(u16 type, const void *hob_list); /** * Returns the next instance of the matched GUID HOB from the starting HOB. @@ -146,7 +155,7 @@ void *get_next_hob(u16 type, const void *hob_list); * * @retval: A HOB object with matching GUID; Otherwise NULL. */ -void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list); +void *fsp_get_next_guid_hob(const struct efi_guid *guid, const void *hob_list); /** * This function retrieves a GUID HOB data buffer and size. @@ -159,8 +168,8 @@ void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list); * @retval NULL: Failed to find the GUID HOB. * @retval others: GUID HOB data buffer pointer. */ -void *get_guid_hob_data(const void *hob_list, u32 *len, - struct efi_guid_t *guid); +void *fsp_get_guid_hob_data(const void *hob_list, u32 *len, + struct efi_guid *guid); /** * This function retrieves FSP Non-volatile Storage HOB buffer and size. @@ -172,7 +181,7 @@ void *get_guid_hob_data(const void *hob_list, u32 *len, * @retval NULL: Failed to find the NVS HOB. * @retval others: FSP NVS data buffer pointer. */ -void *get_fsp_nvs_data(const void *hob_list, u32 *len); +void *fsp_get_nvs_data(const void *hob_list, u32 *len); /** * This function retrieves Bootloader temporary stack buffer and size. @@ -184,15 +193,15 @@ void *get_fsp_nvs_data(const void *hob_list, u32 *len); * @retval NULL: Failed to find the bootloader temporary stack HOB. * @retval others: Bootloader temporary stackbuffer pointer. */ -void *get_bootloader_tmp_mem(const void *hob_list, u32 *len); +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); /** * This function overrides the default configurations in the UPD data region. * - * @fsp_upd: A pointer to the upd_region_t data strcture + * @fsp_upd: A pointer to the upd_region data strcture * * @return: None */ -void update_fsp_upd(struct upd_region_t *fsp_upd); +void update_fsp_upd(struct upd_region *fsp_upd); #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h index 12ebbfd..f32d827 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h @@ -8,20 +8,8 @@ #ifndef __FSP_TYPES_H__ #define __FSP_TYPES_H__ -/* - * Boolean true value. UEFI Specification defines this value to be 1, - * but this form is more portable. - */ -#define TRUE ((unsigned char)(1 == 1)) - -/* - * Boolean false value. UEFI Specification defines this value to be 0, - * but this form is more portable. - */ -#define FALSE ((unsigned char)(0 == 1)) - /* 128 bit buffer containing a unique identifier value */ -struct efi_guid_t { +struct efi_guid { u32 data1; u16 data2; u16 data3; @@ -80,9 +68,6 @@ struct efi_guid_t { #define SIGNATURE_64(A, B, C, D, E, F, G, H) \ (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32)) -/* Assertion for debug */ -#define ASSERT(exp) do { if (!(exp)) for (;;); } while (FALSE) - /* * Define FSP API return status code. * Compatiable with EFI_STATUS defined in PI Spec. diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h index 11cc32f..bce58b1 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h @@ -10,9 +10,9 @@ #ifndef __VPDHEADER_H__ #define __VPDHEADER_H__ -#pragma pack(1) +#define UPD_TERMINATOR 0x55AA -struct upd_region_t { +struct __packed upd_region { u64 sign; /* Offset 0x0000 */ u64 reserved; /* Offset 0x0008 */ u8 dummy[240]; /* Offset 0x0010 */ @@ -39,7 +39,7 @@ struct upd_region_t { #define VPD_IMAGE_ID 0x445056574F4E4E4D /* 'MNNOWVPD' */ #define VPD_IMAGE_REV 0x00000301 -struct vpd_region_t { +struct __packed vpd_region { u64 sign; /* Offset 0x0000 */ u32 img_rev; /* Offset 0x0008 */ u32 upd_offset; /* Offset 0x000C */ @@ -53,6 +53,4 @@ struct vpd_region_t { u8 pcie_port_ioh; /* Offset 0x0029 */ }; -#pragma pack() - #endif diff --git a/arch/x86/include/asm/arch-queensbay/gpio.h b/arch/x86/include/asm/arch-queensbay/gpio.h new file mode 100644 index 0000000..ab4e059 --- /dev/null +++ b/arch/x86/include/asm/arch-queensbay/gpio.h @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _X86_ARCH_GPIO_H_ +#define _X86_ARCH_GPIO_H_ + +/* Where in config space is the register that points to the GPIO registers? */ +#define PCI_CFG_GPIOBASE 0x44 + +#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h new file mode 100644 index 0000000..67c5e05 --- /dev/null +++ b/arch/x86/include/asm/arch-queensbay/tnc.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _X86_ARCH_TNC_H_ +#define _X86_ARCH_TNC_H_ + +#include <pci.h> + +/* PCI Configuration Space (D31:F0): LPC */ +#define PCH_LPC_DEV PCI_BDF(0, 0x1f, 0) + +#endif /* _X86_ARCH_TNC_H_ */ diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h index 1787e52..1099427 100644 --- a/arch/x86/include/asm/gpio.h +++ b/arch/x86/include/asm/gpio.h @@ -11,7 +11,7 @@ #include <asm-generic/gpio.h> struct ich6_bank_platdata { - uint32_t base_addr; + uint16_t base_addr; const char *bank_name; }; @@ -147,7 +147,7 @@ struct pch_gpio_map { } set3; }; -void setup_pch_gpios(u32 gpiobase, const struct pch_gpio_map *gpio); +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio); void ich_gpio_set_gpio_map(const struct pch_gpio_map *map); #endif /* _X86_GPIO_H_ */ diff --git a/arch/x86/include/asm/ibmpc.h b/arch/x86/include/asm/ibmpc.h index e6d183b..c3b5187 100644 --- a/arch/x86/include/asm/ibmpc.h +++ b/arch/x86/include/asm/ibmpc.h @@ -18,4 +18,7 @@ #define SYSCTLA 0x92 #define SLAVE_PIC 0xa0 +#define UART0_BASE 0x3f8 +#define UART1_BASE 0x2f8 + #endif diff --git a/arch/x86/lib/cmd_hob.c b/arch/x86/lib/cmd_hob.c index 2fdff2b..b552fe6 100644 --- a/arch/x86/lib/cmd_hob.c +++ b/arch/x86/lib/cmd_hob.c @@ -17,18 +17,18 @@ static char *hob_type[] = { "Memory Allocation", "Resource Descriptor", "GUID Extension", - "Firmware Volumn", + "Firmware Volume", "CPU", "Memory Pool", "reserved", - "Firmware Volumn 2", + "Firmware Volume 2", "Load PEIM Unused", "UEFI Capsule", }; int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - union hob_pointers_t hob; + union hob_pointers hob; u16 type; char *desc; int i = 0; @@ -39,29 +39,27 @@ int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("No. | Address | Type | Length in Bytes\n"); printf("----|----------|---------------------|----------------\n"); - while (!END_OF_HOB(hob)) { + while (!end_of_hob(hob)) { printf("%-3d | %08x | ", i, (unsigned int)hob.raw); - type = hob.hdr->type; + type = get_hob_type(hob); if (type == HOB_TYPE_UNUSED) desc = "*Unused*"; else if (type == HOB_TYPE_EOH) - desc = "**END OF HOB**"; + desc = "*END OF HOB*"; else if (type >= 0 && type <= ARRAY_SIZE(hob_type)) desc = hob_type[type]; else - desc = "!!!Invalid Type!!!"; - printf("%-19s | %-15d\n", desc, hob.hdr->len); - hob.raw = GET_NEXT_HOB(hob); + desc = "*Invalid Type*"; + printf("%-19s | %-15d\n", desc, get_hob_length(hob)); + hob.raw = get_next_hob(hob); i++; } return 0; } -/* -------------------------------------------------------------------- */ - U_BOOT_CMD( hob, 1, 1, do_hob, - "print FSP Hand-Off Block information", + "print Firmware Support Package (FSP) Hand-Off Block information", "" ); |