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-rw-r--r--arch/x86/cpu/cpu.c109
-rw-r--r--arch/x86/cpu/interrupts.c2
-rw-r--r--arch/x86/cpu/start.S33
-rw-r--r--arch/x86/cpu/start16.S57
4 files changed, 138 insertions, 63 deletions
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 61d0b69..e9bb0d7 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -55,35 +55,70 @@ struct gdt_ptr {
u32 ptr;
} __packed;
-static void reload_gdt(void)
+static void load_ds(u32 segment)
{
- /*
- * There are machines which are known to not boot with the GDT
- * being 8-byte unaligned. Intel recommends 16 byte alignment
- */
- static const u64 boot_gdt[] __attribute__((aligned(16))) = {
- /* CS: code, read/execute, 4 GB, base 0 */
- [GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
- /* DS: data, read/write, 4 GB, base 0 */
- [GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
- /* 16-bit CS: code, read/execute, 64 kB, base 0 */
- [GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff),
- /* 16-bit DS: data, read/write, 64 kB, base 0 */
- [GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff),
- };
- static struct gdt_ptr gdt;
-
- gdt.len = sizeof(boot_gdt)-1;
- gdt.ptr = (u32)&boot_gdt;
-
- asm volatile("lgdtl %0\n" \
- "movl $((2+1)*8), %%ecx\n" \
- "movl %%ecx, %%ds\n" \
- "movl %%ecx, %%es\n" \
- "movl %%ecx, %%fs\n" \
- "movl %%ecx, %%gs\n" \
- "movl %%ecx, %%ss" \
- : : "m" (gdt) : "ecx");
+ asm volatile("movl %0, %%ds" : : "r" (segment * X86_GDT_ENTRY_SIZE));
+}
+
+static void load_es(u32 segment)
+{
+ asm volatile("movl %0, %%es" : : "r" (segment * X86_GDT_ENTRY_SIZE));
+}
+
+static void load_fs(u32 segment)
+{
+ asm volatile("movl %0, %%fs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
+}
+
+static void load_gs(u32 segment)
+{
+ asm volatile("movl %0, %%gs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
+}
+
+static void load_ss(u32 segment)
+{
+ asm volatile("movl %0, %%ss" : : "r" (segment * X86_GDT_ENTRY_SIZE));
+}
+
+static void load_gdt(const u64 *boot_gdt, u16 num_entries)
+{
+ struct gdt_ptr gdt;
+
+ gdt.len = (num_entries * 8) - 1;
+ gdt.ptr = (u32)boot_gdt;
+
+ asm volatile("lgdtl %0\n" : : "m" (gdt));
+}
+
+void init_gd(gd_t *id, u64 *gdt_addr)
+{
+ id->gd_addr = (ulong)id;
+ setup_gdt(id, gdt_addr);
+}
+
+void setup_gdt(gd_t *id, u64 *gdt_addr)
+{
+ /* CS: code, read/execute, 4 GB, base 0 */
+ gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff);
+
+ /* DS: data, read/write, 4 GB, base 0 */
+ gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
+
+ /* FS: data, read/write, 4 GB, base (Global Data Pointer) */
+ gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093, (ulong)id, 0xfffff);
+
+ /* 16-bit CS: code, read/execute, 64 kB, base 0 */
+ gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);
+
+ /* 16-bit DS: data, read/write, 64 kB, base 0 */
+ gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff);
+
+ load_gdt(gdt_addr, X86_GDT_NUM_ENTRIES);
+ load_ds(X86_GDT_ENTRY_32BIT_DS);
+ load_es(X86_GDT_ENTRY_32BIT_DS);
+ load_gs(X86_GDT_ENTRY_32BIT_DS);
+ load_ss(X86_GDT_ENTRY_32BIT_DS);
+ load_fs(X86_GDT_ENTRY_32BIT_FS);
}
int x86_cpu_init_f(void)
@@ -105,6 +140,14 @@ int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f")));
int x86_cpu_init_r(void)
{
+ /* Initialize core interrupt and exception functionality of CPU */
+ cpu_init_interrupts();
+ return 0;
+}
+int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
+
+void x86_enable_caches(void)
+{
const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD);
/* turn on the cache and disable write through */
@@ -112,14 +155,16 @@ int x86_cpu_init_r(void)
"andl %0, %%eax\n"
"movl %%eax, %%cr0\n"
"wbinvd\n" : : "i" (nw_cd_rst) : "eax");
+}
+void enable_caches(void) __attribute__((weak, alias("x86_enable_caches")));
- reload_gdt();
+int x86_init_cache(void)
+{
+ enable_caches();
- /* Initialize core interrupt and exception functionality of CPU */
- cpu_init_interrupts();
return 0;
}
-int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
+int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index e0958eb..43ec3f8 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -174,7 +174,7 @@ struct desc_ptr {
unsigned short segment;
} __packed;
-struct idt_entry idt[256] __attribute__((aligned(16)));
+struct idt_entry idt[256] __aligned(16);
struct desc_ptr idt_ptr;
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index f87633b..ee0dabe 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -29,8 +29,9 @@
#include <config.h>
#include <version.h>
#include <asm/global_data.h>
+#include <asm/processor.h>
#include <asm/processor-flags.h>
-#include <generated/asm-offsets.h>
+#include <generated/generic-asm-offsets.h>
.section .text
.code32
@@ -58,7 +59,7 @@ _start:
/* This is the 32-bit cold-reset entry point */
/* Load the segement registes to match the gdt loaded in start16.S */
- movl $0x18, %eax
+ movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
movw %ax, %fs
movw %ax, %ds
movw %ax, %gs
@@ -84,6 +85,12 @@ car_init_ret:
*/
movl $CONFIG_SYS_INIT_SP_ADDR, %esp
+ /* Initialise the Global Data Pointer */
+ movl $CONFIG_SYS_INIT_GD_ADDR, %eax
+ movl %eax, %edx
+ addl $GENERATED_GBL_DATA_SIZE, %edx
+ call init_gd;
+
/* Set parameter to board_init_f() to boot flags */
xorl %eax, %eax
movw %bx, %ax
@@ -95,32 +102,22 @@ car_init_ret:
movw $0x85, %ax
jmp die
-.globl relocate_code
-.type relocate_code, @function
-relocate_code:
+.globl board_init_f_r_trampoline
+.type board_init_f_r_trampoline, @function
+board_init_f_r_trampoline:
/*
* SDRAM has been initialised, U-Boot code has been copied into
* RAM, BSS has been cleared and relocation adjustments have been
* made. It is now time to jump into the in-RAM copy of U-Boot
*
- * %eax = Address of top of stack
- * %edx = Address of Global Data
- * %ecx = Base address of in-RAM copy of U-Boot
+ * %eax = Address of top of new stack
*/
/* Setup stack in RAM */
movl %eax, %esp
- /* Setup call address of in-RAM copy of board_init_r() */
- movl $board_init_r, %ebp
- addl (GENERATED_GD_RELOC_OFF)(%edx), %ebp
-
- /* Setup parameters to board_init_r() */
- movl %edx, %eax
- movl %ecx, %edx
-
- /* Jump to in-RAM copy of board_init_r() */
- call *%ebp
+ /* Re-enter U-Boot by calling board_init_f_r */
+ call board_init_f_r
die:
hlt
diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 33e53cd..cc393ff 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -86,7 +86,11 @@ gdt_ptr:
.word 0x20 /* limit (32 bytes = 4 GDT entries) */
.long BOOT_SEG + gdt /* base */
- /* The GDT table ...
+/* Some CPUs are picky about GDT alignment... */
+.align 16
+gdt:
+ /*
+ * The GDT table ...
*
* Selector Type
* 0x00 NULL
@@ -94,17 +98,46 @@ gdt_ptr:
* 0x10 32bit code
* 0x18 32bit data/stack
*/
+ /* The NULL Desciptor - Mandatory */
+ .word 0x0000 /* limit_low */
+ .word 0x0000 /* base_low */
+ .byte 0x00 /* base_middle */
+ .byte 0x00 /* access */
+ .byte 0x00 /* flags + limit_high */
+ .byte 0x00 /* base_high */
-gdt:
- .word 0, 0, 0, 0 /* NULL */
- .word 0, 0, 0, 0 /* unused */
+ /* Unused Desciptor - (matches Linux) */
+ .word 0x0000 /* limit_low */
+ .word 0x0000 /* base_low */
+ .byte 0x00 /* base_middle */
+ .byte 0x00 /* access */
+ .byte 0x00 /* flags + limit_high */
+ .byte 0x00 /* base_high */
- .word 0xFFFF /* 4Gb - (0x100000*0x1000 = 4Gb) */
- .word 0 /* base address = 0 */
- .word 0x9B00 /* code read/exec */
- .word 0x00CF /* granularity = 4096, 386 (+5th nibble of limit) */
+ /*
+ * The Code Segment Descriptor:
+ * - Base = 0x00000000
+ * - Size = 4GB
+ * - Access = Present, Ring 0, Exec (Code), Readable
+ * - Flags = 4kB Granularity, 32-bit
+ */
+ .word 0xffff /* limit_low */
+ .word 0x0000 /* base_low */
+ .byte 0x00 /* base_middle */
+ .byte 0x9b /* access */
+ .byte 0xcf /* flags + limit_high */
+ .byte 0x00 /* base_high */
- .word 0xFFFF /* 4Gb - (0x100000*0x1000 = 4Gb) */
- .word 0x0 /* base address = 0 */
- .word 0x9300 /* data read/write */
- .word 0x00CF /* granularity = 4096, 386 (+5th nibble of limit) */
+ /*
+ * The Data Segment Descriptor:
+ * - Base = 0x00000000
+ * - Size = 4GB
+ * - Access = Present, Ring 0, Non-Exec (Data), Writable
+ * - Flags = 4kB Granularity, 32-bit
+ */
+ .word 0xffff /* limit_low */
+ .word 0x0000 /* base_low */
+ .byte 0x00 /* base_middle */
+ .byte 0x93 /* access */
+ .byte 0xcf /* flags + limit_high */
+ .byte 0x00 /* base_high */