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-rw-r--r--arch/sh/include/asm/cpu_sh3.h6
-rw-r--r--arch/sh/include/asm/cpu_sh7706.h53
-rw-r--r--arch/sh/include/asm/cpu_sh7722.h38
-rw-r--r--arch/sh/include/asm/cpu_sh7750.h16
-rw-r--r--arch/sh/include/asm/cpu_sh7780.h21
-rw-r--r--arch/sh/include/asm/zimage.h41
6 files changed, 99 insertions, 76 deletions
diff --git a/arch/sh/include/asm/cpu_sh3.h b/arch/sh/include/asm/cpu_sh3.h
index 6db38a2..385f5dc 100644
--- a/arch/sh/include/asm/cpu_sh3.h
+++ b/arch/sh/include/asm/cpu_sh3.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * (C) Copyright 2007-2009 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*
* This program is free software; you can redistribute it and/or
@@ -31,7 +31,9 @@
#define CACHE_OC_NUM_ENTRIES 256
#define CACHE_OC_ENTRY_SHIFT 4
-#if defined(CONFIG_CPU_SH7710)
+#if defined(CONFIG_CPU_SH7706)
+#include <asm/cpu_sh7706.h>
+#elif defined(CONFIG_CPU_SH7710)
#include <asm/cpu_sh7710.h>
#elif defined(CONFIG_CPU_SH7720)
#include <asm/cpu_sh7720.h>
diff --git a/arch/sh/include/asm/cpu_sh7706.h b/arch/sh/include/asm/cpu_sh7706.h
new file mode 100644
index 0000000..d093f88
--- /dev/null
+++ b/arch/sh/include/asm/cpu_sh7706.h
@@ -0,0 +1,53 @@
+#ifndef _ASM_CPU_SH7706_H_
+#define _ASM_CPU_SH7706_H_
+
+#define CACHE_OC_NUM_WAYS 4
+#define CCR_CACHE_INIT 0x0000000D
+
+/* MMU and Cache control */
+#define MMUCR 0xFFFFFFE0
+#define CCR 0xFFFFFFEC
+
+/* PFC */
+#define PACR 0xA4050100
+#define PBCR 0xA4050102
+#define PCCR 0xA4050104
+#define PETCR 0xA4050106
+
+/* Port Data Registers */
+#define PADR 0xA4050120
+#define PBDR 0xA4050122
+#define PCDR 0xA4050124
+
+/* BSC */
+#define FRQCR 0xffffff80
+#define BCR1 0xffffff60
+#define BCR2 0xffffff62
+#define WCR1 0xffffff64
+#define WCR2 0xffffff66
+#define MCR 0xffffff68
+
+/* SDRAM controller */
+#define DCR 0xffffff6a
+#define RTCSR 0xffffff6e
+#define RTCNT 0xffffff70
+#define RTCOR 0xffffff72
+#define RFCR 0xffffff74
+#define SDMR 0xFFFFD000
+#define CS3_R 0xFFFFE460
+
+/* SCIF */
+#define SCSMR_2 0xA4000150
+#define SCIF0_BASE SCSMR_2
+
+/* Timer */
+#define TSTR0 0xFFFFFE92
+#define TSTR TSTR0
+#define TCNT0 0xFFFFFE98
+#define TCR0 0xFFFFFE9C
+
+/* On chip oscillator circuits */
+#define WTCNT 0xFFFFFF84
+#define WTCSR 0xFFFFFF86
+
+#endif /* _ASM_CPU_SH7706_H_ */
diff --git a/arch/sh/include/asm/cpu_sh7722.h b/arch/sh/include/asm/cpu_sh7722.h
index 0975b78..3157dcb 100644
--- a/arch/sh/include/asm/cpu_sh7722.h
+++ b/arch/sh/include/asm/cpu_sh7722.h
@@ -325,44 +325,6 @@
#define SPICR1 0xA4420030
/* SCIF */
-/*
-#define SCSMR 0xFFE00000
-#define SCBRR 0xFFE00004
-#define SCSCR 0xFFE00008
-#define SCFTDR 0xFFE0000C
-#define SCFSR 0xFFE00010
-#define SCFRDR 0xFFE00014
-#define SCFCR 0xFFE00018
-#define SCFDR 0xFFE0001C
-#define SCLSR 0xFFE00024
-#define SCSMR1 0xFFE10000
-#define SCBRR1 0xFFE10004
-#define SCSCR1 0xFFE10008
-#define SCFTDR1 0xFFE1000C
-#define SCFSR1 0xFFE10010
-#define SCFRDR1 0xFFE10014
-#define SCFCR1 0xFFE10018
-#define SCFDR1 0xFFE1001C
-#define SCLSR1 0xFFE10024
-#define SCSMR2 0xFFE20000
-#define SCBRR2 0xFFE20004
-#define SCSCR2 0xFFE20008
-#define SCFTDR2 0xFFE2000C
-#define SCFSR2 0xFFE20010
-#define SCFRDR2 0xFFE20014
-#define SCFCR2 0xFFE20018
-#define SCFDR2 0xFFE2001C
-#define SCLSR2 0xFFE20024
-#define SCSMR3 0xFFE30000
-#define SCBRR3 0xFFE30004
-#define SCSCR3 0xFFE30008
-#define SCFTDR3 0xFFE3000C
-#define SCFSR3 0xFFE30010
-#define SCFRDR3 0xFFE30014
-#define SCFCR3 0xFFE30018
-#define SCFDR3 0xFFE3001C
-#define SCLSR3 0xFFE30024
-*/
#define SCIF0_BASE 0xFFE00000
/* SIM */
diff --git a/arch/sh/include/asm/cpu_sh7750.h b/arch/sh/include/asm/cpu_sh7750.h
index 4e43a46..b3e8424 100644
--- a/arch/sh/include/asm/cpu_sh7750.h
+++ b/arch/sh/include/asm/cpu_sh7750.h
@@ -166,26 +166,10 @@
/* SCI */
#define SCSMR1 0xFFE00000
-#define SCBRR1 0xFFE00004
-#define SCSCR1 0xFFE00008
-#define SCTDR1 0xFFE0000C
-#define SCSSR1 0xFFE00010
-#define SCRDR1 0xFFE00014
-#define SCSCMR1 0xFFE00018
-#define SCSPTR1 0xFFE0001C
#define SCF0_BASE SCSMR1
/* SCIF */
#define SCSMR2 0xFFE80000
-#define SCBRR2 0xFFE80004
-#define SCSCR2 0xFFE80008
-#define SCFTDR2 0xFFE8000C
-#define SCFSR2 0xFFE80010
-#define SCFRDR2 0xFFE80014
-#define SCFCR2 0xFFE80018
-#define SCFDR2 0xFFE8001C
-#define SCSPTR2 0xFFE80020
-#define SCLSR2 0xFFE80024
#define SCIF1_BASE SCSMR2
/* H-UDI */
diff --git a/arch/sh/include/asm/cpu_sh7780.h b/arch/sh/include/asm/cpu_sh7780.h
index d4f824e..e9c59fe 100644
--- a/arch/sh/include/asm/cpu_sh7780.h
+++ b/arch/sh/include/asm/cpu_sh7780.h
@@ -333,27 +333,8 @@
#define RYRAR 0xFFE80054
/* Serial Communication Interface with FIFO */
-#define SCIF0_BASE SCSMR0
#define SCSMR0 0xFFE00000
-#define SCBRR0 0xFFE00004
-#define SCSCR0 0xFFE00008
-#define SCFSR0 0xFFE00010
-#define SCFCR0 0xFFE00018
-#define SCTFDR0 0xFFE0001C
-#define SCRFDR0 0xFFE00020
-#define SCSPTR0 0xFFE00024
-#define SCLSR0 0xFFE00028
-#define SCRER0 0xFFE0002C
-#define SCSMR1 0xFFE10000
-#define SCBRR1 0xFFE10004
-#define SCSCR1 0xFFE10008
-#define SCFSR1 0xFFE10010
-#define SCFCR1 0xFFE10018
-#define SCTFDR1 0xFFE1001C
-#define SCRFDR1 0xFFE10020
-#define SCSPTR1 0xFFE10024
-#define SCLSR1 0xFFE10028
-#define SCRER1 0xFFE1002C
+#define SCIF0_BASE SCSMR0
/* Serial I/O with FIFO */
#define SIMDR 0xFFE20000
diff --git a/arch/sh/include/asm/zimage.h b/arch/sh/include/asm/zimage.h
new file mode 100644
index 0000000..33a680b
--- /dev/null
+++ b/arch/sh/include/asm/zimage.h
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2010
+ * Renesas Solutions Corp.
+ * Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_ZIMAGE_H_
+#define _ASM_ZIMAGE_H_
+
+#define MOUNT_ROOT_RDONLY 0x000
+#define RAMDISK_FLAGS 0x004
+#define ORIG_ROOT_DEV 0x008
+#define LOADER_TYPE 0x00c
+#define INITRD_START 0x010
+#define INITRD_SIZE 0x014
+#define COMMAND_LINE 0x100
+
+#define RD_PROMPT (1<<15)
+#define RD_DOLOAD (1<<14)
+#define CMD_ARG_RD_PROMPT "prompt_ramdisk="
+#define CMD_ARG_RD_DOLOAD "load_ramdisk="
+
+#endif
generated by cgit v1.1 at 2024-12-23 16:26:32 +0000