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-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c14
-rw-r--r--arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c79
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c4
-rw-r--r--arch/powerpc/cpu/mpc8xxx/pci_cfg.c12
-rw-r--r--arch/powerpc/include/asm/fsl_serdes.h53
5 files changed, 129 insertions, 33 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index e578b29..99431dc 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
*
* (C) Copyright 2003 Motorola Inc.
* Modified by Xianghua Xiao, X.Xiao@motorola.com
@@ -30,9 +30,11 @@
#include <watchdog.h>
#include <asm/processor.h>
#include <ioports.h>
+#include <sata.h>
#include <asm/io.h>
#include <asm/mmu.h>
#include <asm/fsl_law.h>
+#include <asm/fsl_serdes.h>
#include "mp.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -418,3 +420,13 @@ void arch_preboot_os(void)
setup_ivors();
}
+
+#if defined(CONFIG_CMD_SATA) && defined(CONFIG_FSL_SATA)
+int sata_initialize(void)
+{
+ if (is_serdes_configured(SATA1) || is_serdes_configured(SATA2))
+ return __sata_initialize();
+
+ return 1;
+}
+#endif
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
index cb6a6f0..7e72f5f 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
@@ -1,17 +1,31 @@
/*
- * Copyright (C) 2008 Freescale Semicondutor, Inc.
+ * Copyright 2008,2010 Freescale Semiconductor, Inc.
* Dave Liu <daveliu@freescale.com>
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
/* PORDEVSR register */
#define GUTS_PORDEVSR_OFFS 0xc
@@ -52,6 +66,61 @@
#define FSL_SRDSCR3_LANEE_SGMII 0x00000000
#define FSL_SRDSCR3_LANEE_SATA 0x00150005
+
+#define SRDS1_MAX_LANES 8
+#define SRDS2_MAX_LANES 2
+
+static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+ [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
+ [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
+ [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
+ [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
+};
+
+static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
+ [0x1] = {SATA1, SATA2},
+ [0x3] = {SATA1, NONE},
+ [0x4] = {SGMII_TSEC1, SGMII_TSEC3},
+ [0x6] = {SGMII_TSEC1, NONE},
+};
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+ int i;
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u32 pordevsr = in_be32(&gur->pordevsr);
+ u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+
+ u32 srds2_cfg = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >>
+ GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT;
+
+ debug("%s: dev = %d\n", __FUNCTION__, device);
+ debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
+ debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_cfg);
+
+ if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg);
+ return 0;
+ }
+
+ if (srds2_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_cfg);
+ return 0;
+ }
+
+ for (i = 0; i < SRDS1_MAX_LANES; i++) {
+ if (serdes1_cfg_tbl[srds1_cfg][i] == device)
+ return 1;
+ }
+ for (i = 0; i < SRDS2_MAX_LANES; i++) {
+ if (serdes2_cfg_tbl[srds2_cfg][i] == device)
+ return 1;
+ }
+
+ return 0;
+}
+
void fsl_serdes_init(void)
{
void *guts = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
index d9d0fa7..dcb37ce 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
@@ -175,8 +175,8 @@ determine_refresh_rate_ps(const unsigned int spd_refresh)
* ordinal 2, ddr2_speed_bins[1] contains tCK for CL=3
* Not certain if any good value exists for CL=2
*/
- /* CL2 CL3 CL4 CL5 CL6 */
-unsigned short ddr2_speed_bins[] = { 0, 5000, 3750, 3000, 2500 };
+ /* CL2 CL3 CL4 CL5 CL6 CL7*/
+unsigned short ddr2_speed_bins[] = { 0, 5000, 3750, 3000, 2500, 1875 };
unsigned int
compute_derated_DDR2_CAS_latency(unsigned int mclk_ps)
diff --git a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
index 85995ca..186936f 100644
--- a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
+++ b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
@@ -56,18 +56,6 @@ static struct pci_info pci_config_info[] =
#elif defined(CONFIG_MPC8536)
static struct pci_info pci_config_info[] =
{
- [LAW_TRGT_IF_PCI] = {
- .cfg = 0,
- },
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 2) | (1 << 3) | (1 << 5) | (1 << 7),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 5) | (1 << 7),
- },
- [LAW_TRGT_IF_PCIE_3] = {
- .cfg = (1 << 7),
- },
};
#elif defined(CONFIG_MPC8544)
static struct pci_info pci_config_info[] =
diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index 6da4b6f..d4839f4 100644
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -1,21 +1,48 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
#ifndef __FSL_SERDES_H
#define __FSL_SERDES_H
#include <config.h>
-#define FSL_SERDES_CLK_100 (0 << 28)
-#define FSL_SERDES_CLK_125 (1 << 28)
-#define FSL_SERDES_CLK_150 (3 << 28)
-#define FSL_SERDES_PROTO_SATA 0
-#define FSL_SERDES_PROTO_PEX 1
-#define FSL_SERDES_PROTO_PEX_X2 2
-#define FSL_SERDES_PROTO_SGMII 3
-#define FSL_SERDES_VDD_1V 1
+enum srds_prtcl {
+ NONE = 0,
+ PCIE1,
+ PCIE2,
+ PCIE3,
+ PCIE4,
+ SATA1,
+ SATA2,
+ SRIO1,
+ SRIO2,
+ SGMII_FM1,
+ SGMII_FM2,
+ SGMII_TSEC1,
+ SGMII_TSEC2,
+ SGMII_TSEC3,
+ SGMII_TSEC4,
+ XAUI_FM1,
+ XAUI_FM2,
+ AURORA,
+};
-#ifdef CONFIG_FSL_SERDES
-extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
-#else
-static void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd) {}
-#endif /* CONFIG_FSL_SERDES */
+int is_serdes_configured(enum srds_prtcl device);
#endif /* __FSL_SERDES_H */
generated by cgit v1.1 at 2024-12-25 22:37:24 +0000