diff options
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/fdt.c | 23 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 10 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/liodn.c | 88 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/p2041_ids.c | 20 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/p3041_ids.c | 20 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/p3060_ids.c | 10 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/p4080_ids.c | 10 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/p5020_ids.c | 20 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/portals.c | 6 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8xxx/fdt.c | 72 | ||||
-rw-r--r-- | arch/powerpc/include/asm/fsl_liodn.h | 30 | ||||
-rw-r--r-- | arch/powerpc/include/asm/fsl_portals.h | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 13 | ||||
-rw-r--r-- | arch/powerpc/include/asm/mpc85xx_gpio.h | 123 |
14 files changed, 423 insertions, 26 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 9d2d769..9d31568 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -537,6 +537,27 @@ void fdt_fixup_fman_firmware(void *blob) #define fdt_fixup_fman_firmware(x) #endif +#if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060) +static void fdt_fixup_usb(void *fdt) +{ + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 rcwsr11 = in_be32(&gur->rcwsr[11]); + int off; + + off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph"); + if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) != + FSL_CORENET_RCWSR11_EC1_FM1_USB1) + fdt_status_disabled(fdt, off); + + off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr"); + if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) != + FSL_CORENET_RCWSR11_EC2_USB2) + fdt_status_disabled(fdt, off); +} +#else +#define fdt_fixup_usb(x) +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -641,6 +662,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0", "clock_freq", gd->bus_clk, 1); + + fdt_fixup_usb(blob); } /* diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 07e58ed..89ed5b4 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -504,9 +504,6 @@ void fsl_serdes_init(void) const char *srds_lpd_arg; size_t arglen; #endif -#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9 - enum srds_prtcl device; -#endif #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001 int need_serdes_a001; /* TRUE == need work-around for SERDES A001 */ #endif @@ -787,11 +784,4 @@ void fsl_serdes_init(void) SRDS_RSTCTL_SDPD); } #endif - -#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9 - for (device = XAUI_FM1; device <= XAUI_FM2; device++) { - if (is_serdes_configured(device)) - __serdes_reset_rx(srds_regs, cfg, device); - } -#endif } diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index e0ea502..11881c9 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -40,6 +40,21 @@ int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset) return liodn_bases[dpaa_dev].num_ids; } +static void set_srio_liodn(struct srio_liodn_id_table *tbl, int size) +{ + int i; + + for (i = 0; i < size; i++) { + unsigned long reg_off = tbl[i].reg_offset[0]; + out_be32((u32 *)reg_off, tbl[i].id[0]); + + if (tbl[i].num_ids == 2) { + reg_off = tbl[i].reg_offset[1]; + out_be32((u32 *)reg_off, tbl[i].id[1]); + } + } +} + static void set_liodn(struct liodn_id_table *tbl, int size) { int i; @@ -133,11 +148,42 @@ static void setup_raide_liodn_base(void) } #endif +#ifdef CONFIG_SYS_DPAA_RMAN +static void set_rman_liodn(struct liodn_id_table *tbl, int size) +{ + int i; + struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR; + + for (i = 0; i < size; i++) { + /* write the RMan block number */ + out_be32(&rman->mmitar, i); + /* write the liodn offset corresponding to the block */ + out_be32((u32 *)(tbl[i].reg_offset), tbl[i].id[0]); + } +} + +static void setup_rman_liodn_base(struct liodn_id_table *tbl, int size) +{ + int i; + struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR; + u32 base = liodn_bases[FSL_HW_PORTAL_RMAN].id[0]; + + out_be32(&rman->mmliodnbr, base); + + /* update liodn offset */ + for (i = 0; i < size; i++) + tbl[i].id[0] += base; +} +#endif + void set_liodns(void) { /* setup general liodn offsets */ set_liodn(liodn_tbl, liodn_tbl_sz); + /* setup SRIO port liodns */ + set_srio_liodn(srio_liodn_tbl, srio_liodn_tbl_sz); + /* setup SEC block liodn bases & offsets if we have one */ if (IS_E_PROCESSOR(get_svr())) { set_liodn(sec_liodn_tbl, sec_liodn_tbl_sz); @@ -164,6 +210,42 @@ void set_liodns(void) set_liodn(raide_liodn_tbl, raide_liodn_tbl_sz); setup_raide_liodn_base(); #endif + +#ifdef CONFIG_SYS_DPAA_RMAN + /* setup RMan liodn offsets */ + set_rman_liodn(rman_liodn_tbl, rman_liodn_tbl_sz); + /* setup RMan liodn base */ + setup_rman_liodn_base(rman_liodn_tbl, rman_liodn_tbl_sz); +#endif +} + +static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl) +{ + int i, srio_off; + + /* search for srio node, if doesn't exist just return - nothing todo */ + srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio"); + if (srio_off < 0) + return ; + + for (i = 0; i < srio_liodn_tbl_sz; i++) { + int off, portid = tbl[i].portid; + + off = fdt_node_offset_by_prop_value(blob, srio_off, + "cell-index", &portid, 4); + if (off >= 0) { + off = fdt_setprop(blob, off, "fsl,liodn", + &tbl[i].id[0], + sizeof(u32) * tbl[i].num_ids); + if (off > 0) + printf("WARNING unable to set fsl,liodn for " + "fsl,srio port %d: %s\n", + portid, fdt_strerror(off)); + } else { + debug("WARNING: couldn't set fsl,liodn for srio: %s.\n", + fdt_strerror(off)); + } + } } static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz) @@ -195,6 +277,8 @@ static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz) void fdt_fixup_liodn(void *blob) { + fdt_fixup_srio_liodn(blob, srio_liodn_tbl); + fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz); #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_liodn_tbl(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz); @@ -207,4 +291,8 @@ void fdt_fixup_liodn(void *blob) #ifdef CONFIG_SYS_FSL_RAID_ENGINE fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz); #endif + +#ifdef CONFIG_SYS_DPAA_RMAN + fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz); +#endif } diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 8d25496..b99b54d 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif +struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_2(1, 199, 200), + SET_SRIO_LIODN_2(2, 201, 202), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), @@ -98,6 +104,17 @@ struct liodn_id_table sec_liodn_tbl[] = { }; int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); +#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -106,4 +123,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_DPAA_PME [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index 96f3272..c50b442 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif +struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_2(1, 199, 200), + SET_SRIO_LIODN_2(2, 201, 202), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), @@ -97,6 +103,17 @@ struct liodn_id_table sec_liodn_tbl[] = { }; int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); +#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -105,4 +122,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_DPAA_PME [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/p3060_ids.c b/arch/powerpc/cpu/mpc85xx/p3060_ids.c index 07703d4..d32142f 100644 --- a/arch/powerpc/cpu/mpc85xx/p3060_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3060_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif +struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_1(1, 198), + SET_SRIO_LIODN_1(2, 199), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { SET_USB_LIODN(1, "fsl-usb2-mph", 127), SET_USB_LIODN(2, "fsl-usb2-dr", 157), @@ -50,9 +56,7 @@ struct liodn_id_table liodn_tbl[] = { SET_DMA_LIODN(1, 196), SET_DMA_LIODN(2, 197), - SET_GUTS_LIODN("fsl,rapidio-delta", 198, rio1liodnr, 0), - SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0), - SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0), + SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000), #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c index 560c02a..a6ea6af 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif +struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_1(1, 198), + SET_SRIO_LIODN_1(2, 199), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { SET_USB_LIODN(1, "fsl-usb2-mph", 127), SET_USB_LIODN(2, "fsl-usb2-dr", 157), @@ -53,9 +59,7 @@ struct liodn_id_table liodn_tbl[] = { SET_DMA_LIODN(1, 196), SET_DMA_LIODN(2, 197), - SET_GUTS_LIODN("fsl,rapidio-delta", 198, rio1liodnr, 0), - SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0), - SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0), + SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000), #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c index 4254dd5..ff57a19 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif +struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_2(1, 199, 200), + SET_SRIO_LIODN_2(2, 201, 202), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), @@ -107,6 +113,17 @@ struct liodn_id_table raide_liodn_tbl[] = { int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl); #endif +#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -118,4 +135,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_FSL_RAID_ENGINE [FSL_HW_PORTAL_RAID_ENGINE] = SET_LIODN_BASE_1(47), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index 418dd9d..6199633 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -245,6 +245,12 @@ void fdt_fixup_qportals(void *blob) goto err; } #endif +#ifdef CONFIG_SYS_DPAA_RMAN + err = fdt_qportal(blob, off, i, "rman@0", + FSL_HW_PORTAL_RMAN, 1); + if (err < 0) + goto err; +#endif err: if (err < 0) { diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 5bb9f53..112c603 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -275,21 +275,73 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) } #ifdef CONFIG_SYS_SRIO +static inline void ft_disable_srio_port(void *blob, int srio_off, int port) +{ + int off = fdt_node_offset_by_prop_value(blob, srio_off, + "cell-index", &port, 4); + if (off >= 0) { + off = fdt_setprop_string(blob, off, "status", "disabled"); + if (off > 0) + printf("WARNING unable to set status for fsl,srio " + "port %d: %s\n", port, fdt_strerror(off)); + } +} + +static inline void ft_disable_rman(void *blob) +{ + int off = fdt_node_offset_by_compatible(blob, -1, "fsl,rman"); + if (off >= 0) { + off = fdt_setprop_string(blob, off, "status", "disabled"); + if (off > 0) + printf("WARNING unable to set status for fsl,rman %s\n", + fdt_strerror(off)); + } +} + +static inline void ft_disable_rmu(void *blob) +{ + int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu"); + if (off >= 0) { + off = fdt_setprop_string(blob, off, "status", "disabled"); + if (off > 0) + printf("WARNING unable to set status for " + "fsl,srio-rmu %s\n", fdt_strerror(off)); + } +} + void ft_srio_setup(void *blob) { + int srio1_used = 0, srio2_used = 0; + int srio_off; + + /* search for srio node, if doesn't exist just return - nothing todo */ + srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio"); + if (srio_off < 0) + return ; + #ifdef CONFIG_SRIO1 - if (!is_serdes_configured(SRIO1)) { - fdt_del_node_and_alias(blob, "rio0"); - } -#else - fdt_del_node_and_alias(blob, "rio0"); + if (is_serdes_configured(SRIO1)) + srio1_used = 1; #endif #ifdef CONFIG_SRIO2 - if (!is_serdes_configured(SRIO2)) { - fdt_del_node_and_alias(blob, "rio1"); - } -#else - fdt_del_node_and_alias(blob, "rio1"); + if (is_serdes_configured(SRIO2)) + srio2_used = 1; #endif + + /* mark port1 disabled */ + if (!srio1_used) + ft_disable_srio_port(blob, srio_off, 1); + + /* mark port2 disabled */ + if (!srio2_used) + ft_disable_srio_port(blob, srio_off, 2); + + /* if both ports not used, disable controller, rmu and rman */ + if (!srio1_used && !srio2_used) { + fdt_setprop_string(blob, srio_off, "status", "disabled"); + + ft_disable_rman(blob); + ft_disable_rmu(blob); + } } #endif diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index 9ad104e..a9973b8 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -25,6 +25,26 @@ #include <asm/types.h> +struct srio_liodn_id_table { + u32 id[2]; + unsigned long reg_offset[2]; + u8 num_ids; + u8 portid; +}; +#define SET_SRIO_LIODN_1(port, idA) \ + { .id = { idA }, .num_ids = 1, .portid = port, \ + .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \ + + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ + } + +#define SET_SRIO_LIODN_2(port, idA, idB) \ + { .id = { idA, idB }, .num_ids = 2, .portid = port, \ + .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \ + + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ + .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \ + + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ + } + struct liodn_id_table { const char * compat; u32 id[2]; @@ -155,10 +175,20 @@ extern void fdt_fixup_liodn(void *blob); offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \ CONFIG_SYS_FSL_RAID_ENGINE_OFFSET) +#define SET_RMAN_LIODN(ibNum, liodn) \ + SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \ + offsetof(struct ccsr_rman, mmitdr) + \ + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \ + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000) + extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[]; extern struct liodn_id_table raide_liodn_tbl[]; extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[]; +extern struct srio_liodn_id_table srio_liodn_tbl[]; +extern struct liodn_id_table rman_liodn_tbl[]; extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz; extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz; +extern int srio_liodn_tbl_sz; +extern int rman_liodn_tbl_sz; #endif diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h index 8c3ea0b..5644044 100644 --- a/arch/powerpc/include/asm/fsl_portals.h +++ b/arch/powerpc/include/asm/fsl_portals.h @@ -38,6 +38,10 @@ enum fsl_dpaa_dev { #ifdef CONFIG_SYS_FSL_RAID_ENGINE FSL_HW_PORTAL_RAID_ENGINE, #endif +#ifdef CONFIG_SYS_DPAA_RMAN + FSL_HW_PORTAL_RMAN, +#endif + }; struct qportal_info { diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 1bbf986..99fe97d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2339,6 +2339,16 @@ struct ccsr_raide { }; #endif +#ifdef CONFIG_SYS_DPAA_RMAN +struct ccsr_rman { + u8 res0[0xf64]; + u32 mmliodnbr; /* Message Manager LIODN Base Register */ + u32 mmitar; /* RMAN Inbound Translation Address Register */ + u32 mmitdr; /* RMAN Inbound Translation Data Register */ + u8 res4[0x1f090]; +}; +#endif + #ifdef CONFIG_FSL_CORENET #define CONFIG_SYS_FSL_CORENET_CCM_OFFSET 0x0000 #define CONFIG_SYS_MPC85xx_DDR_OFFSET 0x8000 @@ -2354,6 +2364,7 @@ struct ccsr_raide { #define CONFIG_SYS_MPC85xx_ESDHC_OFFSET 0x114000 #define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000 +#define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x200000 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x201000 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 @@ -2442,6 +2453,8 @@ struct ccsr_raide { (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_PME_OFFSET) #define CONFIG_SYS_FSL_RAID_ENGINE_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_RAID_ENGINE_OFFSET) +#define CONFIG_SYS_FSL_CORENET_RMAN_ADDR \ + (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET) #define CONFIG_SYS_MPC85xx_GUTS_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET) #define CONFIG_SYS_FSL_CORENET_CCM_ADDR \ diff --git a/arch/powerpc/include/asm/mpc85xx_gpio.h b/arch/powerpc/include/asm/mpc85xx_gpio.h new file mode 100644 index 0000000..5a608a5 --- /dev/null +++ b/arch/powerpc/include/asm/mpc85xx_gpio.h @@ -0,0 +1,123 @@ +/* + * Copyright 2010 eXMeritus, A Boeing Company + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef POWERPC_ASM_MPC85XX_GPIO_H_ +#define POWERPC_ASM_MPC85XX_GPIO_H_ + +# include <asm/immap_85xx.h> + +/* + * The following internal functions are an MPC85XX-specific GPIO API which + * allows setting and querying multiple GPIOs in a single operation. + * + * All of these look relatively large, but the arguments are almost always + * constants, so they compile down to just a few instructions and a + * memory-mapped IO operation or two. + */ +static inline void mpc85xx_gpio_set(unsigned int mask, + unsigned int dir, unsigned int val) +{ + ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR + 0xc00); + + /* First mask off the unwanted parts of "dir" and "val" */ + dir &= mask; + val &= mask; + + /* Now read in the values we're supposed to preserve */ + dir |= (in_be32(&gpio->gpdir) & ~mask); + val |= (in_be32(&gpio->gpdat) & ~mask); + + /* + * Poke the new output values first, then set the direction. This + * helps to avoid transient data when switching from input to output + * and vice versa. + */ + out_be32(&gpio->gpdat, val); + out_be32(&gpio->gpdir, dir); +} + +static inline void mpc85xx_gpio_set_in(unsigned int gpios) +{ + mpc85xx_gpio_set(gpios, 0x00000000, 0x00000000); +} + +static inline void mpc85xx_gpio_set_low(unsigned int gpios) +{ + mpc85xx_gpio_set(gpios, 0xFFFFFFFF, 0x00000000); +} + +static inline void mpc85xx_gpio_set_high(unsigned int gpios) +{ + mpc85xx_gpio_set(gpios, 0xFFFFFFFF, 0xFFFFFFFF); +} + +static inline unsigned int mpc85xx_gpio_get(unsigned int mask) +{ + ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR + 0xc00); + + /* Read the requested values */ + return in_be32(&gpio->gpdat) & mask; +} + +/* + * These implement the generic Linux GPIO API on top of the other functions + * in this header. + */ +static inline int gpio_request(unsigned gpio, const char *label) +{ + /* Compatibility shim */ + return 0; +} + +static inline void gpio_free(unsigned gpio) +{ + /* Compatibility shim */ +} + +static inline int gpio_direction_input(unsigned gpio) +{ + mpc85xx_gpio_set_in(1U << gpio); + return 0; +} + +static inline int gpio_direction_output(unsigned gpio, int value) +{ + mpc85xx_gpio_set_low(1U << gpio); + return 0; +} + +static inline int gpio_get_value(unsigned gpio) +{ + return !!mpc85xx_gpio_get(1U << gpio); +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ + if (value) + mpc85xx_gpio_set_high(1U << gpio); + else + mpc85xx_gpio_set_low(1U << gpio); +} + +static inline int gpio_is_valid(int gpio) +{ + return (gpio >= 0) && (gpio < 32); +} + +#endif /* not POWERPC_ASM_MPC85XX_GPIO_H_ */ |