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-rw-r--r--arch/powerpc/include/asm/fsl_ddr_sdram.h16
-rw-r--r--arch/powerpc/include/asm/fsl_law.h1
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h8
-rw-r--r--arch/powerpc/include/asm/fsl_pci.h57
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h4
-rw-r--r--arch/powerpc/include/asm/immap_86xx.h4
-rw-r--r--arch/powerpc/include/asm/processor.h4
7 files changed, 45 insertions, 49 deletions
diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h
index 17d4b31..3de2113 100644
--- a/arch/powerpc/include/asm/fsl_ddr_sdram.h
+++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -213,6 +213,20 @@ typedef struct memctl_options_s {
} memctl_options_t;
extern phys_size_t fsl_ddr_sdram(void);
+extern int fsl_use_spd(void);
+
+/*
+ * The 85xx boards have a common prototype for fixed_sdram so put the
+ * declaration here.
+ */
+#ifdef CONFIG_MPC85xx
+extern phys_size_t fixed_sdram(void);
+#endif
+
+#if defined(CONFIG_DDR_ECC)
+extern void ddr_enable_ecc(unsigned int dram_size);
+#endif
+
typedef struct fixed_ddr_parm{
int min_freq;
diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index 0e255ff..6a4279c 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -90,6 +90,7 @@ enum law_trgt_if {
#define LAW_TRGT_IF_PCI_1 LAW_TRGT_IF_PCI
#define LAW_TRGT_IF_PCIX LAW_TRGT_IF_PCI
#define LAW_TRGT_IF_PCIE_2 LAW_TRGT_IF_PCI_2
+#define LAW_TRGT_IF_RIO_1 LAW_TRGT_IF_RIO
#ifdef CONFIG_MPC8641
#define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 82d24ab..8695a62 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008,2010 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2008,2010-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -16,6 +16,10 @@
#include <config.h>
#include <common.h>
+#ifdef CONFIG_MPC85xx
+void lbc_sdram_init(void);
+#endif
+
/* BR - Base Registers
*/
#define BR0 0x5000 /* Register offset to immr */
@@ -291,6 +295,8 @@
#define LBCR_EPAR_SHIFT 16
#define LBCR_BMT 0x0000FF00
#define LBCR_BMT_SHIFT 8
+#define LBCR_BMTPS 0x0000000F
+#define LBCR_BMTPS_SHIFT 0
/* LCRR - Clock Ratio Register
*/
diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h
index dc5c579..0a98bde 100644
--- a/arch/powerpc/include/asm/fsl_pci.h
+++ b/arch/powerpc/include/asm/fsl_pci.h
@@ -22,15 +22,13 @@
#define __FSL_PCI_H_
#include <asm/fsl_law.h>
-
-int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel);
+#include <asm/fsl_serdes.h>
+#include <pci.h>
int fsl_setup_hose(struct pci_controller *hose, unsigned long addr);
int fsl_is_pci_agent(struct pci_controller *hose);
-void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data);
void fsl_pci_config_unlock(struct pci_controller *hose);
-void ft_fsl_pci_setup(void *blob, const char *pci_compat,
- struct pci_controller *hose, unsigned long ctrl_addr);
+void ft_fsl_pci_setup(void *blob, const char *compat, unsigned long ctrl_addr);
/*
* Common PCI/PCIE Register structure for mpc85xx and mpc86xx
@@ -173,8 +171,12 @@ struct fsl_pci_info {
int pci_num;
};
+void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info);
int fsl_pci_init_port(struct fsl_pci_info *pci_info,
struct pci_controller *hose, int busno);
+int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev,
+ struct fsl_pci_info *pci_info);
+int fsl_pcie_init_board(int busno);
#define SET_STD_PCI_INFO(x, num) \
{ \
@@ -203,54 +205,18 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
}
#define __FT_FSL_PCI_SETUP(blob, compat, num) \
- ft_fsl_pci_setup(blob, compat, &pci##num##_hose, \
- CONFIG_SYS_PCI##num##_ADDR)
-
-#define __FT_FSL_PCI_DEL(blob, compat, num) \
- ft_fsl_pci_setup(blob, compat, NULL, CONFIG_SYS_PCI##num##_ADDR)
+ ft_fsl_pci_setup(blob, compat, CONFIG_SYS_PCI##num##_ADDR)
#define __FT_FSL_PCIE_SETUP(blob, compat, num) \
- ft_fsl_pci_setup(blob, compat, &pcie##num##_hose, \
- CONFIG_SYS_PCIE##num##_ADDR)
-
-#define __FT_FSL_PCIE_DEL(blob, compat, num) \
- ft_fsl_pci_setup(blob, compat, NULL, CONFIG_SYS_PCIE##num##_ADDR)
+ ft_fsl_pci_setup(blob, compat, CONFIG_SYS_PCIE##num##_ADDR)
-#ifdef CONFIG_PCI1
#define FT_FSL_PCI1_SETUP __FT_FSL_PCI_SETUP(blob, FSL_PCI_COMPAT, 1)
-#else
-#define FT_FSL_PCI1_SETUP __FT_FSL_PCI_DEL(blob, FSL_PCI_COMPAT, 1)
-#endif
-
-#ifdef CONFIG_PCI2
#define FT_FSL_PCI2_SETUP __FT_FSL_PCI_SETUP(blob, FSL_PCI_COMPAT, 2)
-#else
-#define FT_FSL_PCI2_SETUP __FT_FSL_PCI_DEL(blob, FSL_PCI_COMPAT, 2)
-#endif
-#ifdef CONFIG_PCIE1
#define FT_FSL_PCIE1_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 1)
-#else
-#define FT_FSL_PCIE1_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 1)
-#endif
-
-#ifdef CONFIG_PCIE2
#define FT_FSL_PCIE2_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 2)
-#else
-#define FT_FSL_PCIE2_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 2)
-#endif
-
-#ifdef CONFIG_PCIE3
#define FT_FSL_PCIE3_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 3)
-#else
-#define FT_FSL_PCIE3_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 3)
-#endif
-
-#ifdef CONFIG_PCIE4
#define FT_FSL_PCIE4_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 4)
-#else
-#define FT_FSL_PCIE4_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 4)
-#endif
#if defined(CONFIG_FSL_CORENET)
#define FSL_PCIE_COMPAT "fsl,p4080-pcie"
@@ -259,6 +225,7 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
FT_FSL_PCIE2_SETUP; \
FT_FSL_PCIE3_SETUP; \
FT_FSL_PCIE4_SETUP;
+#define FT_FSL_PCIE_SETUP FT_FSL_PCI_SETUP
#elif defined(CONFIG_MPC85xx)
#define FSL_PCI_COMPAT "fsl,mpc8540-pci"
#define FSL_PCIE_COMPAT "fsl,mpc8548-pcie"
@@ -268,6 +235,10 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
FT_FSL_PCIE1_SETUP; \
FT_FSL_PCIE2_SETUP; \
FT_FSL_PCIE3_SETUP;
+#define FT_FSL_PCIE_SETUP \
+ FT_FSL_PCIE1_SETUP; \
+ FT_FSL_PCIE2_SETUP; \
+ FT_FSL_PCIE3_SETUP;
#elif defined(CONFIG_MPC86xx)
#define FSL_PCI_COMPAT "fsl,mpc8610-pci"
#define FSL_PCIE_COMPAT "fsl,mpc8641-pcie"
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 30c64eb..b96dec7 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1,7 +1,7 @@
/*
* MPC85xx Internal Memory Map
*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* Copyright(c) 2002,2003 Motorola Inc.
* Xianghua Xiao (x.xiao@motorola.com)
@@ -1619,6 +1619,8 @@ typedef struct cpc_corenet {
#define CPC_SRCR0_SRAMEN 0x00000001
#define CPC_ERRDIS_TMHITDIS 0x00000080 /* multi-way hit disable */
#define CPC_HDBCR0_CDQ_SPEC_DIS 0x08000000
+#define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x01000000
+#define CPC_HDBCR0_DATA_ECC_SCRUB_DIS 0x00400000
#endif /* CONFIG_SYS_FSL_CPC */
/* Global Utilities Block */
diff --git a/arch/powerpc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/immap_86xx.h
index 4e60cbb..cc338e4 100644
--- a/arch/powerpc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/immap_86xx.h
@@ -1,7 +1,7 @@
/*
* MPC86xx Internal Memory Map
*
- * Copyright 2004 Freescale Semiconductor
+ * Copyright 2004, 2011 Freescale Semiconductor
* Jeff Brown (Jeffrey@freescale.com)
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
@@ -1205,6 +1205,8 @@ typedef struct ccsr_gur {
#define MPC86xx_DEVDISR_PCI1 0x80000000
#define MPC86xx_DEVDISR_PCIE1 0x40000000
#define MPC86xx_DEVDISR_PCIE2 0x20000000
+#define MPC86xx_DEVDISR_SRIO 0x00080000
+#define MPC86xx_DEVDISR_RMSG 0x00040000
#define MPC86xx_DEVDISR_CPU0 0x00008000
#define MPC86xx_DEVDISR_CPU1 0x00004000
#define MPC86xx_RSTCR_HRST_REQ 0x00000002
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 9cafe85..71fafa3 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1030,8 +1030,8 @@
#define SVR_8555 0x807100
#define SVR_8555_E 0x807900
#define SVR_8560 0x807000
-#define SVR_8567 0x807600
-#define SVR_8567_E 0x807E00
+#define SVR_8567 0x807501
+#define SVR_8567_E 0x807D01
#define SVR_8568 0x807500
#define SVR_8568_E 0x807D00
#define SVR_8569 0x808000
generated by cgit v1.1 at 2024-11-07 20:42:40 +0000