diff options
Diffstat (limited to 'arch/powerpc/cpu')
40 files changed, 149 insertions, 137 deletions
diff --git a/arch/powerpc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c index 3c17277..ab6f11d 100644 --- a/arch/powerpc/cpu/74xx_7xx/cpu.c +++ b/arch/powerpc/cpu/74xx_7xx/cpu.c @@ -49,11 +49,6 @@ #include <fdt_support.h> #endif -#ifdef CONFIG_AMIGAONEG3SE -#include "../board/MAI/AmigaOneG3SE/via686.h" -#include "../board/MAI/AmigaOneG3SE/memio.h" -#endif - DECLARE_GLOBAL_DATA_PTR; cpu_t @@ -240,7 +235,7 @@ soft_restart(unsigned long addr) !defined(CONFIG_PPMC7XX) /* no generic way to do board reset. simply call soft_reset. */ void -do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong addr; /* flush and disable I/D cache */ @@ -277,19 +272,17 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * For the 7400 the TB clock runs at 1/4 the cpu bus speed. */ -#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK) +#ifndef CONFIG_SYS_BUS_CLK +#define CONFIG_SYS_BUS_CLK gd->bus_clk +#endif + unsigned long get_tbclk(void) { - return (gd->bus_clk / 4); + return CONFIG_SYS_BUS_CLK / 4; } -#else /* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/ -unsigned long get_tbclk (void) -{ - return CONFIG_SYS_BUS_HZ / 4; -} -#endif /* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/ /* ------------------------------------------------------------------------- */ + #if defined(CONFIG_WATCHDOG) #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx) void diff --git a/arch/powerpc/cpu/74xx_7xx/interrupts.c b/arch/powerpc/cpu/74xx_7xx/interrupts.c index 0ea1aec..7fc8a34 100644 --- a/arch/powerpc/cpu/74xx_7xx/interrupts.c +++ b/arch/powerpc/cpu/74xx_7xx/interrupts.c @@ -34,20 +34,19 @@ int interrupt_init_cpu (unsigned *decrementer_count) { -#if defined(DEBUG) && !defined(CONFIG_AMIGAONEG3SE) - printf("interrupt_init: GT main cause reg: %08x:%08x\n", + debug("interrupt_init: GT main cause reg: %08x:%08x\n", GTREGREAD(LOW_INTERRUPT_CAUSE_REGISTER), GTREGREAD(HIGH_INTERRUPT_CAUSE_REGISTER)); - printf("interrupt_init: ethernet cause regs: %08x %08x %08x\n", + debug("interrupt_init: ethernet cause regs: %08x %08x %08x\n", GTREGREAD(ETHERNET0_INTERRUPT_CAUSE_REGISTER), GTREGREAD(ETHERNET1_INTERRUPT_CAUSE_REGISTER), GTREGREAD(ETHERNET2_INTERRUPT_CAUSE_REGISTER)); - printf("interrupt_init: ethernet mask regs: %08x %08x %08x\n", + debug("interrupt_init: ethernet mask regs: %08x %08x %08x\n", GTREGREAD(ETHERNET0_INTERRUPT_MASK_REGISTER), GTREGREAD(ETHERNET1_INTERRUPT_MASK_REGISTER), GTREGREAD(ETHERNET2_INTERRUPT_MASK_REGISTER)); - puts("interrupt_init: setting decrementer_count\n"); -#endif + debug("interrupt_init: setting decrementer_count\n"); + *decrementer_count = get_tbclk() / CONFIG_SYS_HZ; return (0); @@ -99,7 +98,7 @@ irq_free_handler(int vec) /****************************************************************************/ void -do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[]) { puts("IRQ related functions are unimplemented currently.\n"); } diff --git a/arch/powerpc/cpu/74xx_7xx/speed.c b/arch/powerpc/cpu/74xx_7xx/speed.c index f2fdcd5..6450c3c 100644 --- a/arch/powerpc/cpu/74xx_7xx/speed.c +++ b/arch/powerpc/cpu/74xx_7xx/speed.c @@ -25,10 +25,6 @@ #include <74xx_7xx.h> #include <asm/processor.h> -#ifdef CONFIG_AMIGAONEG3SE -#include "../board/MAI/AmigaOneG3SE/via686.h" -#endif - DECLARE_GLOBAL_DATA_PTR; extern unsigned long get_board_bus_clk (void); diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S index 88fdf88..a36af5a 100644 --- a/arch/powerpc/cpu/74xx_7xx/start.S +++ b/arch/powerpc/cpu/74xx_7xx/start.S @@ -745,9 +745,8 @@ in_ram: bne 5b 6: mr r3, r10 /* Destination Address */ -#if defined(CONFIG_AMIGAONEG3SE) || \ - defined(CONFIG_DB64360) || \ - defined(CONFIG_DB64460) || \ +#if defined(CONFIG_DB64360) || \ + defined(CONFIG_DB64460) || \ defined(CONFIG_CPCI750) || \ defined(CONFIG_PPMC7XX) || \ defined(CONFIG_P3Mx) diff --git a/arch/powerpc/cpu/74xx_7xx/traps.c b/arch/powerpc/cpu/74xx_7xx/traps.c index 5073b05..7ae81eb 100644 --- a/arch/powerpc/cpu/74xx_7xx/traps.c +++ b/arch/powerpc/cpu/74xx_7xx/traps.c @@ -37,20 +37,12 @@ #include <kgdb.h> #include <asm/processor.h> -#ifdef CONFIG_AMIGAONEG3SE -DECLARE_GLOBAL_DATA_PTR; -#endif - /* Returns 0 if exception not found and fixup otherwise. */ extern unsigned long search_exception_table(unsigned long); /* THIS NEEDS CHANGING to use the board info structure. */ -#ifdef CONFIG_AMIGAONEG3SE -#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize) -#else #define END_OF_MEM 0x02000000 -#endif /* * Trap & Exception support diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c index 09cbd20..a1a3bd4 100644 --- a/arch/powerpc/cpu/mpc512x/cpu.c +++ b/arch/powerpc/cpu/mpc512x/cpu.c @@ -75,7 +75,7 @@ int checkcpu (void) int -do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { ulong msr; volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; diff --git a/arch/powerpc/cpu/mpc512x/diu.c b/arch/powerpc/cpu/mpc512x/diu.c index f8d19a0..f638c00 100644 --- a/arch/powerpc/cpu/mpc512x/diu.c +++ b/arch/powerpc/cpu/mpc512x/diu.c @@ -107,7 +107,7 @@ int mpc5121_diu_init(void) } int mpc5121diu_init_show_bmp(cmd_tbl_t *cmdtp, - int flag, int argc, char *argv[]) + int flag, int argc, char * const argv[]) { unsigned int addr; @@ -179,18 +179,4 @@ void *video_hw_init(void) return (void *)pGD; } -/** - * Set the LUT - * - * @index: color number - * @r: red - * @b: blue - * @g: green - */ -void video_set_lut - (unsigned int index, unsigned char r, unsigned char g, unsigned char b) -{ - return; -} - #endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */ diff --git a/arch/powerpc/cpu/mpc512x/iim.c b/arch/powerpc/cpu/mpc512x/iim.c index 8f2eb37..abec8f6 100644 --- a/arch/powerpc/cpu/mpc512x/iim.c +++ b/arch/powerpc/cpu/mpc512x/iim.c @@ -278,7 +278,7 @@ int ads5121_fuse_stat(int bank) return 0; } -int do_ads5121_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_ads5121_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int frow, n, v, bank; diff --git a/arch/powerpc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c index ce8d094..9d749f2 100644 --- a/arch/powerpc/cpu/mpc512x/speed.c +++ b/arch/powerpc/cpu/mpc512x/speed.c @@ -131,7 +131,7 @@ ulong get_bus_freq (ulong dummy) return gd->csb_clk; } -int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { char buf[32]; diff --git a/arch/powerpc/cpu/mpc5xx/cpu.c b/arch/powerpc/cpu/mpc5xx/cpu.c index 7fffebc..5aa7f84 100644 --- a/arch/powerpc/cpu/mpc5xx/cpu.c +++ b/arch/powerpc/cpu/mpc5xx/cpu.c @@ -138,7 +138,7 @@ int dcache_status (void) /* * Reset board */ -int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { #if defined(CONFIG_PATI) volatile ulong *addr = (ulong *) CONFIG_SYS_RESET_ADDRESS; diff --git a/arch/powerpc/cpu/mpc5xx/interrupts.c b/arch/powerpc/cpu/mpc5xx/interrupts.c index 167543f..66bce30 100644 --- a/arch/powerpc/cpu/mpc5xx/interrupts.c +++ b/arch/powerpc/cpu/mpc5xx/interrupts.c @@ -184,7 +184,7 @@ void timer_interrupt_cpu (struct pt_regs *regs) * irqinfo - print information about IRQs * */ -int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int vec; diff --git a/arch/powerpc/cpu/mpc5xxx/cpu.c b/arch/powerpc/cpu/mpc5xxx/cpu.c index 44b8a7a..0c1eebd 100644 --- a/arch/powerpc/cpu/mpc5xxx/cpu.c +++ b/arch/powerpc/cpu/mpc5xxx/cpu.c @@ -78,7 +78,7 @@ int checkcpu (void) /* ------------------------------------------------------------------------- */ int -do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { ulong msr; /* Interrupts and MMU off */ diff --git a/arch/powerpc/cpu/mpc5xxx/interrupts.c b/arch/powerpc/cpu/mpc5xxx/interrupts.c index 16eee3a..50455d0 100644 --- a/arch/powerpc/cpu/mpc5xxx/interrupts.c +++ b/arch/powerpc/cpu/mpc5xxx/interrupts.c @@ -311,7 +311,7 @@ void irq_free_handler(int irq) /****************************************************************************/ #if defined(CONFIG_CMD_IRQ) -void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) +void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[]) { int irq, re_enable; u32 intr_ctrl; diff --git a/arch/powerpc/cpu/mpc8220/cpu.c b/arch/powerpc/cpu/mpc8220/cpu.c index 563cfe0..64e0526 100644 --- a/arch/powerpc/cpu/mpc8220/cpu.c +++ b/arch/powerpc/cpu/mpc8220/cpu.c @@ -52,7 +52,7 @@ int checkcpu (void) /* ------------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { volatile gptmr8220_t *gptmr = (volatile gptmr8220_t *) MMAP_GPTMR; ulong msr; diff --git a/arch/powerpc/cpu/mpc8220/interrupts.c b/arch/powerpc/cpu/mpc8220/interrupts.c index 78e9917..9544d85 100644 --- a/arch/powerpc/cpu/mpc8220/interrupts.c +++ b/arch/powerpc/cpu/mpc8220/interrupts.c @@ -74,7 +74,7 @@ void irq_free_handler (int vec) /****************************************************************************/ void -do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) +do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[]) { puts ("IRQ related functions are unimplemented currently.\n"); } diff --git a/arch/powerpc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c index 08f6a94..44f91b2 100644 --- a/arch/powerpc/cpu/mpc824x/cpu.c +++ b/arch/powerpc/cpu/mpc824x/cpu.c @@ -92,7 +92,7 @@ int checkdcache (void) /*------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong msr, addr; diff --git a/arch/powerpc/cpu/mpc8260/bedbug_603e.c b/arch/powerpc/cpu/mpc8260/bedbug_603e.c index c969ff6..2488612 100644 --- a/arch/powerpc/cpu/mpc8260/bedbug_603e.c +++ b/arch/powerpc/cpu/mpc8260/bedbug_603e.c @@ -18,7 +18,7 @@ extern CPU_DEBUG_CTX bug_ctx; void bedbug603e_init __P((void)); -void bedbug603e_do_break __P((cmd_tbl_t*,int,int,char*[])); +void bedbug603e_do_break __P((cmd_tbl_t*,int,int,char*const[])); void bedbug603e_break_isr __P((struct pt_regs*)); int bedbug603e_find_empty __P((void)); int bedbug603e_set __P((int,unsigned long)); @@ -64,7 +64,7 @@ void bedbug603e_init( void ) * ====================================================================== */ void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc, - char *argv[]) + char * const argv[]) { long addr; /* Address to break at */ int which_bp; /* Breakpoint number */ diff --git a/arch/powerpc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c index aedbf29..220c1e2 100644 --- a/arch/powerpc/cpu/mpc8260/cpu.c +++ b/arch/powerpc/cpu/mpc8260/cpu.c @@ -238,7 +238,7 @@ void upmconfig (uint upm, uint * table, uint size) #if !defined(CONFIG_HAVE_OWN_RESET) int -do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { ulong msr, addr; diff --git a/arch/powerpc/cpu/mpc8260/interrupts.c b/arch/powerpc/cpu/mpc8260/interrupts.c index 2606c60..79178cc 100644 --- a/arch/powerpc/cpu/mpc8260/interrupts.c +++ b/arch/powerpc/cpu/mpc8260/interrupts.c @@ -256,7 +256,7 @@ void timer_interrupt_cpu (struct pt_regs *regs) * */ void -do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) +do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[]) { int irq, re_enable; diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c index d3be909..b664c64 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu.c +++ b/arch/powerpc/cpu/mpc83xx/cpu.c @@ -192,7 +192,7 @@ void upmconfig (uint upm, uint *table, uint size) int -do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { ulong msr; #ifndef MPC83xx_RESET diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c index f3942b4..8dadd64 100644 --- a/arch/powerpc/cpu/mpc83xx/ecc.c +++ b/arch/powerpc/cpu/mpc83xx/ecc.c @@ -98,7 +98,7 @@ void ecc_print_status(void) ddr->capture_attributes & ECC_CAPT_ATTR_VLD); } -int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ddr83xx_t *ddr = &immap->ddr; diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c index faffbaf..446af27 100644 --- a/arch/powerpc/cpu/mpc83xx/interrupts.c +++ b/arch/powerpc/cpu/mpc83xx/interrupts.c @@ -90,7 +90,7 @@ void timer_interrupt_cpu (struct pt_regs *regs) */ void -do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[]) { } diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 500eef1..b5076a9 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -497,7 +497,7 @@ ulong get_bus_freq(ulong dummy) return gd->csb_clk; } -int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { char buf[32]; diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index fddeb2f..6f81fdf 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -186,7 +186,7 @@ int checkcpu (void) /* ------------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[]) { /* Everything after the first generation of PQ3 parts has RSTCR */ #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \ diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c index 409367d..ac8c01a 100644 --- a/arch/powerpc/cpu/mpc85xx/interrupts.c +++ b/arch/powerpc/cpu/mpc85xx/interrupts.c @@ -103,7 +103,7 @@ void timer_interrupt_cpu(struct pt_regs *regs) #if defined(CONFIG_CMD_IRQ) /* irqinfo - print information about PCI devices,not implemented. */ -int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index 826bf32..ddbc221 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -105,7 +105,7 @@ static u8 boot_entry_map[4] = { BOOT_ENTRY_R6_LOWER, }; -int cpu_release(int nr, int argc, char *argv[]) +int cpu_release(int nr, int argc, char * const argv[]) { u32 i, val, *table = (u32 *)get_spin_virt_addr() + nr * NUM_BOOT_ENTRY; u64 boot_addr; diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c index 1887575..9064e78 100644 --- a/arch/powerpc/cpu/mpc86xx/cpu.c +++ b/arch/powerpc/cpu/mpc86xx/cpu.c @@ -124,7 +124,7 @@ checkcpu(void) void -do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; diff --git a/arch/powerpc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c index c78fc72..d8ad6d3 100644 --- a/arch/powerpc/cpu/mpc86xx/interrupts.c +++ b/arch/powerpc/cpu/mpc86xx/interrupts.c @@ -101,7 +101,7 @@ void irq_free_handler(int vec) /* * irqinfo - print information about PCI devices,not implemented. */ -int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { return 0; } diff --git a/arch/powerpc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c index b4a0faa..24eb30a 100644 --- a/arch/powerpc/cpu/mpc86xx/mp.c +++ b/arch/powerpc/cpu/mpc86xx/mp.c @@ -66,7 +66,7 @@ int cpu_disable(int nr) return 0; } -int cpu_release(int nr, int argc, char *argv[]) +int cpu_release(int nr, int argc, char * const argv[]) { /* dummy function so common/cmd_mp.c will build * should be implemented in the future */ diff --git a/arch/powerpc/cpu/mpc8xx/bedbug_860.c b/arch/powerpc/cpu/mpc8xx/bedbug_860.c index 0308bbb..9deda6c 100644 --- a/arch/powerpc/cpu/mpc8xx/bedbug_860.c +++ b/arch/powerpc/cpu/mpc8xx/bedbug_860.c @@ -17,7 +17,7 @@ extern CPU_DEBUG_CTX bug_ctx; void bedbug860_init __P((void)); -void bedbug860_do_break __P((cmd_tbl_t*,int,int,char*[])); +void bedbug860_do_break __P((cmd_tbl_t*,int,int,char*const[])); void bedbug860_break_isr __P((struct pt_regs*)); int bedbug860_find_empty __P((void)); int bedbug860_set __P((int,unsigned long)); @@ -63,7 +63,7 @@ void bedbug860_init( void ) * ====================================================================== */ void bedbug860_do_break (cmd_tbl_t *cmdtp, int flag, int argc, - char *argv[]) + char * const argv[]) { long addr = 0; /* Address to break at */ int which_bp; /* Breakpoint number */ diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c index 2eb848b..142cfa5 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu.c +++ b/arch/powerpc/cpu/mpc8xx/cpu.c @@ -478,7 +478,7 @@ void upmconfig (uint upm, uint * table, uint size) #ifndef CONFIG_LWMON -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong msr, addr; @@ -521,7 +521,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) * and thus too short to reset the external hardware. So we use the * watchdog to reset the board. */ -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { /* prevent triggering the watchdog */ disable_interrupts (); diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index faddee9..ff5ef5f 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -68,6 +68,31 @@ "SDRAM_" #mnemonic, SDRAM_##mnemonic, data); \ } while (0) +#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) +static void update_rdcc(void) +{ + u32 val; + + /* + * Complete RDSS configuration as mentioned on page 7 of the AMCC + * PowerPC440SP/SPe DDR2 application note: + * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning" + * + * Or item #10 "10. Complete RDSS configuration" in chapter + * "22.2.9 SDRAM Initialization" of AMCC PPC460EX/EXr/GT users + * manual. + */ + mfsdram(SDRAM_RTSR, val); + if ((val & SDRAM_RTSR_TRK1SM_MASK) == SDRAM_RTSR_TRK1SM_ATPLS1) { + mfsdram(SDRAM_RDCC, val); + if ((val & SDRAM_RDCC_RDSS_MASK) != SDRAM_RDCC_RDSS_T4) { + val += 0x40000000; + mtsdram(SDRAM_RDCC, val); + } + } +} +#endif + #if defined(CONFIG_440) /* * This DDR2 setup code can dynamically setup the TLB entries for the DDR2 @@ -393,7 +418,7 @@ static void test(void); static void DQS_calibration_process(void); #endif #endif -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); static unsigned char spd_read(uchar chip, uint addr) { @@ -620,6 +645,12 @@ phys_size_t initdram(int board_type) #else program_DQS_calibration(dimm_populated, iic0_dimm_addr, num_dimm_banks); #endif + /* + * Now complete RDSS configuration as mentioned on page 7 of the AMCC + * PowerPC440SP/SPe DDR2 application note: + * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning" + */ + update_rdcc(); #ifdef CONFIG_DDR_ECC /*------------------------------------------------------------------ @@ -2692,20 +2723,6 @@ calibration_loop: blank_string(strlen(str)); #endif /* CONFIG_DDR_RQDC_FIXED */ - /* - * Now complete RDSS configuration as mentioned on page 7 of the AMCC - * PowerPC440SP/SPe DDR2 application note: - * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning" - */ - mfsdram(SDRAM_RTSR, val); - if ((val & SDRAM_RTSR_TRK1SM_MASK) == SDRAM_RTSR_TRK1SM_ATPLS1) { - mfsdram(SDRAM_RDCC, val); - if ((val & SDRAM_RDCC_RDSS_MASK) != SDRAM_RDCC_RDSS_T4) { - val += 0x40000000; - mtsdram(SDRAM_RDCC, val); - } - } - mfsdram(SDRAM_DLCR, val); debug("%s[%d] DLCR: 0x%08lX\n", __FUNCTION__, __LINE__, val); mfsdram(SDRAM_RQDC, val); @@ -3007,6 +3024,13 @@ phys_size_t initdram(int board_type) #endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */ #endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ + /* + * Now complete RDSS configuration as mentioned on page 7 of the AMCC + * PowerPC440SP/SPe DDR2 application note: + * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning" + */ + update_rdcc(); + #if defined(CONFIG_DDR_ECC) do_program_ecc(0); #endif /* defined(CONFIG_DDR_ECC) */ diff --git a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c index aed0ed7..0f69ef9 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c @@ -83,11 +83,6 @@ struct ddrautocal { u32 flags; }; -struct sdram_timing { - u32 wrdtr; - u32 clktr; -}; - struct sdram_timing_clks { u32 wrdtr; u32 clktr; @@ -145,11 +140,12 @@ void spd_ddr_init_hang(void) __attribute__((weak, alias("__spd_ddr_init_hang"))); #endif /* defined(CONFIG_SPD_EEPROM) */ -ulong __ddr_scan_option(ulong default_val) +struct sdram_timing *__ddr_scan_option(struct sdram_timing *default_val) { return default_val; } -ulong ddr_scan_option(ulong) __attribute__((weak, alias("__ddr_scan_option"))); +struct sdram_timing *ddr_scan_option(struct sdram_timing *) + __attribute__((weak, alias("__ddr_scan_option"))); u32 __ddr_rdss_opt(u32 default_val) { @@ -931,7 +927,7 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal) * known working {SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR]} value * pairs via a board defined ddr_scan_option() function. */ -struct sdram_timing full_scan_options[] = { +static struct sdram_timing full_scan_options[] = { {0, 0}, {0, 1}, {0, 2}, {0, 3}, {1, 0}, {1, 1}, {1, 2}, {1, 3}, {2, 0}, {2, 1}, {2, 2}, {2, 3}, @@ -970,10 +966,7 @@ u32 DQS_autocalibration(void) memset(&tcal, 0, sizeof(tcal)); - ddr_scan_option((ulong)full_scan_options); - - scan_list = - (struct sdram_timing *)ddr_scan_option((ulong)full_scan_options); + scan_list = ddr_scan_option(full_scan_options); mfsdram(SDRAM_MCOPT1, val); if ((val & SDRAM_MCOPT1_MCHK_CHK_REP) == SDRAM_MCOPT1_MCHK_CHK_REP) diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c index eed4534..bfba952 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c @@ -476,7 +476,9 @@ void pci_init_board(void) *-----------------------------------------------------------------------------*/ #if defined(CONFIG_440) +#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT) static struct pci_controller ppc440_hose = {0}; +#endif /* * This routine is called to determine if a pci scan should be @@ -704,6 +706,7 @@ void pci_master_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_master_init"))); #endif /* CONFIG_SYS_PCI_MASTER_INIT */ +#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT) int pci_440_init (struct pci_controller *hose) { int reg_num = 0; @@ -845,12 +848,19 @@ int pci_440_init (struct pci_controller *hose) } return hose->last_busno; } +#endif void pci_init_board(void) { - int busno; + int busno = 0; + /* + * Only init PCI when either master or target functionality + * is selected. + */ +#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT) busno = pci_440_init (&ppc440_hose); +#endif #if (defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT)) && \ !defined(CONFIG_PCI_DISABLE_PCIE) diff --git a/arch/powerpc/cpu/ppc4xx/bedbug_405.c b/arch/powerpc/cpu/ppc4xx/bedbug_405.c index ef11cb6..e1500cc 100644 --- a/arch/powerpc/cpu/ppc4xx/bedbug_405.c +++ b/arch/powerpc/cpu/ppc4xx/bedbug_405.c @@ -17,7 +17,7 @@ extern CPU_DEBUG_CTX bug_ctx; void bedbug405_init __P ((void)); -void bedbug405_do_break __P ((cmd_tbl_t *, int, int, char *[])); +void bedbug405_do_break __P ((cmd_tbl_t *, int, int, char * const [])); void bedbug405_break_isr __P ((struct pt_regs *)); int bedbug405_find_empty __P ((void)); int bedbug405_set __P ((int, unsigned long)); @@ -63,7 +63,7 @@ void bedbug405_init (void) * set routine which will assign a breakpoint number. * ====================================================================== */ -void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { long addr = 0; /* Address to break at */ int which_bp; /* Breakpoint number */ diff --git a/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c index ba57211..72c5aec 100644 --- a/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c +++ b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c @@ -45,7 +45,7 @@ static void print_configs(int cur_config_nr) } -static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i; int ret; diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c index e1a023b..851065c 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu.c +++ b/arch/powerpc/cpu/ppc4xx/cpu.c @@ -688,7 +688,7 @@ int ppc440spe_revB() { /* ------------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { #if defined(CONFIG_BOARD_RESET) board_reset(); diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c index 8a6e545..c04eede 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu_init.c +++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c @@ -36,6 +36,26 @@ DECLARE_GLOBAL_DATA_PTR; #define CONFIG_SYS_PLL_RECONFIG 0 #endif +#if defined(CONFIG_440EPX) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) +static void reset_with_rli(void) +{ + u32 reg; + + /* + * Set reload inhibit so configuration will persist across + * processor resets + */ + mfcpr(CPR0_ICFG, reg); + reg |= CPR0_ICFG_RLI_MASK; + mtcpr(CPR0_ICFG, reg); + + /* Reset processor if configuration changed */ + __asm__ __volatile__ ("sync; isync"); + mtspr(SPRN_DBCR0, 0x20000000); +} +#endif + void reconfigure_pll(u32 new_cpu_freq) { #if defined(CONFIG_440EPX) @@ -166,19 +186,28 @@ void reconfigure_pll(u32 new_cpu_freq) } } - if (reset_needed) { + /* Now reset the CPU if needed */ + if (reset_needed) + reset_with_rli(); +#endif + +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) + u32 reg; + + /* + * See "9.2.1.1 Booting with Option E" in the 460EX/GT + * users manual + */ + mfcpr(CPR0_PLLC, reg); + if ((reg & (CPR0_PLLC_RST | CPR0_PLLC_ENG)) == CPR0_PLLC_RST) { /* - * Set reload inhibit so configuration will persist across - * processor resets + * Set engage bit */ - mfcpr(CPR0_ICFG, reg); - reg &= ~CPR0_ICFG_RLI_MASK; - reg |= 1 << 31; - mtcpr(CPR0_ICFG, reg); + reg = (reg & ~CPR0_PLLC_RST) | CPR0_PLLC_ENG; + mtcpr(CPR0_PLLC, reg); - /* Reset processor if configuration changed */ - __asm__ __volatile__ ("sync; isync"); - mtspr(SPRN_DBCR0, 0x20000000); + /* Now reset the CPU */ + reset_with_rli(); } #endif } diff --git a/arch/powerpc/cpu/ppc4xx/interrupts.c b/arch/powerpc/cpu/ppc4xx/interrupts.c index 6db8421..c89bf37 100644 --- a/arch/powerpc/cpu/ppc4xx/interrupts.c +++ b/arch/powerpc/cpu/ppc4xx/interrupts.c @@ -194,7 +194,7 @@ void irq_free_handler(int vec) } #if defined(CONFIG_CMD_IRQ) -int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int vec; diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index c739deb..5296dad 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -207,6 +207,10 @@ (0x00000000) #endif /* !defined(CONFIG_SYS_DCACHE_SACR_VALUE) */ +#if !defined(CONFIG_SYS_TLB_FOR_BOOT_FLASH) +#define CONFIG_SYS_TLB_FOR_BOOT_FLASH 0 /* use TLB 0 as default */ +#endif + #define function_prolog(func_name) .text; \ .align 2; \ .globl func_name; \ @@ -1457,34 +1461,21 @@ relocate_code: isync #endif /* CONFIG_SYS_INIT_RAM_DCACHE */ -#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ - defined(CONFIG_460SX) /* * On some 440er platforms the cache is enabled in the first TLB (Boot-CS) * to speed up the boot process. Now this cache needs to be disabled. */ - iccci 0,0 /* Invalidate inst cache */ - dccci 0,0 /* Invalidate data cache, now no longer our stack */ - sync - isync - +#if defined(CONFIG_440) /* Clear all potential pending exceptions */ mfspr r1,SPRN_MCSR mtspr SPRN_MCSR,r1 -#ifdef CONFIG_SYS_TLB_FOR_BOOT_FLASH addi r1,r0,CONFIG_SYS_TLB_FOR_BOOT_FLASH /* Use defined TLB */ -#else - addi r1,r0,0x0000 /* Default TLB entry is #0 */ -#endif /* CONFIG_SYS_TLB_FOR_BOOT_FLASH */ tlbre r0,r1,0x0002 /* Read contents */ ori r0,r0,0x0c00 /* Or in the inhibit, write through bit */ tlbwe r0,r1,0x0002 /* Save it out */ sync isync -#endif /* defined(CONFIG_440EP) || ... || defined(CONFIG_460GT) */ +#endif /* defined(CONFIG_440) */ mr r1, r3 /* Set new stack pointer */ mr r9, r4 /* Save copy of Init Data pointer */ mr r10, r5 /* Save copy of Destination Address */ |