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-rw-r--r--arch/powerpc/cpu/mpc85xx/ddr-gen3.c13
-rw-r--r--arch/powerpc/cpu/mpc85xx/p2041_ids.c6
-rw-r--r--arch/powerpc/cpu/mpc85xx/p3041_ids.c8
-rw-r--r--arch/powerpc/cpu/mpc85xx/p4080_ids.c6
-rw-r--r--arch/powerpc/cpu/mpc85xx/p5020_ids.c8
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/main.c2
6 files changed, 26 insertions, 17 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
index 18e9cc5..81961de 100644
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
@@ -50,7 +50,10 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
csn = i;
csn_bnds_backup = regs->cs[i].bnds;
csn_bnds_t = (unsigned int *) &regs->cs[i].bnds;
- *csn_bnds_t = regs->cs[i].bnds ^ 0x0F000F00;
+ if (cs_ea > 0xeff)
+ *csn_bnds_t = regs->cs[i].bnds + 0x01000000;
+ else
+ *csn_bnds_t = regs->cs[i].bnds + 0x01000100;
debug("Found cs%d_bns (0x%08x) covering 0xff000000, "
"change it to 0x%x\n",
csn, csn_bnds_backup, regs->cs[i].bnds);
@@ -310,9 +313,15 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
/* 7. Wait for 400ms/GB */
total_gb_size_per_controller = 0;
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
- total_gb_size_per_controller +=
+ if (i == csn) {
+ total_gb_size_per_controller +=
+ ((csn_bnds_backup & 0xFFFF) >> 6)
+ - (csn_bnds_backup >> 22) + 1;
+ } else {
+ total_gb_size_per_controller +=
((regs->cs[i].bnds & 0xFFFF) >> 6)
- (regs->cs[i].bnds >> 22) + 1;
+ }
}
if (in_be32(&ddr->sdram_cfg) & 0x80000)
total_gb_size_per_controller <<= 1;
diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c
index b99b54d..91d9cac 100644
--- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c
@@ -62,9 +62,9 @@ struct liodn_id_table liodn_tbl[] = {
SET_SATA_LIODN(1, 127),
SET_SATA_LIODN(2, 128),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 193),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 194),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 195),
SET_DMA_LIODN(1, 197),
SET_DMA_LIODN(2, 198),
diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c
index c50b442..e46a714 100644
--- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c
@@ -62,10 +62,10 @@ struct liodn_id_table liodn_tbl[] = {
SET_SATA_LIODN(1, 127),
SET_SATA_LIODN(2, 128),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 193),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 194),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 195),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 196),
SET_DMA_LIODN(1, 197),
SET_DMA_LIODN(2, 198),
diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
index a6ea6af..5c287fb 100644
--- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
@@ -52,9 +52,9 @@ struct liodn_id_table liodn_tbl[] = {
SET_SDHC_LIODN(1, 156),
- SET_PCI_LIODN("fsl,p4080-pcie", 1, 193),
- SET_PCI_LIODN("fsl,p4080-pcie", 2, 194),
- SET_PCI_LIODN("fsl,p4080-pcie", 3, 195),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 193),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 194),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 195),
SET_DMA_LIODN(1, 196),
SET_DMA_LIODN(2, 197),
diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c
index ff57a19..e8c26bf 100644
--- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c
@@ -62,10 +62,10 @@ struct liodn_id_table liodn_tbl[] = {
SET_SATA_LIODN(1, 127),
SET_SATA_LIODN(2, 128),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 193),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 194),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 195),
+ SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 196),
SET_DMA_LIODN(1, 197),
SET_DMA_LIODN(2, 198),
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index f52ad9f..c2a03e3 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -366,7 +366,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
}
}
-#else
+#elif defined(CONFIG_SYS_DDR_RAW_TIMING)
case STEP_COMPUTE_DIMM_PARMS:
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {