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-rw-r--r--arch/powerpc/cpu/mpc86xx/interrupts.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c
index d8ad6d3..14821f4 100644
--- a/arch/powerpc/cpu/mpc86xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc86xx/interrupts.c
@@ -35,12 +35,24 @@
#include <mpc86xx.h>
#include <command.h>
#include <asm/processor.h>
+#ifdef CONFIG_POST
+#include <post.h>
+#endif
int interrupt_init_cpu(unsigned long *decrementer_count)
{
volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_pic_t *pic = &immr->im_pic;
+#ifdef CONFIG_POST
+ /*
+ * The POST word is stored in the PIC's TFRR register which gets
+ * cleared when the PIC is reset. Save it off so we can restore it
+ * later.
+ */
+ ulong post_word = post_word_load();
+#endif
+
pic->gcr = MPC86xx_PICGCR_RST;
while (pic->gcr & MPC86xx_PICGCR_RST)
;
@@ -74,6 +86,10 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
pic->ctpr = 0; /* 40080 clear current task priority register */
#endif
+#ifdef CONFIG_POST
+ post_word_store(post_word);
+#endif
+
return 0;
}