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-rw-r--r--arch/nios2/config.mk2
-rw-r--r--arch/nios2/cpu/start.S9
-rw-r--r--arch/nios2/cpu/u-boot.lds135
-rw-r--r--arch/nios2/include/asm/byteorder.h6
-rw-r--r--arch/nios2/include/asm/dma-mapping.h23
-rw-r--r--arch/nios2/lib/board.c18
6 files changed, 188 insertions, 5 deletions
diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk
index be40639..8e5d6ef 100644
--- a/arch/nios2/config.mk
+++ b/arch/nios2/config.mk
@@ -28,3 +28,5 @@ STANDALONE_LOAD_ADDR = 0x02000000 -L $(gcclibdir)
PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
PLATFORM_CPPFLAGS += -ffixed-r15 -G0
+
+LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds
diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index 31cd5b0..d1016ea 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -34,6 +34,7 @@
.global _start
_start:
+ wrctl status, r0 /* Disable interrupts */
/* ICACHE INIT -- only the icache line at the reset address
* is invalidated at reset. So the init must stay within
* the cache line size (8 words). If GERMS is used, we'll
@@ -43,10 +44,9 @@ _start:
ori r4, r0, %lo(CONFIG_SYS_ICACHELINE_SIZE)
movhi r5, %hi(CONFIG_SYS_ICACHE_SIZE)
ori r5, r5, %lo(CONFIG_SYS_ICACHE_SIZE)
- mov r6, r0
-0: initi r6
- add r6, r6, r4
- bltu r6, r5, 0b
+0: initi r5
+ sub r5, r5, r4
+ bgt r5, r0, 0b
br _except_end /* Skip the tramp */
/* EXCEPTION TRAMPOLINE -- the following gets copied
@@ -62,7 +62,6 @@ _except_end:
/* INTERRUPTS -- for now, all interrupts masked and globally
* disabled.
*/
- wrctl status, r0 /* Disable interrupts */
wrctl ienable, r0 /* All disabled */
/* DCACHE INIT -- if dcache not implemented, initd behaves as
diff --git a/arch/nios2/cpu/u-boot.lds b/arch/nios2/cpu/u-boot.lds
new file mode 100644
index 0000000..fe4a2eb
--- /dev/null
+++ b/arch/nios2/cpu/u-boot.lds
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text :
+ {
+ arch/nios2/cpu/start.o (.text)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t*)
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ *(.gnu.linkonce.r*)
+ }
+ . = ALIGN (4);
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* CMD TABLE - sandwich this in between text and data so
+ * the initialization code relocates the command table as
+ * well -- admittedly, this is just pure laziness ;-)
+ */
+ __u_boot_cmd_start = .;
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ }
+ . = ALIGN(4);
+ __u_boot_cmd_end = .;
+
+ /* INIT DATA sections - "Small" data (see the gcc -G option)
+ * is always gp-relative. Here we make all init data sections
+ * adjacent to simplify the startup code -- and provide
+ * the global pointer for gp-relative access.
+ */
+ _data = .;
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(16);
+ _gp = .; /* Global pointer addr */
+ PROVIDE (gp = .);
+
+ .sdata :
+ {
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ }
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* UNINIT DATA - Small uninitialized data is first so it's
+ * adjacent to sdata and can be referenced via gp. The normal
+ * bss follows. We keep it adjacent to simplify init code.
+ */
+ __bss_start = .;
+ .sbss (NOLOAD) :
+ {
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ .bss (NOLOAD) :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE (end = .);
+
+ /* DEBUG -- symbol table, string table, etc. etc.
+ */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/arch/nios2/include/asm/byteorder.h b/arch/nios2/include/asm/byteorder.h
index 495c823..d5c152e 100644
--- a/arch/nios2/include/asm/byteorder.h
+++ b/arch/nios2/include/asm/byteorder.h
@@ -25,6 +25,12 @@
#define __ASM_NIOS2_BYTEORDER_H_
#include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __BYTEORDER_HAS_U64__
+# define __SWAB_64_THRU_32__
+#endif
+
#include <linux/byteorder/little_endian.h>
#endif /* __ASM_NIOS2_BYTEORDER_H_ */
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
new file mode 100644
index 0000000..1350e3b
--- /dev/null
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_NIOS2_DMA_MAPPING_H
+#define __ASM_NIOS2_DMA_MAPPING_H
+
+/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
+ * to uncached io region.
+ *
+ * IO_REGION_BASE should be defined in board config header file
+ * 0x80000000 for nommu, 0xe0000000 for mmu
+ */
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+ void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+ if (!addr)
+ return 0;
+ flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
+ *handle = ((unsigned long)addr +
+ (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
+ ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
+ return (void *)(*handle | IO_REGION_BASE);
+}
+
+#endif /* __ASM_NIOS2_DMA_MAPPING_H */
diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c
index 8ec66a3..f83e691 100644
--- a/arch/nios2/lib/board.c
+++ b/arch/nios2/lib/board.c
@@ -28,6 +28,7 @@
#include <stdio_dev.h>
#include <watchdog.h>
#include <malloc.h>
+#include <mmc.h>
#include <net.h>
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
@@ -35,6 +36,9 @@
#if defined(CONFIG_SYS_NIOS_EPCSBASE)
#include <nios2-epcs.h>
#endif
+#ifdef CONFIG_CMD_NAND
+#include <nand.h> /* cannot even include nand.h if it isnt configured */
+#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -100,7 +104,9 @@ void board_init (void)
bd = gd->bd;
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+#ifndef CONFIG_SYS_NO_FLASH
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+#endif
#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
bd->bi_sramstart= CONFIG_SYS_SRAM_BASE;
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
@@ -119,8 +125,20 @@ void board_init (void)
/* The Malloc area is immediately below the monitor copy in RAM */
mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
+#ifndef CONFIG_SYS_NO_FLASH
WATCHDOG_RESET ();
bd->bi_flashsize = flash_init();
+#endif
+
+#ifdef CONFIG_CMD_NAND
+ puts("NAND: ");
+ nand_init();
+#endif
+
+#ifdef CONFIG_GENERIC_MMC
+ puts("MMC: ");
+ mmc_initialize(bd);
+#endif
WATCHDOG_RESET ();
env_relocate();