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-rw-r--r--arch/arm/cpu/armv7/Kconfig8
-rw-r--r--arch/arm/cpu/armv7/virt-v7.c4
-rw-r--r--arch/arm/cpu/armv8/Kconfig2
-rw-r--r--arch/arm/dts/dra7-evm.dts12
-rw-r--r--arch/arm/dts/dra72-evm.dts12
-rw-r--r--arch/arm/mach-rockchip/rk3036/Makefile1
-rw-r--r--arch/arm/mach-rockchip/rk3036/reset_rk3036.c45
-rw-r--r--arch/arm/mach-rockchip/rk3288/Makefile1
-rw-r--r--arch/arm/mach-rockchip/rk3288/reset_rk3288.c47
-rw-r--r--arch/arm/mach-rockchip/rk3399/Makefile1
-rw-r--r--arch/arm/mach-rockchip/rk3399/reset_rk3399.c45
-rw-r--r--arch/arm/mach-snapdragon/Makefile1
-rw-r--r--arch/arm/mach-snapdragon/reset.c40
13 files changed, 30 insertions, 189 deletions
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index bd6108e..41c6639 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -7,14 +7,14 @@ config CPU_V7_HAS_VIRT
bool
config ARMV7_NONSEC
- boolean "Enable support for booting in non-secure mode" if EXPERT
+ bool "Enable support for booting in non-secure mode" if EXPERT
depends on CPU_V7_HAS_NONSEC
default y
---help---
Say Y here to enable support for booting in non-secure / SVC mode.
config ARMV7_BOOT_SEC_DEFAULT
- boolean "Boot in secure mode by default" if EXPERT
+ bool "Boot in secure mode by default" if EXPERT
depends on ARMV7_NONSEC
default y if TEGRA
---help---
@@ -25,14 +25,14 @@ config ARMV7_BOOT_SEC_DEFAULT
variable to "sec" or "nonsec".
config ARMV7_VIRT
- boolean "Enable support for hardware virtualization" if EXPERT
+ bool "Enable support for hardware virtualization" if EXPERT
depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
default y
---help---
Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
config ARMV7_LPAE
- boolean "Use LPAE page table format" if EXPERT
+ bool "Use LPAE page table format" if EXPERT
depends on CPU_V7
default n
---help---
diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c
index 9c53306..d33e5c6 100644
--- a/arch/arm/cpu/armv7/virt-v7.c
+++ b/arch/arm/cpu/armv7/virt-v7.c
@@ -54,10 +54,12 @@ static void relocate_secure_section(void)
{
#ifdef CONFIG_ARMV7_SECURE_BASE
size_t sz = __secure_end - __secure_start;
+ unsigned long szflush = ALIGN(sz + 1, CONFIG_SYS_CACHELINE_SIZE);
memcpy((void *)CONFIG_ARMV7_SECURE_BASE, __secure_start, sz);
+
flush_dcache_range(CONFIG_ARMV7_SECURE_BASE,
- CONFIG_ARMV7_SECURE_BASE + sz + 1);
+ CONFIG_ARMV7_SECURE_BASE + szflush);
protect_secure_section();
invalidate_icache_all();
#endif
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index acf2460..7e1fc4c 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -1,7 +1,7 @@
if ARM64
config ARMV8_MULTIENTRY
- boolean "Enable multiple CPUs to enter into U-Boot"
+ bool "Enable multiple CPUs to enter into U-Boot"
config ARMV8_SPIN_TABLE
bool "Support spin-table enable method"
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 06b7b36..fe755c0 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -24,6 +24,15 @@
reg = <0x80000000 0x60000000>; /* 1536 MB */
};
+ evm_3v3_sd: fixedregulator-sd {
+ compatible = "regulator-fixed";
+ regulator-name = "evm_3v3_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
+ };
+
mmc2_3v3: fixedregulator-mmc2 {
compatible = "regulator-fixed";
regulator-name = "mmc2_3v3";
@@ -468,7 +477,8 @@
&mmc1 {
status = "okay";
- vmmc-supply = <&ldo1_reg>;
+ vmmc-supply = <&evm_3v3_sd>;
+ vmmc_aux-supply = <&ldo1_reg>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts
index e78ec2e..4ca37fa 100644
--- a/arch/arm/dts/dra72-evm.dts
+++ b/arch/arm/dts/dra72-evm.dts
@@ -35,6 +35,15 @@
regulator-max-microvolt = <3300000>;
};
+ evm_3v3_sd: fixedregulator-sd {
+ compatible = "regulator-fixed";
+ regulator-name = "evm_3v3_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
+ };
+
extcon_usb1: extcon_usb1 {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
@@ -499,7 +508,8 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
- vmmc-supply = <&ldo1_reg>;
+ vmmc_aux-supply = <&ldo1_reg>;
+ vmmc-supply = <&evm_3v3_sd>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile
index 6095777..916a7a4 100644
--- a/arch/arm/mach-rockchip/rk3036/Makefile
+++ b/arch/arm/mach-rockchip/rk3036/Makefile
@@ -5,7 +5,6 @@
#
ifndef CONFIG_SPL_BUILD
-obj-y += reset_rk3036.o
obj-y += syscon_rk3036.o
endif
diff --git a/arch/arm/mach-rockchip/rk3036/reset_rk3036.c b/arch/arm/mach-rockchip/rk3036/reset_rk3036.c
deleted file mode 100644
index b3d2113..0000000
--- a/arch/arm/mach-rockchip/rk3036/reset_rk3036.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3036.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3036_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
- struct rk3036_cru *cru = rockchip_get_cru();
-
- if (IS_ERR(cru))
- return PTR_ERR(cru);
- switch (type) {
- case SYSRESET_WARM:
- writel(0xeca8, &cru->cru_glb_srst_snd_value);
- break;
- case SYSRESET_COLD:
- writel(0xfdb9, &cru->cru_glb_srst_fst_value);
- break;
- default:
- return -EPROTONOSUPPORT;
- }
-
- return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3036_sysreset = {
- .request = rk3036_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3036) = {
- .name = "rk3036_sysreset",
- .id = UCLASS_SYSRESET,
- .ops = &rk3036_sysreset,
-};
diff --git a/arch/arm/mach-rockchip/rk3288/Makefile b/arch/arm/mach-rockchip/rk3288/Makefile
index 82b00a1..5ec3f0d 100644
--- a/arch/arm/mach-rockchip/rk3288/Makefile
+++ b/arch/arm/mach-rockchip/rk3288/Makefile
@@ -5,6 +5,5 @@
#
obj-y += clk_rk3288.o
-obj-y += reset_rk3288.o
obj-y += sdram_rk3288.o
obj-y += syscon_rk3288.o
diff --git a/arch/arm/mach-rockchip/rk3288/reset_rk3288.c b/arch/arm/mach-rockchip/rk3288/reset_rk3288.c
deleted file mode 100644
index 0aad1c2..0000000
--- a/arch/arm/mach-rockchip/rk3288/reset_rk3288.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3288_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
- struct rk3288_cru *cru = rockchip_get_cru();
-
- if (IS_ERR(cru))
- return PTR_ERR(cru);
- switch (type) {
- case SYSRESET_WARM:
- rk_clrreg(&cru->cru_mode_con, 0xffff);
- writel(0xeca8, &cru->cru_glb_srst_snd_value);
- break;
- case SYSRESET_COLD:
- rk_clrreg(&cru->cru_mode_con, 0xffff);
- writel(0xfdb9, &cru->cru_glb_srst_fst_value);
- break;
- default:
- return -EPROTONOSUPPORT;
- }
-
- return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3288_sysreset = {
- .request = rk3288_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3288) = {
- .name = "rk3288_sysreset",
- .id = UCLASS_SYSRESET,
- .ops = &rk3288_sysreset,
-};
diff --git a/arch/arm/mach-rockchip/rk3399/Makefile b/arch/arm/mach-rockchip/rk3399/Makefile
index 3ca2028..607f9c9 100644
--- a/arch/arm/mach-rockchip/rk3399/Makefile
+++ b/arch/arm/mach-rockchip/rk3399/Makefile
@@ -5,5 +5,4 @@
#
obj-y += rk3399.o
-obj-y += reset_rk3399.o
obj-y += syscon_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3399/reset_rk3399.c b/arch/arm/mach-rockchip/rk3399/reset_rk3399.c
deleted file mode 100644
index 9a55546..0000000
--- a/arch/arm/mach-rockchip/rk3399/reset_rk3399.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3399.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
- struct rk3399_cru *cru = rockchip_get_cru();
-
- if (IS_ERR(cru))
- return PTR_ERR(cru);
- switch (type) {
- case SYSRESET_WARM:
- writel(0xeca8, &cru->glb_srst_snd_value);
- break;
- case SYSRESET_COLD:
- writel(0xfdb9, &cru->glb_srst_fst_value);
- break;
- default:
- return -EPROTONOSUPPORT;
- }
-
- return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3399_sysreset = {
- .request = rk3399_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3399) = {
- .name = "rk3399_sysreset",
- .id = UCLASS_SYSRESET,
- .ops = &rk3399_sysreset,
-};
diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
index 4735844..d82a04d 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -6,4 +6,3 @@
obj-y += clock-apq8016.o
obj-y += sysmap-apq8016.o
-obj-y += reset.o
diff --git a/arch/arm/mach-snapdragon/reset.c b/arch/arm/mach-snapdragon/reset.c
deleted file mode 100644
index a6cabfb..0000000
--- a/arch/arm/mach-snapdragon/reset.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Qualcomm APQ8016 reset controller driver
- *
- * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static int msm_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
- phys_addr_t addr = dev_get_addr(dev);
- if (!addr)
- return -EINVAL;
- writel(0, addr);
- return -EINPROGRESS;
-}
-
-static struct sysreset_ops msm_sysreset_ops = {
- .request = msm_sysreset_request,
-};
-
-static const struct udevice_id msm_sysreset_ids[] = {
- { .compatible = "qcom,pshold" },
- { }
-};
-
-U_BOOT_DRIVER(msm_reset) = {
- .name = "msm_sysreset",
- .id = UCLASS_SYSRESET,
- .of_match = msm_sysreset_ids,
- .ops = &msm_sysreset_ops,
-};
generated by cgit v1.1 at 2024-12-27 22:24:11 +0000