diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 34 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/ddr.c | 1 | ||||
| -rw-r--r-- | arch/arm/imx-common/spl.c | 8 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 8 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mxs/sys_proto.h | 2 |
6 files changed, 50 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 1972de8..1ec8e2b 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -248,6 +248,39 @@ static void mxs_power_setup_5v_detect(void) } /** + * mxs_power_switch_dcdc_clocksource() - Switch PLL clock for DC-DC converters + * @freqsel: One of the POWER_MISC_FREQSEL_xxx defines to select the clock + * + * This function configures and then enables an alternative PLL clock source + * for the DC-DC converters. + */ +void mxs_power_switch_dcdc_clocksource(uint32_t freqsel) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + + /* Select clocksource for DC-DC converters */ + clrsetbits_le32(&power_regs->hw_power_misc, + POWER_MISC_FREQSEL_MASK, + freqsel); + setbits_le32(&power_regs->hw_power_misc, + POWER_MISC_SEL_PLLCLK); +} + +/** + * mxs_power_setup_dcdc_clocksource() - Setup PLL clock source for DC-DC converters + * + * Normally, there is no need to switch DC-DC clocksource. This is the reason, + * why this function is a stub and does nothing. However, boards can implement + * this function when required and call mxs_power_switch_dcdc_clocksource() to + * switch to an alternative clock source. + */ +__weak void mxs_power_setup_dcdc_clocksource(void) +{ + debug("SPL: Using default DC-DC clocksource\n"); +} + +/** * mxs_src_power_init() - Preconfigure the power block * * This function configures reasonable values for the DC-DC control loop @@ -872,6 +905,7 @@ static void mxs_power_configure_power_source(void) debug("SPL: Configuring power source\n"); + mxs_power_setup_dcdc_clocksource(); mxs_src_power_init(); if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index d325191..64514b1 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -727,6 +727,8 @@ int enable_lcdif_clock(u32 base_addr) reg = readl(&imx_ccm->CCGR2); reg |= MXC_CCM_CCGR2_LCD_MASK; writel(reg, &imx_ccm->CCGR2); + + return 0; } #endif diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 6b039e4..567ddc4 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -796,7 +796,6 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, debug("Rtt_wr=%d\n", sysinfo->rtt_wr); debug("Rtt_nom=%d\n", sysinfo->rtt_nom); debug("SRT=%d\n", ddr3_cfg->SRT); - debug("tcl=%d\n", tcl); debug("twr=%d\n", twr); /* diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index ac6e40e..caa45cf 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -20,7 +20,15 @@ u32 spl_boot_device(void) struct src *psrc = (struct src *)SRC_BASE_ADDR; unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28); unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1); + unsigned int bmode = readl(&psrc->sbmr2); + /* + * Check for BMODE if serial downloader is enabled + * BOOT_MODE - see IMX6DQRM Table 8-1 + */ + if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */ + (gpr10_boot && (reg == 1))) + return BOOT_DEVICE_UART; /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ switch ((reg & 0x000000FF) >> 4) { /* EIM: See 8.5.1, Table 8-9 */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 2f068e5..f24525e 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -335,10 +335,10 @@ #include <asm/types.h> /* only for i.MX6SX/UL */ -#define WDOG3_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL) ? \ - MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR) -#define LCDIF1_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL)) ? \ - MX6UL_LCDIF1_BASE_ADDR : MX6SX_LCDIF1_BASE_ADDR +#define WDOG3_BASE_ADDR ((is_cpu_type(MXC_CPU_MX6UL) ? \ + MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)) +#define LCDIF1_BASE_ADDR ((is_cpu_type(MXC_CPU_MX6UL)) ? \ + MX6UL_LCDIF1_BASE_ADDR : MX6SX_LCDIF1_BASE_ADDR) extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac); diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h index 20ff101..f2b075e 100644 --- a/arch/arm/include/asm/arch-mxs/sys_proto.h +++ b/arch/arm/include/asm/arch-mxs/sys_proto.h @@ -25,6 +25,8 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)); void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr, const iomux_cfg_t *iomux_setup, const unsigned int iomux_size); + +void mxs_power_switch_dcdc_clocksource(uint32_t freqsel); #endif struct mxs_pair { |