4 files changed, 27 insertions, 21 deletions
diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c
index 34ec7b2..16530b0 100644
--- a/arch/arm/cpu/arm926ejs/omap/timer.c
+++ b/arch/arm/cpu/arm926ejs/omap/timer.c
@@ -36,11 +36,14 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 
-#define TIMER_LOAD_VAL 0xffffffff
+#define TIMER_CLOCK	(CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV))
+#define TIMER_LOAD_VAL	0xffffffff
 
 /* macro to read the 32 bit timer */
-#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
+#define READ_TIMER	readl(CONFIG_SYS_TIMERBASE+8) \
+			/ (TIMER_CLOCK / CONFIG_SYS_HZ)
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -114,7 +117,8 @@ ulong get_timer_masked (void)
 		 * (TLV-now) amount of time after passing though -1
 		 * nts = new "advancing time stamp"...it could also roll and cause problems.
 		 */
-		timestamp += lastdec + TIMER_LOAD_VAL - now;
+		timestamp += lastdec + (TIMER_LOAD_VAL / (TIMER_CLOCK /
+					CONFIG_SYS_HZ)) - now;
 	}
 	lastdec = now;
 
@@ -160,8 +164,5 @@ unsigned long long get_ticks(void)
  */
 ulong get_tbclk (void)
 {
-	ulong tbclk;
-
-	tbclk = CONFIG_SYS_HZ;
-	return tbclk;
+	return CONFIG_SYS_HZ;
 }
diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c b/arch/arm/cpu/armv7/omap4/hw_data.c
index 7551b98..04977b4 100644
--- a/arch/arm/cpu/armv7/omap4/hw_data.c
+++ b/arch/arm/cpu/armv7/omap4/hw_data.c
@@ -216,14 +216,14 @@ struct dplls omap4460_dplls = {
 
 struct pmic_data twl6030_4430es1 = {
 	.base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV,
-	.step = 12660, /* 10 mV represented in uV */
+	.step = 12660, /* 12.66 mV represented in uV */
 	/* The code starts at 1 not 0 */
 	.start_code = 1,
 };
 
 struct pmic_data twl6030 = {
 	.base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV,
-	.step = 12660, /* 10 mV represented in uV */
+	.step = 12660, /* 12.66 mV represented in uV */
 	/* The code starts at 1 not 0 */
 	.start_code = 1,
 };
@@ -271,11 +271,11 @@ struct vcores_data omap4460_volts = {
 
 	.core.value = 1200,
 	.core.addr = SMPS_REG_ADDR_VCORE1,
-	.core.pmic = &tps62361,
+	.core.pmic = &twl6030,
 
 	.mm.value = 1200,
 	.mm.addr = SMPS_REG_ADDR_VCORE2,
-	.mm.pmic = &tps62361,
+	.mm.pmic = &twl6030,
 };
 
 /*
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 260cc34..914df01 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -84,19 +84,19 @@
 #define MT41J256M8HX15E_IOCTRL_VALUE		0x18B
 
 /* Micron MT41K256M16HA-125E */
-#define MT41K256M16HA125E_EMIF_READ_LATENCY	0x100006
-#define MT41K256M16HA125E_EMIF_TIM1		0x0888A39B
-#define MT41K256M16HA125E_EMIF_TIM2		0x26517FDA
-#define MT41K256M16HA125E_EMIF_TIM3		0x501F84EF
-#define MT41K256M16HA125E_EMIF_SDCFG		0x61C04BB2
-#define MT41K256M16HA125E_EMIF_SDREF		0x0000093B
+#define MT41K256M16HA125E_EMIF_READ_LATENCY	0x100007
+#define MT41K256M16HA125E_EMIF_TIM1		0x0AAAD4DB
+#define MT41K256M16HA125E_EMIF_TIM2		0x26437FDA
+#define MT41K256M16HA125E_EMIF_TIM3		0x501F83FF
+#define MT41K256M16HA125E_EMIF_SDCFG		0x61C052B2
+#define MT41K256M16HA125E_EMIF_SDREF		0xC30
 #define MT41K256M16HA125E_ZQ_CFG		0x50074BE4
 #define MT41K256M16HA125E_DLL_LOCK_DIFF		0x1
-#define MT41K256M16HA125E_RATIO			0x40
+#define MT41K256M16HA125E_RATIO			0x80
 #define MT41K256M16HA125E_INVERT_CLKOUT		0x0
-#define MT41K256M16HA125E_RD_DQS		0x3C
-#define MT41K256M16HA125E_WR_DQS		0x45
-#define MT41K256M16HA125E_PHY_WR_DATA		0x7F
+#define MT41K256M16HA125E_RD_DQS		0x3A
+#define MT41K256M16HA125E_WR_DQS		0x42
+#define MT41K256M16HA125E_PHY_WR_DATA		0x7E
 #define MT41K256M16HA125E_PHY_FIFO_WE		0x9B
 #define MT41K256M16HA125E_IOCTRL_VALUE		0x18B
 
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h
index 14a2c7c..4c23b27 100644
--- a/arch/arm/include/asm/arch-am33xx/spl.h
+++ b/arch/arm/include/asm/arch-am33xx/spl.h
@@ -38,6 +38,11 @@
 #define BOOT_DEVICE_CPGMAC	70
 #define BOOT_DEVICE_MMC2_2      0xFF
 
+#ifdef CONFIG_AM33XX
 #define MMC_BOOT_DEVICES_START	BOOT_DEVICE_MMC1
 #define MMC_BOOT_DEVICES_END	BOOT_DEVICE_MMC2
+#elif defined(CONFIG_TI814X)
+#define MMC_BOOT_DEVICES_START	BOOT_DEVICE_MMC2
+#define MMC_BOOT_DEVICES_END	BOOT_DEVICE_MMC1
+#endif
 #endif