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-rw-r--r--arch/arm/Kconfig19
-rw-r--r--arch/arm/cpu/arm1136/mx31/Makefile4
-rw-r--r--arch/arm/cpu/arm1136/mx31/relocate.S23
-rw-r--r--arch/arm/cpu/arm1136/mx35/Makefile4
-rw-r--r--arch/arm/cpu/arm1136/mx35/relocate.S23
-rw-r--r--arch/arm/cpu/armv7/am33xx/board.c13
-rw-r--r--arch/arm/cpu/armv7/lowlevel_init.S22
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c29
-rw-r--r--arch/arm/cpu/armv7/omap-common/hwinit-common.c6
-rw-r--r--arch/arm/cpu/armv7/omap3/Kconfig5
-rw-r--r--arch/arm/cpu/armv7/omap3/board.c21
-rw-r--r--arch/arm/cpu/pxa/cpuinfo.c17
-rw-r--r--arch/arm/imx-common/Makefile1
-rw-r--r--arch/arm/imx-common/cmd_dek.c91
-rw-r--r--arch/arm/imx-common/cpu.c10
-rw-r--r--arch/arm/imx-common/timer.c17
-rw-r--r--arch/arm/include/asm/arch-imx/cpu.h2
-rw-r--r--arch/arm/include/asm/arch-mx5/sys_proto.h1
-rw-r--r--arch/arm/include/asm/arch-mx6/crm_regs.h2
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h4
-rw-r--r--arch/arm/include/asm/arch-mx6/mx6sl_pins.h10
-rw-r--r--arch/arm/include/asm/spl.h2
-rw-r--r--arch/arm/lib/crt0.S13
-rw-r--r--arch/arm/lib/spl.c4
-rw-r--r--arch/arm/mach-tegra/Kconfig3
25 files changed, 327 insertions, 19 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index bc55e5b..27bcc2d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -381,6 +381,19 @@ config TARGET_AM43XX_EVM
select CPU_V7
select SUPPORT_SPL
+config TARGET_BAV335X
+ bool "Support bav335x"
+ select CPU_V7
+ select SUPPORT_SPL
+ help
+ The BAV335x OEM Network Processor integrates all the functions of an
+ embedded network computer in a small, easy to use SODIMM module which
+ incorporates the popular Texas Instruments Sitara 32bit ARM Coretex-A8
+ processor, with fast DDR3 512MB SDRAM, 4GB of embedded MMC and a Gigabit
+ ethernet with simple connection to external connectors.
+
+ For more information, visit: http://birdland.com/oem
+
config TARGET_TI814X_EVM
bool "Support ti814x_evm"
select CPU_V7
@@ -465,6 +478,10 @@ config TARGET_WANDBOARD
bool "Support wandboard"
select CPU_V7
+config TARGET_WARP
+ bool "Support WaRP"
+ select CPU_V7
+
config TARGET_TITANIUM
bool "Support titanium"
select CPU_V7
@@ -832,6 +849,7 @@ source "board/syteco/zmx25/Kconfig"
source "board/tbs/tbs2910/Kconfig"
source "board/ti/am335x/Kconfig"
source "board/ti/am43xx/Kconfig"
+source "board/birdland/bav335x/Kconfig"
source "board/ti/ti814x/Kconfig"
source "board/ti/ti816x/Kconfig"
source "board/timll/devkit3250/Kconfig"
@@ -842,6 +860,7 @@ source "board/ttcontrol/vision2/Kconfig"
source "board/udoo/Kconfig"
source "board/vpac270/Kconfig"
source "board/wandboard/Kconfig"
+source "board/warp/Kconfig"
source "board/woodburn/Kconfig"
source "board/xaeniax/Kconfig"
source "board/xilinx/zynqmp/Kconfig"
diff --git a/arch/arm/cpu/arm1136/mx31/Makefile b/arch/arm/cpu/arm1136/mx31/Makefile
index 9670ed9..dcbd570 100644
--- a/arch/arm/cpu/arm1136/mx31/Makefile
+++ b/arch/arm/cpu/arm1136/mx31/Makefile
@@ -8,3 +8,7 @@
obj-y += generic.o
obj-y += timer.o
obj-y += devices.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += relocate.o
+endif
diff --git a/arch/arm/cpu/arm1136/mx31/relocate.S b/arch/arm/cpu/arm1136/mx31/relocate.S
new file mode 100644
index 0000000..1c556df
--- /dev/null
+++ b/arch/arm/cpu/arm1136/mx31/relocate.S
@@ -0,0 +1,23 @@
+/*
+ * relocate - i.MX31-specific vector relocation
+ *
+ * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * The i.MX31 SoC is very specific with respect to exceptions: it
+ * does not provide RAM at the high vectors address (0xFFFF0000),
+ * thus only the low address (0x00000000) is useable; but that is
+ * in ROM, so let's avoid relocating the vectors.
+ */
+ .section .text.relocate_vectors,"ax",%progbits
+
+ENTRY(relocate_vectors)
+
+ bx lr
+
+ENDPROC(relocate_vectors)
diff --git a/arch/arm/cpu/arm1136/mx35/Makefile b/arch/arm/cpu/arm1136/mx35/Makefile
index c533215..796db9c 100644
--- a/arch/arm/cpu/arm1136/mx35/Makefile
+++ b/arch/arm/cpu/arm1136/mx35/Makefile
@@ -10,3 +10,7 @@
obj-y += generic.o
obj-y += timer.o
obj-y += mx35_sdram.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += relocate.o
+endif
diff --git a/arch/arm/cpu/arm1136/mx35/relocate.S b/arch/arm/cpu/arm1136/mx35/relocate.S
new file mode 100644
index 0000000..43003f8
--- /dev/null
+++ b/arch/arm/cpu/arm1136/mx35/relocate.S
@@ -0,0 +1,23 @@
+/*
+ * relocate - i.MX35-specific vector relocation
+ *
+ * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * The i.MX35 SoC is very specific with respect to exceptions: it
+ * does not provide RAM at the high vectors address (0xFFFF0000),
+ * thus only the low address (0x00000000) is useable; but that is
+ * in ROM, so let's avoid relocating the vectors.
+ */
+ .section .text.relocate_vectors,"ax",%progbits
+
+ENTRY(relocate_vectors)
+
+ bx lr
+
+ENDPROC(relocate_vectors)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index 81477aa..67bef23 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -275,6 +275,14 @@ static void watchdog_disable(void)
;
}
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+ board_early_init_f();
+ sdram_init();
+}
+#endif
+
void s_init(void)
{
/*
@@ -290,6 +298,7 @@ void s_init(void)
setup_clocks_for_console();
uart_soft_reset();
#if defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT)
+ /* TODO: This does not work, gd is not available yet */
gd->baudrate = CONFIG_BAUDRATE;
serial_init();
gd->have_console = 1;
@@ -298,9 +307,5 @@ void s_init(void)
/* Enable RTC32K clock */
rtc32k_enable();
#endif
-#ifdef CONFIG_SPL_BUILD
- board_early_init_f();
- sdram_init();
-#endif
}
#endif
diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S
index f1aea05..427b0b1 100644
--- a/arch/arm/cpu/armv7/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/lowlevel_init.S
@@ -17,10 +17,17 @@
ENTRY(lowlevel_init)
/*
- * Setup a temporary stack
+ * Setup a temporary stack. Global data is not available yet.
*/
ldr sp, =CONFIG_SYS_INIT_SP_ADDR
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
+#ifdef CONFIG_DM
+ mov r9, #0
+#else
+ /*
+ * Set up global data for boards that still need it. This will be
+ * removed soon.
+ */
#ifdef CONFIG_SPL_BUILD
ldr r9, =gdata
#else
@@ -28,13 +35,24 @@ ENTRY(lowlevel_init)
bic sp, sp, #7
mov r9, sp
#endif
+#endif
/*
* Save the old lr(passed in ip) and the current lr to stack
*/
push {ip, lr}
/*
- * go setup pll, mux, memory
+ * Call the very early init function. This should do only the
+ * absolute bare minimum to get started. It should not:
+ *
+ * - set up DRAM
+ * - use global_data
+ * - clear BSS
+ * - try to start a console
+ *
+ * For boards with SPL this should be empty since SPL can do all of
+ * this init in the SPL board_init_f() function which is called
+ * immediately after this.
*/
bl s_init
pop {ip, pc}
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index e599a12..ef02972 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -230,6 +230,11 @@ static void imx_set_wdog_powerdown(bool enable)
struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
+#ifdef CONFIG_MX6SX
+ struct wdog_regs *wdog3 = (struct wdog_regs *)WDOG3_BASE_ADDR;
+ writew(enable, &wdog3->wmcr);
+#endif
+
/* Write to the PDE (Power Down Enable) bit */
writew(enable, &wdog1->wmcr);
writew(enable, &wdog2->wmcr);
@@ -255,6 +260,23 @@ static void clear_mmdc_ch_mask(void)
writel(0, &mxc_ccm->ccdr);
}
+static void init_bandgap(void)
+{
+ struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+ /*
+ * Ensure the bandgap has stabilized.
+ */
+ while (!(readl(&anatop->ana_misc0) & 0x80))
+ ;
+ /*
+ * For best noise performance of the analog blocks using the
+ * outputs of the bandgap, the reftop_selfbiasoff bit should
+ * be set.
+ */
+ writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+}
+
+
#ifdef CONFIG_MX6SL
static void set_preclk_from_osc(void)
{
@@ -275,6 +297,13 @@ int arch_cpu_init(void)
clear_mmdc_ch_mask();
/*
+ * Disable self-bias circuit in the analog bandap.
+ * The self-bias circuit is used by the bandgap during startup.
+ * This bit should be set after the bandgap has initialized.
+ */
+ init_bandgap();
+
+ /*
* When low freq boot is enabled, ROM will not set AHB
* freq, so we need to ensure AHB freq is 132MHz in such
* scenario.
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index cb35c19..6c8f3bc 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -128,14 +128,18 @@ void s_init(void)
do_io_settings();
#endif
prcm_init();
+}
+
#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
#ifdef CONFIG_BOARD_EARLY_INIT_F
board_early_init_f();
#endif
/* For regular u-boot sdram_init() is called from dram_init() */
sdram_init();
-#endif
}
+#endif
/*
* Routine: wait_for_command_complete
diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
index 4a0ac2c..65da6e2 100644
--- a/arch/arm/cpu/armv7/omap3/Kconfig
+++ b/arch/arm/cpu/armv7/omap3/Kconfig
@@ -91,6 +91,10 @@ config TARGET_TWISTER
bool "Twister"
select SUPPORT_SPL
+config TARGET_OMAP3_CAIRO
+ bool "QUIPOS CAIRO"
+ select SUPPORT_SPL
+
endchoice
config DM
@@ -133,5 +137,6 @@ source "board/matrix_vision/mvblx/Kconfig"
source "board/nokia/rx51/Kconfig"
source "board/technexion/tao3530/Kconfig"
source "board/technexion/twister/Kconfig"
+source "board/quipos/cairo/Kconfig"
endif
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 90d6ae7..dd53b20 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -240,8 +240,6 @@ void try_unlock_memory(void)
*****************************************************************************/
void s_init(void)
{
- int in_sdram = is_running_in_sdram();
-
watchdog_init();
try_unlock_memory();
@@ -264,10 +262,14 @@ void s_init(void)
#ifdef CONFIG_USB_EHCI_OMAP
ehci_clocks_enable();
#endif
+}
- if (!in_sdram)
- mem_init();
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+ mem_init();
}
+#endif
/*
* Routine: misc_init_r
@@ -345,7 +347,16 @@ static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const arg
goto usage;
}
} else if (strncmp(argv[1], "sw", 2) == 0) {
- omap_nand_switch_ecc(0, 0);
+ if (argc == 2) {
+ omap_nand_switch_ecc(0, 1);
+ } else {
+ if (strncmp(argv[2], "hamming", 7) == 0)
+ omap_nand_switch_ecc(0, 1);
+ else if (strncmp(argv[2], "bch8", 4) == 0)
+ omap_nand_switch_ecc(0, 8);
+ else
+ goto usage;
+ }
} else {
goto usage;
}
diff --git a/arch/arm/cpu/pxa/cpuinfo.c b/arch/arm/cpu/pxa/cpuinfo.c
index 17d8be5..25de9e5 100644
--- a/arch/arm/cpu/pxa/cpuinfo.c
+++ b/arch/arm/cpu/pxa/cpuinfo.c
@@ -46,6 +46,13 @@ int cpu_is_pxa27x(void)
return id == CPU_VALUE_PXA27X;
}
+int cpu_is_pxa27xm(void)
+{
+ uint32_t id = pxa_get_cpuid();
+ return ((id & CPU_MASK_PXA_PRODID) == CPU_VALUE_PXA27X) &&
+ ((id & CPU_MASK_PXA_REVID) == 8);
+}
+
uint32_t pxa_get_cpu_revision(void)
{
return pxa_get_cpuid() & CPU_MASK_PRODREV;
@@ -91,13 +98,17 @@ static const char *pxa27x_get_revision(void)
id = pxa_get_cpuid() & CPU_MASK_PXA_REVID;
- if ((id == 5) || (id == 6) || (id > 7))
+ if ((id == 5) || (id == 6) || (id > 8))
return unknown;
/* Cap the special PXA270 C5 case. */
if (id == 7)
id = 5;
+ /* Cap the special PXA270M A1 case. */
+ if (id == 8)
+ id = 1;
+
return rev[id];
}
@@ -107,7 +118,9 @@ static int print_cpuinfo_pxa2xx(void)
puts("Marvell PXA25x rev. ");
puts(pxa25x_get_revision());
} else if (cpu_is_pxa27x()) {
- puts("Marvell PXA27x rev. ");
+ puts("Marvell PXA27x");
+ if (cpu_is_pxa27xm()) puts("M");
+ puts(" rev. ");
puts(pxa27x_get_revision());
} else
return -EINVAL;
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 25a9d4c..606482f 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o
endif
obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
+obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o
quiet_cmd_cpp_cfg = CFGS $@
cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $<
diff --git a/arch/arm/imx-common/cmd_dek.c b/arch/arm/imx-common/cmd_dek.c
new file mode 100644
index 0000000..d93d5fb
--- /dev/null
+++ b/arch/arm/imx-common/cmd_dek.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright 2008-2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Command for encapsulating DEK blob
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <malloc.h>
+#include <asm/byteorder.h>
+#include <linux/compiler.h>
+#include <fsl_sec.h>
+#include <asm/arch/clock.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+* blob_dek() - Encapsulate the DEK as a blob using CAM's Key
+* @src: - Address of data to be encapsulated
+* @dst: - Desination address of encapsulated data
+* @len: - Size of data to be encapsulated
+*
+* Returns zero on success,and negative on error.
+*/
+static int blob_encap_dek(const u8 *src, u8 *dst, u32 len)
+{
+ int ret = 0;
+ u32 jr_size = 4;
+
+ u32 out_jr_size = sec_in32(CONFIG_SYS_FSL_JR0_ADDR + 0x102c);
+ if (out_jr_size != jr_size) {
+ hab_caam_clock_enable(1);
+ sec_init();
+ }
+
+ if (!((len == 128) | (len == 192) | (len == 256))) {
+ debug("Invalid DEK size. Valid sizes are 128, 192 and 256b\n");
+ return -1;
+ }
+
+ len /= 8;
+ ret = blob_dek(src, dst, len);
+
+ return ret;
+}
+
+/**
+ * do_dek_blob() - Handle the "dek_blob" command-line command
+ * @cmdtp: Command data struct pointer
+ * @flag: Command flag
+ * @argc: Command-line argument count
+ * @argv: Array of command-line arguments
+ *
+ * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
+ * on error.
+ */
+static int do_dek_blob(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ uint32_t src_addr, dst_addr, len;
+ uint8_t *src_ptr, *dst_ptr;
+ int ret = 0;
+
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ src_addr = simple_strtoul(argv[1], NULL, 16);
+ dst_addr = simple_strtoul(argv[2], NULL, 16);
+ len = simple_strtoul(argv[3], NULL, 10);
+
+ src_ptr = map_sysmem(src_addr, len/8);
+ dst_ptr = map_sysmem(dst_addr, BLOB_SIZE(len/8));
+
+ ret = blob_encap_dek(src_ptr, dst_ptr, len);
+
+ return ret;
+}
+
+/***************************************************/
+static char dek_blob_help_text[] =
+ "src dst len - Encapsulate and create blob of data\n"
+ " $len bits long at address $src and\n"
+ " store the result at address $dst.\n";
+
+U_BOOT_CMD(
+ dek_blob, 4, 1, do_dek_blob,
+ "Data Encryption Key blob encapsulation",
+ dek_blob_help_text
+);
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 28ccd29..067d08f 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -24,13 +24,16 @@
#include <fsl_esdhc.h>
#endif
-char *get_reset_cause(void)
+static u32 reset_cause = -1;
+
+static char *get_reset_cause(void)
{
u32 cause;
struct src *src_regs = (struct src *)SRC_BASE_ADDR;
cause = readl(&src_regs->srsr);
writel(cause, &src_regs->srsr);
+ reset_cause = cause;
switch (cause) {
case 0x00001:
@@ -53,6 +56,11 @@ char *get_reset_cause(void)
}
}
+u32 get_imx_reset_cause(void)
+{
+ return reset_cause;
+}
+
#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
#if defined(CONFIG_MX53)
#define MEMCTL_BASE ESDCTL_BASE_ADDR
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index 65ef60b..e522990 100644
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -176,3 +176,20 @@ ulong get_tbclk(void)
{
return gpt_get_clk();
}
+
+/*
+ * This function is intended for SHORT delays only.
+ * It will overflow at around 10 seconds @ 400MHz,
+ * or 20 seconds @ 200MHz.
+ */
+unsigned long usec2ticks(unsigned long usec)
+{
+ ulong ticks;
+
+ if (usec < 1000)
+ ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
+ else
+ ticks = ((usec / 10) * (get_tbclk() / 100000));
+
+ return ticks;
+}
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 254136e..4715f4e 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -17,3 +17,5 @@
#define CS0_64M_CS1_64M 1
#define CS0_64M_CS1_32M_CS2_32M 2
#define CS0_32M_CS1_32M_CS2_32M_CS3_32M 3
+
+u32 get_imx_reset_cause(void);
diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h
index ac7705b..b06c77f 100644
--- a/arch/arm/include/asm/arch-mx5/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx5/sys_proto.h
@@ -24,6 +24,5 @@ void set_chipselect_size(int const);
int fecmxc_initialize(bd_t *bis);
u32 get_ahb_clk(void);
u32 get_periph_clk(void);
-char *get_reset_cause(void);
#endif
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 39f3c07..0592ce0 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -1063,4 +1063,6 @@ struct mxc_ccm_reg {
#define BF_ANADIG_PFD_528_PFD0_FRAC(v) \
(((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC)
+#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008
+
#endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index ae88b6e..9a4ad8b 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -215,6 +215,10 @@
#define AIPS2_OFF_BASE_ADDR (ATZ2_BASE_ADDR + 0x80000)
#define CAAM_BASE_ADDR (ATZ2_BASE_ADDR)
#define ARM_BASE_ADDR (ATZ2_BASE_ADDR + 0x40000)
+
+#define CONFIG_SYS_FSL_SEC_ADDR CAAM_BASE_ADDR
+#define CONFIG_SYS_FSL_JR0_ADDR (CAAM_BASE_ADDR + 0x1000)
+
#define USB_PL301_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x0000)
#define USB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
index 9ded3d8..6ba1034 100644
--- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
@@ -31,7 +31,12 @@ enum {
MX6_PAD_SD2_DAT1__USDHC2_DAT1 = IOMUX_PAD(0x0568, 0x0260, 0, 0x0000, 0, 0),
MX6_PAD_SD2_DAT2__USDHC2_DAT2 = IOMUX_PAD(0x056C, 0x0264, 0, 0x0000, 0, 0),
MX6_PAD_SD2_DAT3__USDHC2_DAT3 = IOMUX_PAD(0x0570, 0x0268, 0, 0x0000, 0, 0),
+ MX6_PAD_SD2_DAT4__USDHC2_DAT4 = IOMUX_PAD(0X0574, 0X026C, 0, 0X0000, 0, 0),
+ MX6_PAD_SD2_DAT5__USDHC2_DAT5 = IOMUX_PAD(0X0578, 0X0270, 0, 0X0000, 0, 0),
+ MX6_PAD_SD2_DAT6__USDHC2_DAT6 = IOMUX_PAD(0X057C, 0X0274, 0, 0X0000, 0, 0),
+ MX6_PAD_SD2_DAT7__USDHC2_DAT7 = IOMUX_PAD(0X0580, 0X0278, 0, 0X0000, 0, 0),
MX6_PAD_SD2_DAT7__GPIO_5_0 = IOMUX_PAD(0x0580, 0x0278, 5, 0x0000, 0, 0),
+ MX6_PAD_SD2_RST__USDHC2_RST = IOMUX_PAD(0x0584, 0x027C, 0, 0x0000, 0, 0),
MX6_PAD_SD3_CLK__USDHC3_CLK = IOMUX_PAD(0x0588, 0x0280, 0, 0x0000, 0, 0),
MX6_PAD_SD3_CMD__USDHC3_CMD = IOMUX_PAD(0x058C, 0x0284, 0, 0x0000, 0, 0),
MX6_PAD_SD3_DAT0__USDHC3_DAT0 = IOMUX_PAD(0x0590, 0x0288, 0, 0x0000, 0, 0),
@@ -58,5 +63,10 @@ enum {
MX6_PAD_KEY_COL4__USB_USBOTG1_PWR = IOMUX_PAD(0x0484, 0x017C, 6, 0x0000, 0, 0),
MX6_PAD_KEY_COL5__USB_USBOTG2_PWR = IOMUX_PAD(0x0488, 0x0180, 6, 0x0000, 0, 0),
+
+ MX6_PAD_I2C1_SDA__I2C1_SDA = IOMUX_PAD(0x0450, 0x0160, 0x10, 0x0720, 2, 0),
+ MX6_PAD_I2C1_SDA__GPIO_3_13 = IOMUX_PAD(0x0450, 0x0160, 5, 0x0000, 0, 0),
+ MX6_PAD_I2C1_SCL__I2C1_SCL = IOMUX_PAD(0x044C, 0x015C, 0x10, 0x071C, 2, 0),
+ MX6_PAD_I2C1_SCL__GPIO_3_12 = IOMUX_PAD(0x044C, 0x015C, 5, 0x0000, 0, 0),
};
#endif /* __ASM_ARCH_MX6_MX6SL_PINS_H__ */
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 17b6f54..6db405d 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -37,6 +37,8 @@ void spl_board_load_image(void);
/* Linker symbols. */
extern char __bss_start[], __bss_end[];
+#ifndef CONFIG_DM
extern gd_t gdata;
+#endif
#endif
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 22df3e5..7939ced 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -113,7 +113,14 @@ here:
/* Set up final (full) environment */
bl c_runtime_cpu_setup /* we still call old routine here */
-
+#endif
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FRAMEWORK)
+# ifdef CONFIG_SPL_BUILD
+ /* Use a DRAM stack for the rest of SPL, if requested */
+ bl spl_relocate_stack_gd
+ cmp r0, #0
+ movne sp, r0
+# endif
ldr r0, =__bss_start /* this is auto-relocated! */
ldr r1, =__bss_end /* this is auto-relocated! */
@@ -124,9 +131,10 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */
addlo r0, r0, #4 /* move to next */
blo clbss_l
+#if ! defined(CONFIG_SPL_BUILD)
bl coloured_LED_init
bl red_led_on
-
+#endif
/* call board_init_r(gd_t *id, ulong dest_addr) */
mov r0, r9 /* gd_t */
ldr r1, [r9, #GD_RELOCADDR] /* dest_addr */
@@ -134,7 +142,6 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */
ldr pc, =board_init_r /* this is auto-relocated! */
/* we should not return here. */
-
#endif
ENDPROC(_main)
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index c41850a..bd8c7d2 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -13,6 +13,7 @@
#include <image.h>
#include <linux/compiler.h>
+#ifndef CONFIG_DM
/* Pointer to as well as the global data structure for SPL */
DECLARE_GLOBAL_DATA_PTR;
@@ -21,6 +22,7 @@ DECLARE_GLOBAL_DATA_PTR;
* pafches that rely on it. The global_data area is set up in crt0.S.
*/
gd_t gdata __attribute__ ((section(".data")));
+#endif
/*
* In the context of SPL, board_init_f must ensure that any clocks/etc for
@@ -33,8 +35,10 @@ void __weak board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
+#ifndef CONFIG_DM
/* TODO: Remove settings of the global data pointer here */
gd = &gdata;
+#endif
board_init_r(NULL, 0);
}
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 8615248..fccfd79 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -29,6 +29,9 @@ config USE_PRIVATE_LIBGCC
config DM
default y
+config SPL_DM
+ default y
+
config DM_SERIAL
default y