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-rw-r--r--arch/arm/cpu/arm1136/start.S4
-rw-r--r--arch/arm/cpu/arm720t/start.S4
-rw-r--r--arch/arm/cpu/arm920t/start.S4
-rw-r--r--arch/arm/cpu/arm925t/start.S4
-rw-r--r--arch/arm/cpu/arm926ejs/omap/reset.S4
-rw-r--r--arch/arm/cpu/arm926ejs/start.S4
-rw-r--r--arch/arm/cpu/arm926ejs/versatile/reset.S4
-rw-r--r--arch/arm/cpu/arm946es/start.S4
-rw-r--r--arch/arm/cpu/arm_intcm/start.S4
-rw-r--r--arch/arm/cpu/ixp/npe/include/IxAtmdAccCtrl.h14
-rw-r--r--arch/arm/cpu/ixp/npe/include/IxOsal.h6
-rw-r--r--arch/arm/cpu/lh7a40x/start.S4
-rw-r--r--arch/arm/cpu/sa1100/start.S2
-rw-r--r--arch/arm/include/asm/arch-s3c24x0/s3c2400.h2
-rw-r--r--arch/arm/include/asm/arch-s3c24x0/s3c2410.h2
-rw-r--r--arch/arm/include/asm/arch-s3c24x0/s3c24x0.h2
16 files changed, 34 insertions, 34 deletions
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index f5a1134..c0db96c 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -3,8 +3,8 @@
*
* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index ecb92ef..e9a094f 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -1,8 +1,8 @@
/*
* armboot - Startup Code for ARM720 CPU-core
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 0090f89..c308420 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -1,8 +1,8 @@
/*
* armboot - Startup Code for ARM920 CPU-core
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 23ccf31..17cf5dc 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1510 from ARM920 code ------
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
diff --git a/arch/arm/cpu/arm926ejs/omap/reset.S b/arch/arm/cpu/arm926ejs/omap/reset.S
index 4b20756..8321072 100644
--- a/arch/arm/cpu/arm926ejs/omap/reset.S
+++ b/arch/arm/cpu/arm926ejs/omap/reset.S
@@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 636be75..16e35c2 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
diff --git a/arch/arm/cpu/arm926ejs/versatile/reset.S b/arch/arm/cpu/arm926ejs/versatile/reset.S
index 4b20756..8321072 100644
--- a/arch/arm/cpu/arm926ejs/versatile/reset.S
+++ b/arch/arm/cpu/arm926ejs/versatile/reset.S
@@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 09374d5..89ba558 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index 1a93277..ba96208 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
diff --git a/arch/arm/cpu/ixp/npe/include/IxAtmdAccCtrl.h b/arch/arm/cpu/ixp/npe/include/IxAtmdAccCtrl.h
index e223049..50ef582 100644
--- a/arch/arm/cpu/ixp/npe/include/IxAtmdAccCtrl.h
+++ b/arch/arm/cpu/ixp/npe/include/IxAtmdAccCtrl.h
@@ -975,7 +975,7 @@ typedef struct
* @li 1 - Generate HEC.
* @li 0 - Disable HEC generation.
*/
- unsigned int txCOSET:1; /**< [24] If enabled the HEC is Exclusive-ORÆed with the value 0x55 before
+ unsigned int txCOSET:1; /**< [24] If enabled the HEC is Exclusive-OR'ed with the value 0x55 before
* being presented on the Utopia bus.
* @li 1 - Enable HEC ExOR with value 0x55
* @li 0 - Use generated HEC value.
@@ -1302,7 +1302,7 @@ typedef struct
@li 1 - HEC checking enabled
@li 0 - HEC checking disabled */
- unsigned int rxCOSET:1; /**< [25] If enabled the HEC is Exclusive-ORÆed with the value 0x55
+ unsigned int rxCOSET:1; /**< [25] If enabled the HEC is Exclusive-OR'ed with the value 0x55
before being tested with the received HEC.
@li 1 - Enable HEC ExOR with value 0x55.
@li 0 - Use generated HEC value.*/
@@ -1320,9 +1320,9 @@ typedef struct
unsigned int rxHashEnbGFC:1; /**< [15] Specifies if the VPI field [11:8]/GFC field should be
included in the Hash data input or if the bits should be padded
- with 1Æb0.
+ with 1'b0.
@li 1 - VPI [11:8]/GFC field valid and used in Hash residue calculation.
- @li 0 - VPI [11:8]/GFC field padded with 1Æb0 */
+ @li 0 - VPI [11:8]/GFC field padded with 1'b0 */
unsigned int rxPreHash:1; /**< [14] Enable Pre-hash value generation. Specifies if the
incoming cell data should be pre-hashed to allow VPI/VCI header look-up
@@ -1489,10 +1489,10 @@ typedef struct
unsigned int invalidSizeOvrInt:1; /**< [9] Enable CBI Receive Status Condition if the InvalidSizeCount
register overflows.
@li 1 - CBI Receive Status Condition asserted.
- @li¸0 - No CBI Receive Status asserted */
+ @li 0 - No CBI Receive Status asserted */
unsigned int rxIdleOvrInt:1; /**< [8] Enable CBI Receive Status Condition if the RxIdleCount overflows.
- @li 1 - CBI Receive Condition asserted.
+ @li 1 - CBI Receive Condition asserted.
@li 0 - No CBI Receive Condition asserted */
unsigned int reserved_2:3; /**< [7:5] These bits are always 0 */
@@ -1679,7 +1679,7 @@ typedef struct
unsigned int txReset:1; /**< [25] Resets the Utopia Coprocessor transmit module to a known state.
* @li Note: All transmit configuration and status registers will be reset
* to their reset values.
- * @li 0 - Normal operating mode¸
+ * @li 0 - Normal operating mode
* @li 1 - Reset transmit modules
*/
diff --git a/arch/arm/cpu/ixp/npe/include/IxOsal.h b/arch/arm/cpu/ixp/npe/include/IxOsal.h
index b2a93a5..4ca2e45 100644
--- a/arch/arm/cpu/ixp/npe/include/IxOsal.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsal.h
@@ -250,7 +250,7 @@ PUBLIC void ixOsalIrqUnlock (UINT32 irqEnable);
*
* @brief Selectively disables interrupts
*
- * @param irqLevel ­ new interrupt level
+ * @param irqLevel - new interrupt level
*
* Disables the interrupts below the specified interrupt level
*
@@ -269,7 +269,7 @@ PUBLIC UINT32 ixOsalIrqLevelSet (UINT32 irqLevel);
*
* @brief Enables an interrupt level
*
- * @param irqLevel ­ interrupt level to enable
+ * @param irqLevel - interrupt level to enable
*
* Enables the specified interrupt level
*
@@ -285,7 +285,7 @@ PUBLIC void ixOsalIrqEnable (UINT32 irqLevel);
*
* @brief Disables an interrupt level
*
- * @param irqLevel ­ interrupt level to disable
+ * @param irqLevel - interrupt level to disable
*
* Disables the specified interrupt level
*
diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S
index 14e9854..62de8b8 100644
--- a/arch/arm/cpu/lh7a40x/start.S
+++ b/arch/arm/cpu/lh7a40x/start.S
@@ -1,8 +1,8 @@
/*
* armboot - Startup Code for ARM920 CPU-core
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 7223c47..92546d8 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -4,7 +4,7 @@
* Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
* Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
* Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
- * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2400.h b/arch/arm/include/asm/arch-s3c24x0/s3c2400.h
index 2678be1..5b905f5 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c2400.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c2400.h
@@ -1,6 +1,6 @@
/*
* (C) Copyright 2003
- * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch
+ * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch
*
* See file CREDITS for list of people who contributed to this
* project.
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
index 0543fe1..4fbdf20 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
@@ -1,6 +1,6 @@
/*
* (C) Copyright 2003
- * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch
+ * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch
*
* See file CREDITS for list of people who contributed to this
* project.
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
index f634d11..ca978c9 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
@@ -1,6 +1,6 @@
/*
* (C) Copyright 2003
- * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch
+ * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch
*
* See file CREDITS for list of people who contributed to this
* project.
generated by cgit v1.1 at 2024-11-22 20:18:42 +0000