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-rw-r--r--arch/arm/cpu/arm1136/mx31/generic.c31
-rw-r--r--arch/arm/include/asm/arch-mx31/imx-regs.h2
2 files changed, 19 insertions, 14 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 18572b9..fccd2cd 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -107,18 +107,18 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
struct mx3_cpu_type mx31_cpu_type[] = {
- { .srev = 0x00, .v = "1.0" },
- { .srev = 0x10, .v = "1.1" },
- { .srev = 0x11, .v = "1.1" },
- { .srev = 0x12, .v = "1.15" },
- { .srev = 0x13, .v = "1.15" },
- { .srev = 0x14, .v = "1.2" },
- { .srev = 0x15, .v = "1.2" },
- { .srev = 0x28, .v = "2.0" },
- { .srev = 0x29, .v = "2.0" },
+ { .srev = 0x00, .v = 0x10 },
+ { .srev = 0x10, .v = 0x11 },
+ { .srev = 0x11, .v = 0x11 },
+ { .srev = 0x12, .v = 0x1F },
+ { .srev = 0x13, .v = 0x1F },
+ { .srev = 0x14, .v = 0x12 },
+ { .srev = 0x15, .v = 0x12 },
+ { .srev = 0x28, .v = 0x20 },
+ { .srev = 0x29, .v = 0x20 },
};
-char *get_cpu_rev(void)
+u32 get_cpu_rev(void)
{
u32 i, srev;
@@ -129,7 +129,8 @@ char *get_cpu_rev(void)
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
if (srev == mx31_cpu_type[i].srev)
return mx31_cpu_type[i].v;
- return "unknown";
+
+ return srev | 0x8000;
}
char *get_reset_cause(void)
@@ -161,8 +162,12 @@ char *get_reset_cause(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
- printf("CPU: Freescale i.MX31 rev %s at %d MHz.",
- get_cpu_rev(), mx31_get_mcu_main_clk() / 1000000);
+ u32 srev = get_cpu_rev();
+
+ printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.",
+ (srev & 0xF0) >> 4, (srev & 0x0F),
+ ((srev & 0x8000) ? " unknown" : ""),
+ mx31_get_mcu_main_clk() / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index c830a03..306f966 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -105,7 +105,7 @@ struct iim_regs {
struct mx3_cpu_type {
u8 srev;
- char *v;
+ u32 v;
};
#define IOMUX_PADNUM_MASK 0x1ff