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-rw-r--r--arch/arm/config.mk7
-rw-r--r--arch/arm/cpu/ixp/config.mk5
-rw-r--r--arch/arm/cpu/ixp/cpu.c5
-rw-r--r--arch/arm/cpu/ixp/npe/Makefile1
-rw-r--r--arch/arm/cpu/ixp/npe/npe.c74
-rw-r--r--arch/arm/cpu/ixp/start.S59
-rw-r--r--arch/arm/cpu/ixp/timer.c124
-rw-r--r--arch/arm/cpu/ixp/u-boot.lds8
-rw-r--r--arch/arm/include/asm/arch-ixp/ixp425.h5
-rw-r--r--arch/arm/include/asm/arch-ixp/ixp425pci.h130
-rw-r--r--arch/arm/include/asm/global_data.h3
-rw-r--r--arch/arm/lib/board.c7
12 files changed, 140 insertions, 288 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index ec1b420..788d4c1 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -62,6 +62,13 @@ PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o
endif
endif
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+else
+LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
+endif
+
# needed for relocation
ifndef CONFIG_NAND_SPL
LDFLAGS_u-boot += -pie
diff --git a/arch/arm/cpu/ixp/config.mk b/arch/arm/cpu/ixp/config.mk
index deca3f4..5868cba 100644
--- a/arch/arm/cpu/ixp/config.mk
+++ b/arch/arm/cpu/ixp/config.mk
@@ -27,6 +27,11 @@ BIG_ENDIAN = y
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float -mbig-endian
PLATFORM_CPPFLAGS += -mbig-endian -march=armv5te -mtune=strongarm1100
+
+# -fdata-sections triggers "section .bss overlaps section .rel.dyn" linker error
+PLATFORM_RELFLAGS += -ffunction-sections
+LDFLAGS_u-boot += --gc-sections
+
# =========================================================================
#
# Supply options according to compiler version
diff --git a/arch/arm/cpu/ixp/cpu.c b/arch/arm/cpu/ixp/cpu.c
index ce275e5..942845d 100644
--- a/arch/arm/cpu/ixp/cpu.c
+++ b/arch/arm/cpu/ixp/cpu.c
@@ -36,8 +36,6 @@
#include <asm/arch/ixp425.h>
#include <asm/system.h>
-ulong loops_per_jiffy;
-
static void cache_flush(void);
#if defined(CONFIG_DISPLAY_CPUINFO)
@@ -51,17 +49,14 @@ int print_cpuinfo (void)
puts("CPU: Intel IXP425 at ");
switch ((id & 0x000003f0) >> 4) {
case 0x1c:
- loops_per_jiffy = 887467;
speed = 533;
break;
case 0x1d:
- loops_per_jiffy = 666016;
speed = 400;
break;
case 0x1f:
- loops_per_jiffy = 442901;
speed = 266;
break;
}
diff --git a/arch/arm/cpu/ixp/npe/Makefile b/arch/arm/cpu/ixp/npe/Makefile
index c756a1d..14ab3c7 100644
--- a/arch/arm/cpu/ixp/npe/Makefile
+++ b/arch/arm/cpu/ixp/npe/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libnpe.o
LOCAL_CFLAGS += -I$(TOPDIR)/arch/arm/cpu/ixp/npe/include -DCONFIG_IXP425_COMPONENT_ETHDB -D__linux
CFLAGS += $(LOCAL_CFLAGS)
+CPPFLAGS += $(LOCAL_CFLAGS) # needed for depend
HOSTCFLAGS += $(LOCAL_CFLAGS)
COBJS-$(CONFIG_IXP4XX_NPE) := npe.o \
diff --git a/arch/arm/cpu/ixp/npe/npe.c b/arch/arm/cpu/ixp/npe/npe.c
index 857bcad..f0e02bf 100644
--- a/arch/arm/cpu/ixp/npe/npe.c
+++ b/arch/arm/cpu/ixp/npe/npe.c
@@ -359,36 +359,53 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
debug("%s: 1\n", __FUNCTION__);
- miiphy_read (dev->name, p_npe->phy_no, MII_BMSR, &reg_short);
-
- /*
- * Wait if PHY is capable of autonegotiation and autonegotiation is not complete
- */
- if ((reg_short & BMSR_ANEGCAPABLE) && !(reg_short & BMSR_ANEGCOMPLETE)) {
- puts ("Waiting for PHY auto negotiation to complete");
- i = 0;
- while (!(reg_short & BMSR_ANEGCOMPLETE)) {
- /*
- * Timeout reached ?
- */
- if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
- puts (" TIMEOUT !\n");
- break;
- }
+#ifdef CONFIG_MII_NPE0_FIXEDLINK
+ if (0 == p_npe->eth_id) {
+ speed = CONFIG_MII_NPE0_SPEED;
+ duplex = CONFIG_MII_NPE0_FULLDUPLEX ? FULL : HALF;
+ } else
+#endif
+#ifdef CONFIG_MII_NPE1_FIXEDLINK
+ if (1 == p_npe->eth_id) {
+ speed = CONFIG_MII_NPE1_SPEED;
+ duplex = CONFIG_MII_NPE1_FULLDUPLEX ? FULL : HALF;
+ } else
+#endif
+ {
+ miiphy_read(dev->name, p_npe->phy_no, MII_BMSR, &reg_short);
+
+ /*
+ * Wait if PHY is capable of autonegotiation and
+ * autonegotiation is not complete
+ */
+ if ((reg_short & BMSR_ANEGCAPABLE) &&
+ !(reg_short & BMSR_ANEGCOMPLETE)) {
+ puts("Waiting for PHY auto negotiation to complete");
+ i = 0;
+ while (!(reg_short & BMSR_ANEGCOMPLETE)) {
+ /*
+ * Timeout reached ?
+ */
+ if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
+ puts(" TIMEOUT !\n");
+ break;
+ }
- if ((i++ % 1000) == 0) {
- putc ('.');
- miiphy_read (dev->name, p_npe->phy_no, MII_BMSR, &reg_short);
+ if ((i++ % 1000) == 0) {
+ putc('.');
+ miiphy_read(dev->name, p_npe->phy_no,
+ MII_BMSR, &reg_short);
+ }
+ udelay(1000); /* 1 ms */
}
- udelay (1000); /* 1 ms */
+ puts(" done\n");
+ /* another 500 ms (results in faster booting) */
+ udelay(500000);
}
- puts (" done\n");
- udelay (500000); /* another 500 ms (results in faster booting) */
+ speed = miiphy_speed(dev->name, p_npe->phy_no);
+ duplex = miiphy_duplex(dev->name, p_npe->phy_no);
}
- speed = miiphy_speed (dev->name, p_npe->phy_no);
- duplex = miiphy_duplex (dev->name, p_npe->phy_no);
-
if (p_npe->print_speed) {
p_npe->print_speed = 0;
printf ("ENET Speed is %d Mbps - %s duplex connection\n",
@@ -621,9 +638,12 @@ int npe_initialize(bd_t * bis)
if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X) {
switch (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) {
case IX_FEATURE_CTRL_SILICON_TYPE_B0:
+ default: /* newer than B0 */
/*
- * If it is B0 Silicon, we only enable port when its corresponding
- * Eth Coprocessor is available.
+ * If it is B0 or newer Silicon, we
+ * only enable port when its
+ * corresponding Eth Coprocessor is
+ * available.
*/
if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==
IX_FEATURE_CTRL_COMPONENT_ENABLED)
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index 561c1f4..faa9a8f 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -65,7 +65,8 @@
.endm
.globl _start
-_start: b reset
+_start:
+ ldr pc, _reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
@@ -74,6 +75,7 @@ _start: b reset
ldr pc, _irq
ldr pc, _fiq
+_reset: .word reset
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
@@ -167,12 +169,6 @@ reset:
str r1, [r2]
/* make sure flash is visible at 0 */
-#if 0
- ldr r2, =IXP425_EXP_CFG0
- ldr r1, [r2]
- orr r1, r1, #0x80000000
- str r1, [r2]
-#endif
mov r1, #CONFIG_SYS_SDR_CONFIG
ldr r2, =IXP425_SDR_CONFIG
str r1, [r2]
@@ -216,19 +212,6 @@ reset:
str r1, [r4]
DELAY_FOR 0x4000, r0
- /* copy */
- mov r0, #0
- mov r4, r0
- add r2, r0, #CONFIG_SYS_MONITOR_LEN
- mov r1, #0x10000000
- mov r5, r1
-
- 30:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r0, r2
- bne 30b
-
/* invalidate I & D caches & BTB */
mcr p15, 0, r0, c7, c7, 0
CPWAIT r0
@@ -241,19 +224,12 @@ reset:
mcr p15, 0, r0, c7, c10, 4
CPWAIT r0
- /* move flash to 0x50000000 */
+ /* remove flash mirror at 0x00000000 */
ldr r2, =IXP425_EXP_CFG0
ldr r1, [r2]
bic r1, r1, #0x80000000
str r1, [r2]
- nop
- nop
- nop
- nop
- nop
- nop
-
/* invalidate I & Data TLB */
mcr p15, 0, r0, c8, c7, 0
CPWAIT r0
@@ -269,7 +245,7 @@ reset:
orr r0,r0,#0x13
msr cpsr,r0
-/* Set stackpointer in internal RAM to call board_init_f */
+/* Set initial stackpointer in SDRAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
@@ -580,28 +556,3 @@ reset_endless:
b reset_endless
-#ifdef CONFIG_USE_IRQ
-
-.LC0: .word loops_per_jiffy
-
-/*
- * 0 <= r0 <= 2000
- */
-.globl __udelay
-__udelay:
- mov r2, #0x6800
- orr r2, r2, #0x00db
- mul r0, r2, r0
- ldr r2, .LC0
- ldr r2, [r2] @ max = 0x0fffffff
- mov r0, r0, lsr #11 @ max = 0x00003fff
- mov r2, r2, lsr #11 @ max = 0x0003ffff
- mul r0, r2, r0 @ max = 2^32-1
- movs r0, r0, lsr #6
-
-delay_loop:
- subs r0, r0, #1
- bne delay_loop
- mov pc, lr
-
-#endif /* CONFIG_USE_IRQ */
diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c
index edf341f..9f3ea42 100644
--- a/arch/arm/cpu/ixp/timer.c
+++ b/arch/arm/cpu/ixp/timer.c
@@ -1,4 +1,7 @@
/*
+ * (C) Copyright 2010
+ * Michael Schwingen, michael@schwingen.org
+ *
* (C) Copyright 2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
@@ -31,105 +34,94 @@
#include <common.h>
#include <asm/arch/ixp425.h>
+#include <asm/io.h>
+#include <div64.h>
-#ifdef CONFIG_TIMER_IRQ
-
-#define FREQ 66666666
-#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ)
-#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */
+DECLARE_GLOBAL_DATA_PTR;
/*
- * When interrupts are enabled, use timer 2 for time/delay generation...
+ * The IXP42x time-stamp timer runs at 2*OSC_IN (66.666MHz when using a
+ * 33.333MHz crystal).
*/
-
-static volatile ulong timestamp;
-
-static void timer_isr(void *data)
+static inline unsigned long long tick_to_time(unsigned long long tick)
{
- unsigned int *pTime = (unsigned int *)data;
-
- (*pTime)++;
-
- /*
- * Reset IRQ source
- */
- *IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, CONFIG_IXP425_TIMER_CLK);
+ return tick;
}
-ulong get_timer (ulong base)
+static inline unsigned long long time_to_tick(unsigned long long time)
{
- return timestamp - base;
+ time *= CONFIG_IXP425_TIMER_CLK;
+ do_div(time, CONFIG_SYS_HZ);
+ return time;
}
-void reset_timer (void)
+static inline unsigned long long us_to_tick(unsigned long long us)
{
- timestamp = 0;
+ us = us * CONFIG_IXP425_TIMER_CLK + 999999;
+ do_div(us, 1000000);
+ return us;
}
-int timer_init (void)
+unsigned long long get_ticks(void)
{
- /* install interrupt handler for timer */
- irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)&timestamp);
-
- /* setup the Timer counter value */
- *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
+ ulong now = readl(IXP425_OSTS_B);
+
+ if (readl(IXP425_OSST) & IXP425_OSST_TIMER_TS_PEND) {
+ /* rollover of timestamp timer register */
+ gd->timestamp += (0xFFFFFFFF - gd->lastinc) + now + 1;
+ writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
+ } else {
+ /* move stamp forward with absolut diff ticks */
+ gd->timestamp += (now - gd->lastinc);
+ }
+ gd->lastinc = now;
+ return gd->timestamp;
+}
- /* enable timer irq */
- *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
- return 0;
-}
-#else
-ulong get_timer (ulong base)
+void reset_timer_masked(void)
{
- return get_timer_masked () - base;
+ /* capture current timestamp counter */
+ gd->lastinc = readl(IXP425_OSTS_B);
+ /* start "advancing" time stamp from 0 */
+ gd->timestamp = 0;
}
-void ixp425_udelay(unsigned long usec)
+void reset_timer(void)
{
- /*
- * This function has a max usec, but since it is called from udelay
- * we should not have to worry... be happy
- */
- unsigned long usecs = CONFIG_SYS_HZ/1000000L & ~IXP425_OST_RELOAD_MASK;
-
- *IXP425_OSST = IXP425_OSST_TIMER_1_PEND;
- usecs |= IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE;
- *IXP425_OSRT1 = usecs;
- while (!(*IXP425_OSST & IXP425_OSST_TIMER_1_PEND));
+ reset_timer_masked();
}
-void __udelay (unsigned long usec)
+ulong get_timer_masked(void)
{
- while (usec--) ixp425_udelay(1);
+ return tick_to_time(get_ticks());
}
-static ulong reload_constant = 0xfffffff0;
-
-void reset_timer_masked (void)
+ulong get_timer(ulong base)
{
- ulong reload = reload_constant | IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE;
+ return get_timer_masked() - base;
+}
- *IXP425_OSST = IXP425_OSST_TIMER_1_PEND;
- *IXP425_OSRT1 = reload;
+void set_timer(ulong t)
+{
+ gd->timestamp = time_to_tick(t);
}
-ulong get_timer_masked (void)
+/* delay x useconds AND preserve advance timestamp value */
+void __udelay(unsigned long usec)
{
- /*
- * Note that it is possible for this to wrap!
- * In this case we return max.
- */
- ulong current = *IXP425_OST1;
- if (*IXP425_OSST & IXP425_OSST_TIMER_1_PEND)
- {
- return reload_constant;
- }
- return (reload_constant - current);
+ unsigned long long tmp;
+
+ tmp = get_ticks() + us_to_tick(usec);
+
+ while (get_ticks() < tmp)
+ ;
}
int timer_init(void)
{
+ writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
return 0;
}
-#endif
diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds
index 3587f8a..7199de4 100644
--- a/arch/arm/cpu/ixp/u-boot.lds
+++ b/arch/arm/cpu/ixp/u-boot.lds
@@ -31,8 +31,8 @@ SECTIONS
. = ALIGN(4);
.text :
{
- arch/arm/cpu/ixp/start.o(.text)
- *(.text)
+ arch/arm/cpu/ixp/start.o(.text*)
+ *(.text*)
}
. = ALIGN(4);
@@ -40,7 +40,7 @@ SECTIONS
. = ALIGN(4);
.data : {
- *(.data)
+ *(.data*)
}
. = ALIGN(4);
@@ -67,7 +67,7 @@ SECTIONS
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
- *(.bss)
+ *(.bss*)
. = ALIGN(4);
__bss_end__ = .;
}
diff --git a/arch/arm/include/asm/arch-ixp/ixp425.h b/arch/arm/include/asm/arch-ixp/ixp425.h
index 2114437..5132607 100644
--- a/arch/arm/include/asm/arch-ixp/ixp425.h
+++ b/arch/arm/include/asm/arch-ixp/ixp425.h
@@ -391,9 +391,8 @@
#define IXP425_TIMER_REG(x) (IXP425_TIMER_BASE_PHYS+(x))
#endif
-#if 0 /* test-only: also defined in npe/include/... */
-#define IXP425_OSTS IXP425_TIMER_REG(IXP425_OSTS_OFFSET)
-#endif
+/* _B to avoid collision: also defined in npe/include/... */
+#define IXP425_OSTS_B IXP425_TIMER_REG(IXP425_OSTS_OFFSET)
#define IXP425_OST1 IXP425_TIMER_REG(IXP425_OST1_OFFSET)
#define IXP425_OSRT1 IXP425_TIMER_REG(IXP425_OSRT1_OFFSET)
#define IXP425_OST2 IXP425_TIMER_REG(IXP425_OST2_OFFSET)
diff --git a/arch/arm/include/asm/arch-ixp/ixp425pci.h b/arch/arm/include/asm/arch-ixp/ixp425pci.h
index 9ea3319..acafea7 100644
--- a/arch/arm/include/asm/arch-ixp/ixp425pci.h
+++ b/arch/arm/include/asm/arch-ixp/ixp425pci.h
@@ -22,88 +22,21 @@
* MA 02111-1307 USA
*/
-#ifndef _IXP425PCI_H_
-#define _IXP425PCI_H_
+#ifndef _IXP425PCI_H
+#define _IXP425PCI_H
-#define TRUE 1
-#define FALSE 0
#define OK 0
#define ERROR -1
-#define BOOL int
-#define IXP425_PCI_MAX_BAR_PER_FUNC 6
-#define IXP425_PCI_MAX_BAR (IXP425_PCI_MAX_BAR_PER_FUNC * \
- IXP425_PCI_MAX_FUNC_ON_BUS)
-
-enum PciBarId
-{
- CSR_BAR=0,
- IO_BAR,
- SD_BAR,
- NO_BAR
-};
-
-/*Base address register descriptor*/
-typedef struct
-{
- unsigned int size;
- unsigned int address;
-} PciBar;
-
-typedef struct
-{
- unsigned int bus;
- unsigned int device;
- unsigned int func;
- unsigned int irq;
- BOOL error;
- unsigned short vendor_id;
- unsigned short device_id;
- /*We need an extra entry in this array for dummy placeholder*/
- PciBar bar[IXP425_PCI_MAX_BAR_PER_FUNC + 1];
-} PciDevice;
+struct pci_controller;
+extern void pci_ixp_init(struct pci_controller *hose);
/* Mask definitions*/
-#define IXP425_PCI_TOP_WORD_OF_LONG_MASK 0xffff0000
-#define IXP425_PCI_TOP_BYTE_OF_LONG_MASK 0xff000000
-#define IXP425_PCI_BOTTOM_WORD_OF_LONG_MASK 0x0000ffff
-#define IXP425_PCI_BOTTOM_TRIBYTES_OF_LONG_MASK 0x00ffffff
#define IXP425_PCI_BOTTOM_NIBBLE_OF_LONG_MASK 0x0000000f
-#define IXP425_PCI_MAX_UINT32 0xffffffff
-
-
-#define IXP425_PCI_BAR_QUERY 0xffffffff
-
-#define IXP425_PCI_BAR_MEM_BASE 0x100000
-#define IXP425_PCI_BAR_IO_BASE 0x000000
-
-/*define the maximum number of bus segments - we support a single segment*/
-#define IXP425_PCI_MAX_BUS 1
-/*define the maximum number of cards per bus segment*/
-#define IXP425_PCI_MAX_DEV 4
-/*define the maximum number of functions per device*/
-#define IXP425_PCI_MAX_FUNC 8
-/* define the maximum number of separate functions that we can
- potentially have on the bus*/
-#define IXP425_PCI_MAX_FUNC_ON_BUS (1+ IXP425_PCI_MAX_FUNC * \
- IXP425_PCI_MAX_DEV * \
- IXP425_PCI_MAX_BUS)
-/*define the maximum number of BARs per function*/
-#define IXP425_PCI_MAX_BAR_PER_FUNC 6
-#define IXP425_PCI_MAX_BAR (IXP425_PCI_MAX_BAR_PER_FUNC * \
- IXP425_PCI_MAX_FUNC_ON_BUS)
#define PCI_NP_CBE_BESL (4)
#define PCI_NP_AD_FUNCSL (8)
-#define REG_WRITE(b,o,v) (*(volatile unsigned int*)((b+o))=(v))
-#define REG_READ(b,o,v) ((v)=(*(volatile unsigned int*)((b+o))))
-
-#define PCI_DELAY 500
-#define USEC_LOOP_COUNT 533
-#define PCI_SETTLE_USEC 200
-#define PCI_MIN_RESET_ASSERT_USEC 2000
-
/*Register addressing definitions for PCI controller configuration
and status registers*/
@@ -150,28 +83,6 @@ typedef struct
#define NP_CMD_CONFIGWRITE (0xb)
*/
-/*define the default setting of the AHB memory base reg*/
-#define IXP425_PCI_AHBMEMBASE_DEFAULT 0x00010203
-#define IXP425_PCI_AHBIOBASE_DEFAULT 0x0
-#define IXP425_PCI_PCIMEMBASE_DEFAULT 0x0
-
-/*define the default settings for the controller's BARs*/
-#ifdef IXP425_PCI_SIMPLE_MAPPING
-#define IXP425_PCI_BAR_0_DEFAULT 0x00000000
-#define IXP425_PCI_BAR_1_DEFAULT 0x01000000
-#define IXP425_PCI_BAR_2_DEFAULT 0x02000000
-#define IXP425_PCI_BAR_3_DEFAULT 0x03000000
-#define IXP425_PCI_BAR_4_DEFAULT 0x00000000
-#define IXP425_PCI_BAR_5_DEFAULT 0x00000000
-#else
-#define IXP425_PCI_BAR_0_DEFAULT 0x40000000
-#define IXP425_PCI_BAR_1_DEFAULT 0x41000000
-#define IXP425_PCI_BAR_2_DEFAULT 0x42000000
-#define IXP425_PCI_BAR_3_DEFAULT 0x43000000
-#define IXP425_PCI_BAR_4_DEFAULT 0x00000000
-#define IXP425_PCI_BAR_5_DEFAULT 0x00000000
-#endif
-
/*Configuration Port register bit definitions*/
#define PCI_CRP_WRITE BIT(16)
@@ -228,17 +139,6 @@ typedef struct
#define PCI_CFG_SPECIAL_USE 0x41
#define PCI_CFG_MODE 0x43
-/*Specify the initial command we send to PCI devices*/
-#define INITIAL_PCI_CMD (PCI_CMD_IO_ENABLE \
- | PCI_CMD_MEM_ENABLE \
- | PCI_CMD_MASTER_ENABLE \
- | PCI_CMD_WI_ENABLE)
-
-/*define the sub vendor and subsystem to be used */
-#define IXP425_PCI_SUB_VENDOR_SYSTEM 0x00000000
-
-#define PCI_IRQ_LINES 4
-
#define PCI_CMD_IO_ENABLE 0x0001 /* IO access enable */
#define PCI_CMD_MEM_ENABLE 0x0002 /* memory access enable */
#define PCI_CMD_MASTER_ENABLE 0x0004 /* bus master enable */
@@ -287,26 +187,4 @@ typedef struct
#define PCI_DMACTRL_PADC1 BIT(14)
#define PCI_DMACTRL_PADE1 BIT(15)
-/* GPIO related register */
-#undef IXP425_GPIO_GPOUTR
-#undef IXP425_GPIO_GPOER
-#undef IXP425_GPIO_GPINR
-#undef IXP425_GPIO_GPISR
-#undef IXP425_GPIO_GPIT1R
-#undef IXP425_GPIO_GPIT2R
-#undef IXP425_GPIO_GPCLKR
-
-#define IXP425_GPIO_GPOUTR 0xC8004000
-#define IXP425_GPIO_GPOER 0xC8004004
-#define IXP425_GPIO_GPINR 0xC8004008
-#define IXP425_GPIO_GPISR 0xC800400C
-#define IXP425_GPIO_GPIT1R 0xC8004010
-#define IXP425_GPIO_GPIT2R 0xC8004014
-#define IXP425_GPIO_GPCLKR 0xC8004018
-
-#define READ_GPIO_REG(addr,val) \
- (val) = *((volatile int *)(addr));
-#define WRITE_GPIO_REG(addr,val) \
- *((volatile int *)(addr)) = (val);
-
#endif
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index d4c9afc..ef9959e 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -61,6 +61,9 @@ typedef struct global_data {
unsigned long long timer_reset_value;
unsigned long lastinc;
#endif
+#ifdef CONFIG_IXP425
+ unsigned long timestamp;
+#endif
unsigned long relocaddr; /* Start address of U-Boot in RAM */
phys_size_t ram_size; /* RAM size */
unsigned long mon_len; /* monitor len */
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index e7af3d2..169dfeb 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -262,9 +262,6 @@ init_fnc_t *init_sequence[] = {
init_func_i2c,
#endif
dram_init, /* configure available RAM banks */
-#if defined(CONFIG_CMD_PCI) || defined (CONFIG_PCI)
- arm_pci_init,
-#endif
NULL,
};
@@ -522,6 +519,10 @@ void board_init_r (gd_t *id, ulong dest_addr)
/* initialize environment */
env_relocate ();
+#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
+ arm_pci_init();
+#endif
+
/* IP Address */
gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
generated by cgit v1.1 at 2024-11-22 02:08:39 +0000