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-rw-r--r--arch/arm/dts/uniphier-ph1-ld4-ref.dts7
-rw-r--r--arch/arm/dts/uniphier-ph1-ld4.dtsi27
-rw-r--r--arch/arm/dts/uniphier-ph1-pro4-ref.dts7
-rw-r--r--arch/arm/dts/uniphier-ph1-pro4.dtsi33
-rw-r--r--arch/arm/dts/uniphier-ph1-sld3-ref.dts7
-rw-r--r--arch/arm/dts/uniphier-ph1-sld3.dtsi27
-rw-r--r--arch/arm/dts/uniphier-ph1-sld8-ref.dts7
-rw-r--r--arch/arm/dts/uniphier-ph1-sld8.dtsi27
-rw-r--r--arch/arm/dts/uniphier-ref-daughter.dtsi3
9 files changed, 77 insertions, 68 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
index d479be1..d972c02 100644
--- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-LD4 Reference Board
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -12,8 +13,8 @@
/include/ "uniphier-ref-daughter.dtsi"
/ {
- model = "Panasonic UniPhier PH1-LD4 Reference Board";
- compatible = "panasonic,ph1-ld4-ref", "panasonic,ph1-ld4";
+ model = "UniPhier PH1-LD4 Reference Board";
+ compatible = "socionext,ph1-ld4-ref", "socionext,ph1-ld4";
memory {
device_type = "memory";
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 8ed7bbf..c200838 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-LD4 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,7 +11,7 @@
/include/ "skeleton.dtsi"
/ {
- compatible = "panasonic,ph1-ld4";
+ compatible = "socionext,ph1-ld4";
cpus {
#address-cells = <1>;
@@ -30,35 +31,35 @@
ranges;
uart0: serial@54006800 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006800 0x20>;
clock-frequency = <36864000>;
};
uart1: serial@54006900 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006900 0x20>;
clock-frequency = <36864000>;
};
uart2: serial@54006a00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006a00 0x20>;
clock-frequency = <36864000>;
};
uart3: serial@54006b00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006b00 0x20>;
clock-frequency = <36864000>;
};
i2c0: i2c@58400000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58400000 0x40>;
@@ -67,7 +68,7 @@
};
i2c1: i2c@58480000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58480000 0x40>;
@@ -76,7 +77,7 @@
};
i2c2: i2c@58500000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58500000 0x40>;
@@ -85,7 +86,7 @@
};
i2c3: i2c@58580000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58580000 0x40>;
@@ -94,19 +95,19 @@
};
usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};
diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
index 5bec92b..f6d03e3 100644
--- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-Pro4 Reference Board
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -12,8 +13,8 @@
/include/ "uniphier-ref-daughter.dtsi"
/ {
- model = "Panasonic UniPhier PH1-Pro4 Reference Board";
- compatible = "panasonic,ph1-pro4-ref", "panasonic,ph1-pro4";
+ model = "UniPhier PH1-Pro4 Reference Board";
+ compatible = "socionext,ph1-pro4-ref", "socionext,ph1-pro4";
memory {
device_type = "memory";
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index 1247779..8195266 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-Pro4 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,7 +11,7 @@
/include/ "skeleton.dtsi"
/ {
- compatible = "panasonic,ph1-pro4";
+ compatible = "socionext,ph1-pro4";
cpus {
#address-cells = <1>;
@@ -36,35 +37,35 @@
ranges;
uart0: serial@54006800 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006800 0x20>;
clock-frequency = <73728000>;
};
uart1: serial@54006900 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006900 0x20>;
clock-frequency = <73728000>;
};
uart2: serial@54006a00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006a00 0x20>;
clock-frequency = <73728000>;
};
uart3: serial@54006b00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006b00 0x20>;
clock-frequency = <73728000>;
};
i2c0: i2c@58780000 {
- compatible = "panasonic,uniphier-fi2c";
+ compatible = "socionext,uniphier-fi2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58780000 0x80>;
@@ -73,7 +74,7 @@
};
i2c1: i2c@58781000 {
- compatible = "panasonic,uniphier-fi2c";
+ compatible = "socionext,uniphier-fi2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58781000 0x80>;
@@ -82,7 +83,7 @@
};
i2c2: i2c@58782000 {
- compatible = "panasonic,uniphier-fi2c";
+ compatible = "socionext,uniphier-fi2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58782000 0x80>;
@@ -91,7 +92,7 @@
};
i2c3: i2c@58783000 {
- compatible = "panasonic,uniphier-fi2c";
+ compatible = "socionext,uniphier-fi2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58783000 0x80>;
@@ -102,7 +103,7 @@
/* i2c4 does not exist */
i2c5: i2c@58785000 {
- compatible = "panasonic,uniphier-fi2c";
+ compatible = "socionext,uniphier-fi2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58785000 0x80>;
@@ -111,7 +112,7 @@
};
i2c6: i2c@58786000 {
- compatible = "panasonic,uniphier-fi2c";
+ compatible = "socionext,uniphier-fi2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58786000 0x80>;
@@ -120,25 +121,25 @@
};
usb2: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb3: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb0: usb@65a00000 {
- compatible = "panasonic,uniphier-xhci", "generic-xhci";
+ compatible = "socionext,uniphier-xhci", "generic-xhci";
status = "disabled";
reg = <0x65a00000 0x100>;
};
usb1: usb@65c00000 {
- compatible = "panasonic,uniphier-xhci", "generic-xhci";
+ compatible = "socionext,uniphier-xhci", "generic-xhci";
status = "disabled";
reg = <0x65c00000 0x100>;
};
diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
index 8a7f90a..d9616f6 100644
--- a/arch/arm/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-sLD3 Reference Board
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -12,8 +13,8 @@
/include/ "uniphier-ref-daughter.dtsi"
/ {
- model = "Panasonic UniPhier PH1-sLD3 Reference Board";
- compatible = "panasonic,ph1-sld3-ref", "panasonic,ph1-sld3";
+ model = "UniPhier PH1-sLD3 Reference Board";
+ compatible = "socionext,ph1-sld3-ref", "socionext,ph1-sld3";
memory {
device_type = "memory";
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 88322c6..44b1989 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-sLD3 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,7 +11,7 @@
/include/ "skeleton.dtsi"
/ {
- compatible = "panasonic,ph1-sld3";
+ compatible = "socionext,ph1-sld3";
cpus {
#address-cells = <1>;
@@ -36,28 +37,28 @@
ranges;
uart0: serial@54006800 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006800 0x20>;
clock-frequency = <36864000>;
};
uart1: serial@54006900 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006900 0x20>;
clock-frequency = <36864000>;
};
uart2: serial@54006a00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006a00 0x20>;
clock-frequency = <36864000>;
};
i2c0: i2c@58400000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58400000 0x40>;
@@ -66,7 +67,7 @@
};
i2c1: i2c@58480000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58480000 0x40>;
@@ -75,7 +76,7 @@
};
i2c2: i2c@58500000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58500000 0x40>;
@@ -84,7 +85,7 @@
};
i2c3: i2c@58580000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58580000 0x40>;
@@ -93,25 +94,25 @@
};
usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};
usb3: usb@5a830100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a830100 0x100>;
};
diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts
index 0cb9c47..69e9bfa 100644
--- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-sLD8 Reference Board
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -12,8 +13,8 @@
/include/ "uniphier-ref-daughter.dtsi"
/ {
- model = "Panasonic UniPhier PH1-sLD8 Reference Board";
- compatible = "panasonic,ph1-sld8-ref", "panasonic,ph1-sld8";
+ model = "UniPhier PH1-sLD8 Reference Board";
+ compatible = "socionext,ph1-sld8-ref", "socionext,ph1-sld8";
memory {
device_type = "memory";
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 1b3eb22..d9f61c2 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-sLD8 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,7 +11,7 @@
/include/ "skeleton.dtsi"
/ {
- compatible = "panasonic,ph1-sld8";
+ compatible = "socionext,ph1-sld8";
cpus {
#address-cells = <1>;
@@ -30,35 +31,35 @@
ranges;
uart0: serial@54006800 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006800 0x20>;
clock-frequency = <80000000>;
};
uart1: serial@54006900 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006900 0x20>;
clock-frequency = <80000000>;
};
uart2: serial@54006a00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006a00 0x20>;
clock-frequency = <80000000>;
};
uart3: serial@54006b00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006b00 0x20>;
clock-frequency = <80000000>;
};
i2c0: i2c@58400000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58400000 0x40>;
@@ -67,7 +68,7 @@
};
i2c1: i2c@58480000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58480000 0x40>;
@@ -76,7 +77,7 @@
};
i2c2: i2c@58500000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58500000 0x40>;
@@ -85,7 +86,7 @@
};
i2c3: i2c@58580000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58580000 0x40>;
@@ -94,19 +95,19 @@
};
usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};
diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi b/arch/arm/dts/uniphier-ref-daughter.dtsi
index 0145b51..aca9f58 100644
--- a/arch/arm/dts/uniphier-ref-daughter.dtsi
+++ b/arch/arm/dts/uniphier-ref-daughter.dtsi
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier Reference Daughter Board
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
generated by cgit v1.1 at 2024-12-21 02:07:31 +0000