summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/arm1136/mx31/timer.c23
-rw-r--r--arch/arm/cpu/arm1136/mx35/generic.c2
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/generic.c110
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/reset.c2
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/timer.c16
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/reset.c2
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/timer.c14
-rw-r--r--arch/arm/cpu/armv7/mx5/soc.c10
-rw-r--r--arch/arm/include/asm/arch-mx5/sys_proto.h8
9 files changed, 97 insertions, 90 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index 717a2b7..f494440 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -43,7 +43,11 @@
DECLARE_GLOBAL_DATA_PTR;
-/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */
+/*
+ * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
+ * "tick" is internal timer period
+ */
+
#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
/* ~0.4% error - measured with stop-watch on 100s boot-delay */
static inline unsigned long long tick_to_time(unsigned long long tick)
@@ -68,7 +72,8 @@ static inline unsigned long long us_to_tick(unsigned long long us)
}
#else
/* ~2% error */
-#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
+#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) \
+ / CONFIG_SYS_HZ)
#define US_PER_TICK (1000000 / CONFIG_MX31_CLK32)
static inline unsigned long long tick_to_time(unsigned long long tick)
@@ -91,7 +96,7 @@ static inline unsigned long long us_to_tick(unsigned long long us)
#endif
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
-int timer_init (void)
+int timer_init(void)
{
int i;
@@ -106,7 +111,7 @@ int timer_init (void)
return 0;
}
-unsigned long long get_ticks (void)
+unsigned long long get_ticks(void)
{
ulong now = GPTCNT; /* current tick value */
@@ -119,7 +124,7 @@ unsigned long long get_ticks (void)
return gd->tbl;
}
-ulong get_timer_masked (void)
+ulong get_timer_masked(void)
{
/*
* get_ticks() returns a long long (64 bit), it wraps in
@@ -130,13 +135,13 @@ ulong get_timer_masked (void)
return tick_to_time(get_ticks());
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
- return get_timer_masked () - base;
+ return get_timer_masked() - base;
}
/* delay x useconds AND preserve advance timestamp value */
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;
@@ -148,7 +153,7 @@ void __udelay (unsigned long usec)
/*NOP*/;
}
-void reset_cpu (ulong addr)
+void reset_cpu(ulong addr)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
wdog->wcr = WDOG_ENABLE;
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c
index fcfaba5..1b9809b 100644
--- a/arch/arm/cpu/arm1136/mx35/generic.c
+++ b/arch/arm/cpu/arm1136/mx35/generic.c
@@ -240,7 +240,7 @@ unsigned int mxc_get_main_clock(enum mxc_main_clocks clk)
}
break;
case IPG_CLK:
- ret_val = get_ipg_clk();;
+ ret_val = get_ipg_clk();
break;
case IPG_PER_CLK:
ret_val = get_ipg_per_clk();
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 8e60a26..c045a0b 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -39,7 +39,7 @@
* f = 2 * f_ref * --------------------
* pd + 1
*/
-static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref)
+static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
{
unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
& CCM_PLL_MFI_MASK;
@@ -52,57 +52,57 @@ static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref)
mfi = mfi <= 5 ? 5 : mfi;
- return lldiv (2 * (u64) f_ref * (mfi * (mfd + 1) + mfn),
+ return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn),
(mfd + 1) * (pd + 1));
}
-static ulong imx_get_mpllclk (void)
+static ulong imx_get_mpllclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = 24000000;
- return imx_decode_pll (readl (&ccm->mpctl), fref);
+ return imx_decode_pll(readl(&ccm->mpctl), fref);
}
-ulong imx_get_armclk (void)
+ulong imx_get_armclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
- ulong cctl = readl (&ccm->cctl);
- ulong fref = imx_get_mpllclk ();
+ ulong cctl = readl(&ccm->cctl);
+ ulong fref = imx_get_mpllclk();
ulong div;
if (cctl & CCM_CCTL_ARM_SRC)
- fref = lldiv ((fref * 3), 4);
+ fref = lldiv((fref * 3), 4);
div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT)
& CCM_CCTL_ARM_DIV_MASK) + 1;
- return lldiv (fref, div);
+ return lldiv(fref, div);
}
-ulong imx_get_ahbclk (void)
+ulong imx_get_ahbclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
- ulong cctl = readl (&ccm->cctl);
- ulong fref = imx_get_armclk ();
+ ulong cctl = readl(&ccm->cctl);
+ ulong fref = imx_get_armclk();
ulong div;
div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT)
& CCM_CCTL_AHB_DIV_MASK) + 1;
- return lldiv (fref, div);
+ return lldiv(fref, div);
}
-ulong imx_get_perclk (int clk)
+ulong imx_get_perclk(int clk)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
- ulong fref = imx_get_ahbclk ();
+ ulong fref = imx_get_ahbclk();
ulong div;
- div = readl (&ccm->pcdr[CCM_PERCLK_REG (clk)]);
- div = ((div >> CCM_PERCLK_SHIFT (clk)) & CCM_PERCLK_MASK) + 1;
+ div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
+ div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1;
- return lldiv (fref, div);
+ return lldiv(fref, div);
}
u32 get_cpu_rev(void)
@@ -153,7 +153,7 @@ static char *get_reset_cause(void)
}
-int print_cpuinfo (void)
+int print_cpuinfo(void)
{
char buf[32];
u32 cpurev = get_cpu_rev();
@@ -161,22 +161,22 @@ int print_cpuinfo (void)
printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n",
(cpurev & 0xF0) >> 4, (cpurev & 0x0F),
((cpurev & 0x8000) ? " unknown" : ""),
- strmhz (buf, imx_get_armclk ()));
+ strmhz(buf, imx_get_armclk()));
printf("Reset cause: %s\n\n", get_reset_cause());
return 0;
}
#endif
-int cpu_eth_init (bd_t * bis)
+int cpu_eth_init(bd_t *bis)
{
#if defined(CONFIG_FEC_MXC)
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong val;
- val = readl (&ccm->cgr0);
+ val = readl(&ccm->cgr0);
val |= (1 << 23);
- writel (val, &ccm->cgr0);
- return fecmxc_initialize (bis);
+ writel(val, &ccm->cgr0);
+ return fecmxc_initialize(bis);
#else
return 0;
#endif
@@ -186,10 +186,10 @@ int cpu_eth_init (bd_t * bis)
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
-int cpu_mmc_init (bd_t * bis)
+int cpu_mmc_init(bd_t *bis)
{
#ifdef CONFIG_MXC_MMC
- return mxc_mmc_init (bis);
+ return mxc_mmc_init(bis);
#else
return 0;
#endif
@@ -206,7 +206,7 @@ void mx25_uart1_init_pins(void)
muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
- muxmode0 = MX25_PIN_MUX_MODE (0);
+ muxmode0 = MX25_PIN_MUX_MODE(0);
/*
* set up input pins with hysteresis and 100K pull-ups
*/
@@ -227,25 +227,25 @@ void mx25_uart1_init_pins(void)
/* UART1 */
/* rxd */
- writel (muxmode0, &muxctl->pad_uart1_rxd);
- writel (inpadctl, &padctl->pad_uart1_rxd);
+ writel(muxmode0, &muxctl->pad_uart1_rxd);
+ writel(inpadctl, &padctl->pad_uart1_rxd);
/* txd */
- writel (muxmode0, &muxctl->pad_uart1_txd);
- writel (outpadctl, &padctl->pad_uart1_txd);
+ writel(muxmode0, &muxctl->pad_uart1_txd);
+ writel(outpadctl, &padctl->pad_uart1_txd);
/* rts */
- writel (muxmode0, &muxctl->pad_uart1_rts);
- writel (outpadctl, &padctl->pad_uart1_rts);
+ writel(muxmode0, &muxctl->pad_uart1_rts);
+ writel(outpadctl, &padctl->pad_uart1_rts);
/* cts */
- writel (muxmode0, &muxctl->pad_uart1_cts);
- writel (inpadctl, &padctl->pad_uart1_cts);
+ writel(muxmode0, &muxctl->pad_uart1_cts);
+ writel(inpadctl, &padctl->pad_uart1_cts);
}
#endif /* CONFIG_MXC_UART */
#ifdef CONFIG_FEC_MXC
-void mx25_fec_init_pins (void)
+void mx25_fec_init_pins(void)
{
struct iomuxc_mux_ctl *muxctl;
struct iomuxc_pad_ctl *padctl;
@@ -256,7 +256,7 @@ void mx25_fec_init_pins (void)
muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
- muxmode0 = MX25_PIN_MUX_MODE (0);
+ muxmode0 = MX25_PIN_MUX_MODE(0);
inpadctl_100kpd = MX25_PIN_PAD_CTL_HYS
| MX25_PIN_PAD_CTL_PKE
| MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
@@ -275,40 +275,40 @@ void mx25_fec_init_pins (void)
outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
/* FEC_TX_CLK */
- writel (muxmode0, &muxctl->pad_fec_tx_clk);
- writel (inpadctl_100kpd, &padctl->pad_fec_tx_clk);
+ writel(muxmode0, &muxctl->pad_fec_tx_clk);
+ writel(inpadctl_100kpd, &padctl->pad_fec_tx_clk);
/* FEC_RX_DV */
- writel (muxmode0, &muxctl->pad_fec_rx_dv);
- writel (inpadctl_100kpd, &padctl->pad_fec_rx_dv);
+ writel(muxmode0, &muxctl->pad_fec_rx_dv);
+ writel(inpadctl_100kpd, &padctl->pad_fec_rx_dv);
/* FEC_RDATA0 */
- writel (muxmode0, &muxctl->pad_fec_rdata0);
- writel (inpadctl_100kpd, &padctl->pad_fec_rdata0);
+ writel(muxmode0, &muxctl->pad_fec_rdata0);
+ writel(inpadctl_100kpd, &padctl->pad_fec_rdata0);
/* FEC_TDATA0 */
- writel (muxmode0, &muxctl->pad_fec_tdata0);
- writel (outpadctl, &padctl->pad_fec_tdata0);
+ writel(muxmode0, &muxctl->pad_fec_tdata0);
+ writel(outpadctl, &padctl->pad_fec_tdata0);
/* FEC_TX_EN */
- writel (muxmode0, &muxctl->pad_fec_tx_en);
- writel (outpadctl, &padctl->pad_fec_tx_en);
+ writel(muxmode0, &muxctl->pad_fec_tx_en);
+ writel(outpadctl, &padctl->pad_fec_tx_en);
/* FEC_MDC */
- writel (muxmode0, &muxctl->pad_fec_mdc);
- writel (outpadctl, &padctl->pad_fec_mdc);
+ writel(muxmode0, &muxctl->pad_fec_mdc);
+ writel(outpadctl, &padctl->pad_fec_mdc);
/* FEC_MDIO */
- writel (muxmode0, &muxctl->pad_fec_mdio);
- writel (inpadctl_22kpu, &padctl->pad_fec_mdio);
+ writel(muxmode0, &muxctl->pad_fec_mdio);
+ writel(inpadctl_22kpu, &padctl->pad_fec_mdio);
/* FEC_RDATA1 */
- writel (muxmode0, &muxctl->pad_fec_rdata1);
- writel (inpadctl_100kpd, &padctl->pad_fec_rdata1);
+ writel(muxmode0, &muxctl->pad_fec_rdata1);
+ writel(inpadctl_100kpd, &padctl->pad_fec_rdata1);
/* FEC_TDATA1 */
- writel (muxmode0, &muxctl->pad_fec_tdata1);
- writel (outpadctl, &padctl->pad_fec_tdata1);
+ writel(muxmode0, &muxctl->pad_fec_tdata1);
+ writel(outpadctl, &padctl->pad_fec_tdata1);
}
diff --git a/arch/arm/cpu/arm926ejs/mx25/reset.c b/arch/arm/cpu/arm926ejs/mx25/reset.c
index 1a43683..e6f1056 100644
--- a/arch/arm/cpu/arm926ejs/mx25/reset.c
+++ b/arch/arm/cpu/arm926ejs/mx25/reset.c
@@ -39,7 +39,7 @@
/*
* Reset the cpu by setting up the watchdog timer and let it time out
*/
-void reset_cpu (ulong ignored)
+void reset_cpu(ulong ignored)
{
struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
/* Disable watchdog and set Time-Out field to 0 */
diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 5eb2747..1cfd02b 100644
--- a/arch/arm/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
@@ -15,7 +15,7 @@
*
* (C) Copyright 2009 DENX Software Engineering
* Author: John Rigby <jrigby@gmail.com>
- * Add support for MX25
+ * Add support for MX25
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -43,8 +43,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastinc gd->lastinc
+#define timestamp (gd->tbl)
+#define lastinc (gd->lastinc)
/*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
@@ -121,7 +121,7 @@ int timer_init(void)
return 0;
}
-unsigned long long get_ticks (void)
+unsigned long long get_ticks(void)
{
struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
ulong now = readl(&gpt->counter); /* current tick value */
@@ -140,7 +140,7 @@ unsigned long long get_ticks (void)
return timestamp;
}
-ulong get_timer_masked (void)
+ulong get_timer_masked(void)
{
/*
* get_ticks() returns a long long (64 bit), it wraps in
@@ -151,13 +151,13 @@ ulong get_timer_masked (void)
return tick_to_time(get_ticks());
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
- return get_timer_masked () - base;
+ return get_timer_masked() - base;
}
/* delay x useconds AND preserve advance timstamp value */
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;
diff --git a/arch/arm/cpu/arm926ejs/mx27/reset.c b/arch/arm/cpu/arm926ejs/mx27/reset.c
index 6c54eaf..cc0a33e 100644
--- a/arch/arm/cpu/arm926ejs/mx27/reset.c
+++ b/arch/arm/cpu/arm926ejs/mx27/reset.c
@@ -39,7 +39,7 @@
/*
* Reset the cpu by setting up the watchdog timer and let it time out
*/
-void reset_cpu (ulong ignored)
+void reset_cpu(ulong ignored)
{
struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
/* Disable watchdog and set Time-Out field to 0 */
diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c
index df76d16..5af9359 100644
--- a/arch/arm/cpu/arm926ejs/mx27/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
@@ -45,8 +45,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastinc gd->lastinc
+#define timestamp (gd->tbl)
+#define lastinc (gd->lastinc)
/*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
@@ -124,7 +124,7 @@ int timer_init(void)
return 0;
}
-unsigned long long get_ticks (void)
+unsigned long long get_ticks(void)
{
struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
ulong now = readl(&regs->gpt_tcn); /* current tick value */
@@ -143,7 +143,7 @@ unsigned long long get_ticks (void)
return timestamp;
}
-ulong get_timer_masked (void)
+ulong get_timer_masked(void)
{
/*
* get_ticks() returns a long long (64 bit), it wraps in
@@ -154,13 +154,13 @@ ulong get_timer_masked (void)
return tick_to_time(get_ticks());
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
- return get_timer_masked () - base;
+ return get_timer_masked() - base;
}
/* delay x useconds AND preserve advance timstamp value */
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index c6106d5..cf12ba8 100644
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -26,6 +26,8 @@
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+
#include <asm/errno.h>
#include <asm/io.h>
@@ -117,14 +119,6 @@ int print_cpuinfo(void)
}
#endif
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
- */
-#if defined(CONFIG_FEC_MXC)
-extern int fecmxc_initialize(bd_t *bis);
-#endif
-
int cpu_eth_init(bd_t *bis)
{
int rc = -ENODEV;
diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h
index ce63675..13d12ee 100644
--- a/arch/arm/include/asm/arch-mx5/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx5/sys_proto.h
@@ -28,4 +28,12 @@ u32 get_cpu_rev(void);
#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
void sdelay(unsigned long);
void set_chipselect_size(int const);
+
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+
+int fecmxc_initialize(bd_t *bis);
+
#endif
generated by cgit v1.1 at 2024-12-22 23:29:50 +0000