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-rw-r--r--arch/arm/cpu/armv7/start.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 6a77c71..ef08a55 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -132,6 +132,7 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
+#if !defined(CONFIG_TEGRA2)
/*
* Setup vector:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -147,6 +148,7 @@ reset:
ldr r0, =_start
mcr p15, 0, r0, c12, c0, 0 @Set VBAR
#endif
+#endif /* !Tegra2 */
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT