diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 33 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/clock.h | 1 |
2 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 4d53e9a..f55cf19 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -284,6 +284,34 @@ static u32 get_mmdc_ch0_clk(void) return freq / (podf + 1); } + +int enable_fec_clock(void) +{ + u32 reg = 0; + s32 timeout = 100000; + + reg = readl(ANATOP_BASE_ADDR + 0xe0); + if ((reg & BM_ANADIG_PLL_ENET_POWERDOWN) || + (!(reg & BM_ANADIG_PLL_ENET_LOCK))) { + reg &= ~BM_ANADIG_PLL_ENET_POWERDOWN; + writel(reg, ANATOP_BASE_ADDR + 0xe0); + while (timeout--) { + if (readl(ANATOP_BASE_ADDR + 0xe0) & + BM_ANADIG_PLL_ENET_LOCK) + break; + } + if (timeout <= 0) + return -1; + } + + /* Enable FEC clock */ + reg |= BM_ANADIG_PLL_ENET_ENABLE; + reg &= ~BM_ANADIG_PLL_ENET_BYPASS; + writel(reg, ANATOP_BASE_ADDR + 0xe0); + + return 0; +} + #else static u32 get_mmdc_ch0_clk(void) { @@ -293,6 +321,11 @@ static u32 get_mmdc_ch0_clk(void) return get_periph_clk() / (mmdc_ch0_podf + 1); } + +int enable_fec_clock(void) +{ + return 0; +} #endif static u32 get_usdhc_clk(u32 port) diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index db377cc..42daee0 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -64,5 +64,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk); void enable_usboh3_clk(unsigned char enable); int enable_sata_clock(void); int enable_i2c_clk(unsigned char enable, unsigned i2c_num); +int enable_fec_clock(void); #endif /* __ASM_ARCH_CLOCK_H */ |