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-rw-r--r--arch/arm/mach-exynos/Kconfig61
-rw-r--r--arch/arm/mach-exynos/Makefile6
-rw-r--r--arch/arm/mach-exynos/include/mach/cpu.h4
-rw-r--r--arch/arm/mach-exynos/include/mach/dp_info.h5
-rw-r--r--arch/arm/mach-exynos/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/mipi_dsim.h10
-rw-r--r--arch/arm/mach-exynos/include/mach/power.h2
-rw-r--r--arch/arm/mach-exynos/lowlevel_init.c3
-rw-r--r--arch/arm/mach-exynos/mmu-arm64.c35
-rw-r--r--arch/arm/mach-exynos/pinmux.c6
-rw-r--r--arch/arm/mach-exynos/power.c2
-rw-r--r--arch/arm/mach-exynos/soc.c10
12 files changed, 131 insertions, 15 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index a6a7597..c25fcf3 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -1,9 +1,40 @@
if ARCH_EXYNOS
choice
- prompt "EXYNOS board select"
+ prompt "EXYNOS architecture type select"
optional
+config ARCH_EXYNOS4
+ bool "Exynos4 SoC family"
+ select CPU_V7
+ help
+ Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
+ are multiple SoCs in this family including Exynos4210, Exynos4412,
+ and Exynos4212.
+
+config ARCH_EXYNOS5
+ bool "Exynos5 SoC family"
+ select CPU_V7
+ help
+ Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
+ Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
+ in this family including Exynos5250, Exynos5420 and Exynos5800.
+
+config ARCH_EXYNOS7
+ bool "Exynos7 SoC family"
+ select ARM64
+ help
+ Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or
+ Cortex-A53 CPU (and some in a big.LITTLE configuration). There are
+ multiple SoCs in this family including Exynos7420.
+
+endchoice
+
+if ARCH_EXYNOS4
+
+choice
+ prompt "EXYNOS4 board select"
+
config TARGET_SMDKV310
select SUPPORT_SPL
bool "Exynos4210 SMDKV310 board"
@@ -25,6 +56,14 @@ config TARGET_TRATS2
config TARGET_ODROID
bool "Exynos4412 Odroid board"
+endchoice
+endif
+
+if ARCH_EXYNOS5
+
+choice
+ prompt "EXYNOS5 board select"
+
config TARGET_ODROID_XU3
bool "Exynos5422 Odroid board"
select OF_CONTROL
@@ -68,6 +107,25 @@ config TARGET_PEACH_PIT
select OF_CONTROL
endchoice
+endif
+
+if ARCH_EXYNOS7
+
+choice
+ prompt "EXYNOS7 board select"
+
+config TARGET_ESPRESSO7420
+ bool "ESPRESSO7420 board"
+ select ARM64
+ select SUPPORT_SPL
+ select OF_CONTROL
+ select SPL_DISABLE_OF_CONTROL
+ select PINCTRL
+ select PINCTRL_EXYNOS7420
+ select CLK_EXYNOS
+
+endchoice
+endif
config SYS_SOC
default "exynos"
@@ -81,5 +139,6 @@ source "board/samsung/odroid/Kconfig"
source "board/samsung/arndale/Kconfig"
source "board/samsung/smdk5250/Kconfig"
source "board/samsung/smdk5420/Kconfig"
+source "board/samsung/espresso7420/Kconfig"
endif
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 8542f89..0cc6c32 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -5,7 +5,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += clock.o power.o soc.o system.o pinmux.o tzpc.o
+obj-y += soc.o
+obj-$(CONFIG_CPU_V7) += clock.o pinmux.o power.o system.o
+obj-$(CONFIG_ARM64) += mmu-arm64.o
obj-$(CONFIG_EXYNOS5420) += sec_boot.o
@@ -13,6 +15,6 @@ ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_EXYNOS5) += clock_init_exynos5.o
obj-$(CONFIG_EXYNOS5) += dmc_common.o dmc_init_ddr3.o
obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
-obj-y += spl_boot.o
+obj-y += spl_boot.o tzpc.o
obj-y += lowlevel_init.o
endif
diff --git a/arch/arm/mach-exynos/include/mach/cpu.h b/arch/arm/mach-exynos/include/mach/cpu.h
index 14a1692..1f722df 100644
--- a/arch/arm/mach-exynos/include/mach/cpu.h
+++ b/arch/arm/mach-exynos/include/mach/cpu.h
@@ -270,7 +270,7 @@ IS_EXYNOS_TYPE(exynos5420, 0x5420)
IS_EXYNOS_TYPE(exynos5422, 0x5422)
#define SAMSUNG_BASE(device, base) \
-static inline unsigned int __attribute__((no_instrument_function)) \
+static inline unsigned long __attribute__((no_instrument_function)) \
samsung_get_base_##device(void) \
{ \
if (cpu_is_exynos4()) { \
@@ -288,9 +288,7 @@ static inline unsigned int __attribute__((no_instrument_function)) \
SAMSUNG_BASE(adc, ADC_BASE)
SAMSUNG_BASE(clock, CLOCK_BASE)
SAMSUNG_BASE(ace_sfr, ACE_SFR_BASE)
-SAMSUNG_BASE(dp, DP_BASE)
SAMSUNG_BASE(sysreg, SYSREG_BASE)
-SAMSUNG_BASE(fimd, FIMD_BASE)
SAMSUNG_BASE(i2c, I2C_BASE)
SAMSUNG_BASE(i2s, I2S_BASE)
SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE)
diff --git a/arch/arm/mach-exynos/include/mach/dp_info.h b/arch/arm/mach-exynos/include/mach/dp_info.h
index 17e8f56..1079e1e 100644
--- a/arch/arm/mach-exynos/include/mach/dp_info.h
+++ b/arch/arm/mach-exynos/include/mach/dp_info.h
@@ -61,7 +61,7 @@ struct edp_video_info {
unsigned int color_depth;
};
-struct edp_device_info {
+struct exynos_dp_priv {
struct edp_disp_info disp_info;
struct edp_link_train_info lt_info;
struct edp_video_info video_info;
@@ -72,6 +72,7 @@ struct edp_device_info {
unsigned char dpcd_rev;
/*support enhanced frame cap */
unsigned char dpcd_efc;
+ struct exynos_dp *regs;
};
enum analog_power_block {
@@ -185,7 +186,7 @@ enum {
struct exynos_dp_platform_data {
- struct edp_device_info *edp_dev_info;
+ struct exynos_dp_priv *edp_dev_info;
};
#ifdef CONFIG_EXYNOS_DP
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h
index 7fc8e61..81363bd 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -1349,7 +1349,7 @@ enum exynos5420_gpio_pin {
};
struct gpio_info {
- unsigned int reg_addr; /* Address of register for this part */
+ unsigned long reg_addr; /* Address of register for this part */
unsigned int max_gpio; /* Maximum GPIO in this part */
};
diff --git a/arch/arm/mach-exynos/include/mach/mipi_dsim.h b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
index c9e8e06..43b5c01 100644
--- a/arch/arm/mach-exynos/include/mach/mipi_dsim.h
+++ b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
@@ -320,7 +320,7 @@ struct mipi_dsim_lcd_device {
int reverse_panel;
struct mipi_dsim_device *master;
- void *platform_data;
+ struct exynos_platform_mipi_dsim *platform_data;
};
/*
@@ -347,9 +347,10 @@ struct mipi_dsim_lcd_driver {
};
#ifdef CONFIG_EXYNOS_MIPI_DSIM
-int exynos_mipi_dsi_init(void);
+int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd);
#else
-static inline int exynos_mipi_dsi_init(void)
+static inline int exynos_mipi_dsi_init(
+ struct exynos_platform_mipi_dsim *dsim_pd)
{
return 0;
}
@@ -369,7 +370,8 @@ int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
*lcd_dev);
void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);
-void exynos_init_dsim_platform_data(vidinfo_t *vid);
+struct vidinfo;
+void exynos_init_dsim_platform_data(struct vidinfo *vid);
/* panel driver init based on mipi dsi interface */
void s6e8ax0_init(void);
diff --git a/arch/arm/mach-exynos/include/mach/power.h b/arch/arm/mach-exynos/include/mach/power.h
index 3f97b31..88f70d9 100644
--- a/arch/arm/mach-exynos/include/mach/power.h
+++ b/arch/arm/mach-exynos/include/mach/power.h
@@ -1717,7 +1717,7 @@ void set_usbdrd_phy_ctrl(unsigned int enable);
#define POWER_USB_DRD_PHY_CTRL_EN (1 << 0)
#define POWER_USB_DRD_PHY_CTRL_DISABLE (0 << 0)
-void set_dp_phy_ctrl(unsigned int enable);
+void exynos_dp_phy_ctrl(unsigned int enable);
#define EXYNOS_DP_PHY_ENABLE (1 << 0)
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index 6c39cb2..1e090fd 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -216,9 +216,12 @@ int do_lowlevel_init(void)
if (actions & DO_CLOCKS) {
system_clock_init();
#ifdef CONFIG_DEBUG_UART
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)) || \
+ !defined(CONFIG_SPL_BUILD)
exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
debug_uart_init();
#endif
+#endif
mem_ctrl_init(actions & DO_MEM_RESET);
tzpc_init();
}
diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c
new file mode 100644
index 0000000..ba6d99d
--- /dev/null
+++ b/arch/arm/mach-exynos/mmu-arm64.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham <thomas.ab@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/armv8/mmu.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_EXYNOS7420
+static struct mm_region exynos7420_mem_map[] = {
+ {
+ .base = 0x10000000UL,
+ .size = 0x10000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+ }, {
+ .base = 0x40000000UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE,
+ }, {
+ /* List terminator */
+ .base = 0,
+ .size = 0,
+ .attrs = 0,
+ },
+};
+
+struct mm_region *mem_map = exynos7420_mem_map;
+#endif
diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c
index 12eb79c..fec2df9 100644
--- a/arch/arm/mach-exynos/pinmux.c
+++ b/arch/arm/mach-exynos/pinmux.c
@@ -506,6 +506,9 @@ static int exynos5_pinmux_config(int peripheral, int flags)
*/
gpio_set_pull(EXYNOS5_GPIO_X07, S5P_GPIO_PULL_NONE);
break;
+ case PERIPH_ID_PWM0:
+ gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_FUNC(2));
+ break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
@@ -548,6 +551,9 @@ static int exynos5420_pinmux_config(int peripheral, int flags)
case PERIPH_ID_I2C10:
exynos5420_i2c_config(peripheral);
break;
+ case PERIPH_ID_PWM0:
+ gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(2));
+ break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c
index cd2d661..c923460 100644
--- a/arch/arm/mach-exynos/power.c
+++ b/arch/arm/mach-exynos/power.c
@@ -147,7 +147,7 @@ static void exynos5_dp_phy_control(unsigned int enable)
writel(cfg, &power->dptx_phy_control);
}
-void set_dp_phy_ctrl(unsigned int enable)
+void exynos_dp_phy_ctrl(unsigned int enable)
{
if (cpu_is_exynos5())
exynos5_dp_phy_control(enable);
diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c
index 0f116b1..f9c7468 100644
--- a/arch/arm/mach-exynos/soc.c
+++ b/arch/arm/mach-exynos/soc.c
@@ -11,7 +11,9 @@
void reset_cpu(ulong addr)
{
+#ifdef CONFIG_CPU_V7
writel(0x1, samsung_get_base_swreset());
+#endif
}
#ifndef CONFIG_SYS_DCACHE_OFF
@@ -21,3 +23,11 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+#ifdef CONFIG_ARM64
+void lowlevel_init(void)
+{
+ armv8_switch_to_el2();
+ armv8_switch_to_el1();
+}
+#endif
generated by cgit v1.1 at 2024-09-18 21:59:32 +0000